DISCRETE SEMICONDUCTORS DATA SHEET BSP204; BSP204A P-channel enhancement mode vertical D-MOS transistor Product specification File under Discrete Semiconductors, SC13b April 1995 Philips Semiconductors Product specification P-channel enhancement mode vertical D-MOS transistor FEATURES BSP204; BSP204A QUICK REFERENCE DATA • Direct interface to C-MOS, TTL, etc. • High-speed switching • No secondary breakdown. DESCRIPTION P-channel enhancement mode vertical D-MOS transistor in a TO-92 variant envelope, intended for use in relay, high-speed and line transformer drivers. SYMBOL PARAMETER CONDITIONS MAX. −VDS drain-source voltage 200 V −ID drain current DC value 250 mA RDS(on) drain-source on-resistance −ID = 200 mA −VGS = 10 V 15 Ω VGS(th) gate-source threshold voltage −ID = 1 mA VGS = VDS 2.8 V PIN CONFIGURATION PINNING - TO-92 variant (BSP204) PIN DESCRIPTION 1 gate 2 drain 3 source d handbook, halfpage 1 2 3 g MAM147 s PINNING - TO-92 variant (BSP204A) PIN DESCRIPTION 1 source 2 gate 3 drain April 1995 UNIT Fig.1 Simplified outline and symbol. 2 Philips Semiconductors Product specification P-channel enhancement mode vertical D-MOS transistor BSP204; BSP204A LIMITING VALUES In accordance with the Absolute Maximum System (IEC 134). SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT −VDS drain-source voltage − 200 V ±VGSO gate-source voltage − 20 V −ID drain current − 250 mA −IDM drain current peak value − 600 mA Ptot total power dissipation up to Tamb = 25 °C (note 1) − 1 W Tstg storage temperature range −65 150 °C Tj junction temperature − 150 °C DC value Note 1. Device mounted on an epoxy printed-circuit board, maximum lead length 4 mm; mounting pad for the drain lead minimum 10 mm x 10 mm. THERMAL RESISTANCE SYMBOL Rth j-a PARAMETER from junction to ambient (note 1) VALUE 125 UNIT K/W Note 1. Device mounted on an epoxy printed-circuit board, maximum lead length 4 mm; mounting pad for the drain lead minimum 10 mm x 10 mm. April 1995 3 Philips Semiconductors Product specification P-channel enhancement mode vertical D-MOS transistor BSP204; BSP204A CHARACTERISTICS Tj = 25 °C unless otherwise specified. SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT −V(BR)DSS drain-source breakdown voltage −ID = 10 µA VGS = 0 200 − − V −IDSS drain-source leakage current −VDS = 160 V VGS = 0 − − 1 µA ±IGSS gate-source leakage current ±VGS = 20 V VDS = 0 − − 100 nA −VGS(th) gate-source threshold voltage −ID = 1 mA VGS = VDS 0.8 − 2.8 V RDS(on) drain-source on-resistance −ID = 200 mA −VGS = 10 V − 10 15 Ω | Yfs| transfer admittance −ID = 200 mA −VDS = 25 V 100 200 − mS Ciss input capacitance −VDS = 25 V −VGS = 0 f = 1 MHz − 65 90 pF Coss output capacitance −VDS = 25 V −VGS = 0 f = 1 MHz − 20 30 pF Crss feedback capacitance −VDS = 25 V −VGS = 0 f = 1 MHz − 6 15 pF Switching times (see Figs 2 and 3) ton turn-on time −ID = 250 mA −VDD = 50 V −VGS = 0 to 10 V − 5 10 ns toff turn-off time −ID = 250 mA −VDD = 50 V −VGS = 0 to 10 V − 20 30 ns April 1995 4 Philips Semiconductors Product specification P-channel enhancement mode vertical D-MOS transistor VDD = −50 V handbook, halfpage BSP204; BSP204A handbook, halfpage 10 % INPUT 90 % 10 % 0V ID −10 V OUTPUT 50 Ω 90 % MBB689 ton toff MBB690 Fig.2 Switching time test circuit. Fig.3 Input and output waveforms. MRC238 1.2 MDA706 −1 handbook, halfpage VGS = −10 V handbook, halfpage ID (A) −0.8 Ptot (W) −6 V 0.8 −0.6 −5 V −0.4 −4 V 0.4 −0.2 −3 V 0 0 0 50 100 150 200 Tamb (°C) 0 −10 −15 −20 −25 VDS (V) Fig.5 Typical output characteristics; Tj = 25 °C. Fig.4 Power derating curve. April 1995 −5 5 Philips Semiconductors Product specification P-channel enhancement mode vertical D-MOS transistor MDA707 −1 BSP204; BSP204A −103 handbook, halfpage handbook, halfpage ID (A) −0.8 MDA708 VGS = −10 V −5 V ID (mA) −4 V −0.6 −102 −0.4 −0.2 0 −2 0 −4 −6 −10 −8 −10 VGS (V) Typical transfer characteristic; −VDS = 10 V; Tj = 25 °C. Fig.6 Fig.7 MDA734 160 8 16 12 20 24 28 RDSon (Ω) Typical on-resistance as a function of drain current; Tj = 25 °C. MDA710 2.5 handbook, halfpage handbook, halfpage k C (pF) 2 120 1.5 80 Ciss 1 40 0.5 Coss Crss 0 0 −5 −10 −15 0 −50 −20 −25 VDS (V) Fig.9 Fig.8 April 1995 Typical capacitances as a function of drain-source voltage; VGS = 0; f = 1 MHz; Tj = 25 °C. 0 50 100 Tj (°C) Temperature coefficient of drain-source on-resistance; R DS ( on ) at T j k = ---------------------------------------------- ; R DS ( on ) at 25 °C typical RDS(on) at −200 mA/−10 V. 6 150 Philips Semiconductors Product specification P-channel enhancement mode vertical D-MOS transistor MDA711 1.1 handbook, halfpage k 1 0.9 0.8 0.7 −50 0 50 100 Tj (°C) 150 Fig.10 Temperature coefficient of gate-source threshold voltage; – V GS ( th ) at T j k = ------------------------------------------------ ; – V GS ( th ) at 25 °C typical −VGS(th) at −1 mA. April 1995 7 BSP204; BSP204A Philips Semiconductors Product specification P-channel enhancement mode vertical D-MOS transistor BSP204; BSP204A PACKAGE OUTLINE Plastic single-ended leaded (through hole) package; 3 leads (on-circle) SOT54 variant c L2 E d A L b 1 e1 2 e D 3 b1 L1 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT A b b1 c D d E e e1 L L1(1) max L2 max mm 5.2 5.0 0.48 0.40 0.66 0.56 0.45 0.40 4.8 4.4 1.7 1.4 4.2 3.6 2.54 1.27 14.5 12.7 2.5 2.5 Notes 1. Terminal dimensions within this zone are uncontrolled to allow for flow of plastic and terminal irregularities. OUTLINE VERSION SOT54 variant April 1995 REFERENCES IEC JEDEC EIAJ TO-92 SC-43 8 EUROPEAN PROJECTION ISSUE DATE 97-04-14 Philips Semiconductors Product specification P-channel enhancement mode vertical D-MOS transistor BSP204; BSP204A DEFINITIONS Data sheet status Objective specification This data sheet contains target or goal specifications for product development. Preliminary specification This data sheet contains preliminary data; supplementary data may be published later. Product specification This data sheet contains final product specifications. Application information Where application information is given, it is advisory and does not form part of the specification. LIFE SUPPORT APPLICATIONS These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale. April 1995 9 Philips Semiconductors Product specification P-channel enhancement mode vertical D-MOS transistor NOTES April 1995 10 BSP204; BSP204A Philips Semiconductors Product specification P-channel enhancement mode vertical D-MOS transistor NOTES April 1995 11 BSP204; BSP204A Philips Semiconductors – a worldwide company Argentina: see South America Australia: 34 Waterloo Road, NORTH RYDE, NSW 2113, Tel. +61 2 9805 4455, Fax. +61 2 9805 4466 Austria: Computerstr. 6, A-1101 WIEN, P.O. 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