4 Micron CMOS Process Family Features Process parameters • Double Poly / Double Metal Process Parameters 4µm 4µm 10 volts 15 volts Metal I pitch (width/space) 4/4 4 /4 µm Metal II pitch (width/space) 3/4 3/4 µm Poly pitch (width/space) 4/4 4 /4 µm Contact 4x4 4x4 µm Via 3x3 3x3 µm Gate geometry 4.0 4.0 µm P-well junction depth 5.7 7.0 µm N+ junction depth 1.5 1.4 µm P+ junction depth 0.90 0.95 µm Gate oxide thickness 640 800 Å Inter poly oxide thick. 800 625 Å • 8 µm Poly and Metal Pitch Units • 10 Volts Maximum Operating Voltage • 15 Volts High Voltage Option • Isolated Vertical PNP Bipolar Module Description Dalsa Semiconductor’s 4µm process is a double poly/double metal CMOS process with an operating voltage range of 5 to 10 volts. In addition, a high voltage option is also available in which a special drain structure allows the maximum operating voltage to be increased to 18 volts. No compromises are made with packing density since all high voltage gates are drawn at 4µm. Also, an Isolated Vertical PNP bipolar module with good gain characteristics and high BVceo can be implemented on both options. MOSFET Electrical parameters Electrical Parameters Vt (50x4µm) 4 MICRON - 10 volts 4 MICRON - 15 volts N Channel min. typ. max. P Channel min. typ. max. N Channel min. typ. max. P Channel min. typ. max. 0.4 0.4 0.6 0.8 0.7 0.9 0.7 0.9 0.9 1.2 1.1 1.4 Units Conditions V saturation 10V : Vds=Vgs= 3v 15V : Vds=Vgs=7.5v Ids (50x4µm) 32 17 94 37 µA/µm Body factor 0.8 0.4 1.3 0.5 √v 22 V 10V : Ids=1µA 15V : Ids=20nA 80 mV/dec. Vds=0.1v 22 V Ids = 14 µA 2.6 µm L drawn = 4µm Bvdss 15 Subthres. slope Field threshold >20 15 114 12 L effective www.dalsasemi.com 34 1.6 >20 20 90 12 25 2.6 27 20 108 18 24 1.9 For More Information: DALSA Semiconductor Sales 18 Boulevard de l’Aéroport Bromont, Québec, Canada J2L 1S7 18 Tel : Fax email: (450) 534-2321 ext. 1448 (800) 718-9701 (450) 534-3201 [email protected] 4 Micron CMOS Process Family (cont’d) Resistances (Ω /sq.) 4 µm - 10 volts FIG 1: I-V Characteristics for a 50x4µm N-MOSFET (4µm High Voltage Process) 4 µm - 15 volts Vgs = 18V Pwell Pfield in Pwell typ. max. min. 5200 typ. max. 3300 1000 2000 3000 1000 2000 3000 N+ 6 9 14 30 39 50 P+ 70 94 110 75 90 125 Poly gate 14 21 26 16 20 28 Poly capacitor 30 43 80 20 28 50 Ids (mA) Vgs = 15V min. Vgs = 12V Vgs = 9V Vgs = 6V Vgs = 3V Metal I 0.038 0.038 Metal II 0.038 0.038 Vds (volts) FIG 2 : I-V Characteristics for a 50x4µm P-MOSFET (4µm High Voltage Process) Vgs = -18V Vgs = -15V 2 Capacitances (fF/µm ) Ids (mA) 4 µm - 10 volts Vgs = -12V 4 µm - 15 volts Vgs = -9V min. typ. max. min. typ. max. Vgs = -6V Inter-poly 0.35 0.43 0.55 0.45 0.55 0.65 Vgs = -3V Gate oxide 0.51 0.54 0.58 0.41 0.43 0.46 Vds (volts) N+ Junction 0.33 0.29 P+ Junction 0.14 0.10 FIG 3: Substrate Current per Gate Width for a 50x4µm N-MOSFET (4µm High Voltage Process) Bipolar characteristics 4 µm - 10 volts min. NPN vertical Gain* Bvceo (V) PNP vertical * typ. max. 4 µm - 15 volts min. 580 70 90 Gain* - - Bvceo (V) - - typ. max. Isub (µA/µm) Vds = 18V Vds = 16V Vds = 14V 240 70 90 - 50 120 - 20 30 Vgs (volts) 200 FIG 4 :Vertical PNP bipolar transistor Ib = -10mA Test condition : Vce = 5 volts -2.5 Ic (mA) -2.0 -1.5 Ib = -5mA -1.0 Note: These values are for guidance only. Many of them can be adjusted to suit customer requirements. For full process specifications contact a Dalsa Semiconductor sales office or representative. -0.5 Ib = -1mA 0 0 -20 Vce (volts) -40