DSTINIs400/DSTINIs-00x Sockets Evaluation Board www.maxim-ic.com GENERAL DESCRIPTION FEATURES ® The TINI sockets boards are motherboards designed to host the corresponding TINI evaluation module. The combination of the two boards allows full evaluation of the features of the target microprocessor. To evaluate the DS80C400, you only need to order the DS80C400-KIT. To evaluate the DS80C410 or DS80C411, you must order both the DSTINIm410# and the DSTINIs400# and use them together. The DSTINIm410# is used to evaluate both the DS80C410 and DS80C411. Hosts the TINI Runtime Environment in Validated Hardware Design (in Conjunction with the DSTINIm400) Although various boards support different evaluation modules, the most popular is the DSTINIs400#. It includes a 144-pin SODIMM connector and provides ® 1-Wire , CAN 2.0B, serial, and a 10/100 Ethernet PHY for connecting the DSTINIm400# or DSTINIm410# to the physical world. Fully Assembled and Tested Design 10/100 Base-T Ethernet Port Two Serial Ports Dual 1-Wire Network Ports CAN 2.0B Port 5.0V Single-Supply Operation (DSTINIm400) The DSTINIm400# and DSTINIm410# are designed as modules to be plugged into the 144-pin SODIMM connector on the DSTINIs400#. All are fully assembled and, when used together in the correct combinations, they form a complete evaluation system for the network microcontroller. The DSTINIm400# and DSTINIm410# modules include the DS80C400 and DS80C410 network microcontrollers, a real-time clock, 1MB flash, 1MB static RAM, and support for an external Ethernet PHY for connecting to a wide variety of networks. Detailed information about the initial setup process and use of the TINI platform is contained in Application Note 612: Getting Started with the TINIm400 (DS80C400) Verification Module. COMPONENT LIST ORDERING INFORMATION PART DSTINIs400 INPUT VOLTAGE* USED WITH MODULE DIMENSIONS Replaced with DSTINIs400# DSTINIs400# 5V DC regulated DSTINIm400 12cm x 10cm DSTINIs-005 5V DC regulated DSTINI1-1MG, DSTINI1-512 16cm x 10cm DSTINIs-006 9V to 18V DC DSTINI1-1MG, DSTINI1-512 16cm x 10cm Note: The DSTINIm400 is an evaluation board and is only tested to prototype standards. It is not tested for use in a production product. *The user must supply an external power supply. # Denotes a RoHS-compliant device that may include lead that is exempt under the RoHS requirements. DESIGNATION QTY C1 1 47pF capacitor (1206) C2, C4, C5, C6 4 47μF tantalum capacitors (3528-21) 9 100nF capacitors (1206) 9 10nF capacitors (1206) 1 220nF, 16V capacitor (1206) 6 1.0μF capacitors (1206) 1 4.7μF capacitor (1206) C3, C7, C9, C13, C15, C26, C28, C30, C38 C12, C14, C17, C19, C25, C27, C29, C33, C37 C8 C10, C31, C32, C34, C35, C36 C11 DESCRIPTION TINI and 1-Wire are registered trademarks of Maxim Integrated Products, Inc. 1 of 12 REV: 061608 DSTINIs400/DSTINIs-00x Sockets Evaluation Board COMPONENT LIST (continued) DESIGNATION QTY C16, C18 2 C20, C21, C22 3 C23, C24 2 C40 1 D1 D2 D3, D4 1 1 2 J1 1 J2 1 DESCRIPTION 270pF capacitor (1206) 1nF, 2kV radial capacitors (ceramic disk) 27pF capacitors (1206) 0.10μF ±10%, 50V capacitor (1206) 1N5908 D0-201 BAT54 SOT23 BAT54S SOT23 SODIMM144 Molex 54698-7000 2.5mm center, 5.5mm outside barrel connector Dual-row connectors, 0.025 square pins RJ-45 modular jack 3 x 1-pin headers, 0.1 centers DB9 serial female DB9 serial male Pad jumper RJ11 modular jack J3–J6, J20, J21, J27 J7 1 J9, J10, J11 3 J12 J13 J14 J16 L1 1 1 1 1 1 Q1 1 R1 1 205kΩ ±1% resistor (1206) R2 R3 R4–R7, R8, R10, R11, R12 R13, R9 1 1 121kΩ ±1% resistor (1206) 10kΩ ±5% resistor (1206) 8 49.9Ω ±1% resistors (1206) 2 47Ω resistor (1206) R14 R15, R17, R18 1 3 22.1kΩ ±1% resistor (1206) 220Ω resistors (1206) 7 22μH inductor BSS84 SIPMOS FET SOT23 CONFIGURATION DS80C400 attempts to boot through Ethernet using DHCP and TFTP DTR Reset Jumper (J14) JUMPER 1-2 CONFIGURATION DTR reset communicates with the DS80C400 loader application. Quiet Boot Jumper (J5) JUMPER 1-2 1 1 1 10kΩ resistor (1206) Pad jumper DESCRIPTION R21 R22, R23 1 2 124Ω ±1% resistor (1206) 1kΩ resistor (1206) R24 1 47kΩ resistor (1206) iButton is a registered trademark of Maxim Integrated Products, Inc. Network Boot Jumper (J3) 1-2 QTY R16 R19 R20 10kΩ resistor (1206) BelFuse S558-5999-T7 T1 1 transformer MAX1692 PWM step-down U1 1 regulator Intel LXT972ALC Ethernet U3 1 PHY U4, U5, U6 3 Dialight 597-7741 LED U7 1 MAX560CAI transceiver DS2480B serial 1-Wire line U8 1 driver DS9502 ESD protection U9 1 diode 65HVD230D CAN U11 1 transceiver Y1 1 25.000MHz, HC49US Ferrite bead, Fair-Rite Z1, Z2, Z3 3 2512067007Y3 UNPOPULATED COMPONENTS J15 1 DS9094F iButton® Clip J18, J28, J29, 1 Not used J30 MAX1792EUA18 linear U2 1 regulator DS2408 1-Wire 8-channel U10 1 addressable switch U12 1 Not used JUMPERS (DSTINIs400) JUMPER DESIGNATION CONFIGURATION DS80C400 boots without sending loader information to serial port. 2 of 11 DSTINIs400/DSTINIs-00x Sockets Evaluation Board DSTINIs400 Ethernet Configuration Jumpers (J9, J10, J11) AUTONEGOTIATION SPEED (Mbps) 10 Disabled 100 100 Only Enabled 10/100 DUPLEX J9 J10 J11 Half Full Half Full Half Full/Half Half Only Full or Half 2-3 (L) 2-3 (L) 2-3 (L) 2-3 (L) 1-2 (H) 1-2 (H) 1-2 (H) 1-2 (H) 2-3 (L) 2-3 (L) 1-2 (H) 1-2 (H) 2-3 (L) 2-3 (L) 1-2 (H) 1-2 (H) 2-3 (L) 1-2 (H) 2-3 (L) 1-2 (H) 2-3 (L) 1-2 (H) 2-3 (L) 1-2 (H) PIN HEADERS CONNNECTOR DESCRIPTION J18 Recreated I/O Port. Latched from 1-Wire bus. Requires installation of DS2408. See schematic. J20 CAN Bus. See schematic for pinout. J21 J27 J28, J29, J30 SPI™ Bus. See schematic for pinout. Alternately provides connection to P5.4–P5.7 2 I C Bus. See schematic for pinout. Alternately provides connection to P1.0 and P1.1. Unused. No user-accessible pins available. QUICK START Recommended Equipment The sockets board requires an external power supply and cables as needed to access the desired features of the board. The 5V DC power supply is mandatory, but the other cables are required only if that feature is to be used. The specific example shown here is for a DSTINIm400#/DSTINIs400# system. Hardware: 5V DC Power Supply Input Voltage: per customer requirements Output Voltage: 5V DC ±10% Output Current: >150mA Polarization: Positive Center Output Plug Type: 2.5mm I.D. x 5.5mm O.D. x 12mm female (P-6) Example: Digi-Key (www.digikey.com) part number T309-P6P-ND (110V input), 5V DC power Ethernet Cable: Note: There are two types of Ethernet cable. For connection to a router or hub, use a standard "straight-through" Ethernet cable. For direct connection to an Ethernet port on the back of a PC, use a "crossover" Ethernet cable. A crossover cable is specially made for two-computer networking. These cables can be purchased from almost any computer or electronics store. Example (straight-through): Radio Shack (www.radioshack.com) Cat 5E (3ft) Network Cable, part number 2781763 Example (crossover): Radio Shack Cat 5E (3m) Crossover Cable, part number 278-2011 RS-232C Serial Cable (DB9 Male to DB9 Female): This cable is straight-through, not a null-modem (crossover). These cables can be purchased from any computer or electronics store. 3 of 11 DSTINIs400/DSTINIs-00x Sockets Evaluation Board Important Note Regarding U12 Component U12 is not placed on the product as supplied by Maxim, nor is it available for sale from Maxim. Inclusion of this component and related circuitry in the schematic is intended to demonstrate one method to add I/O expansion capability to the DSTINIs400, but the implementation details are left to the user; any modification of the product is not guaranteed or supported by Maxim. For more information on the possible uses of component U12, refer to Application Note 3664: Expanding TINI’s I/O Capability and Application Note 3412: TINIs400 External Serial Port Reference Design. MORE INFORMATION TINI platform details can be found at www.maxim-ic.com/TINI. The TINI Specification and Developer’s Guide (Addison-Welsey, 2001) is an invaluable resource when developing with the TINI platform. Download a free copy from our website at www.maxim-ic.com/TINIguide. ADDITIONAL RESOURCES For detailed information about the initial setup and use of the TINI platform, refer to Application Note 612: Getting Started with the TINIm400 (DS80C400) Verification Module at www.maxim-ic.com/AN612. DS80C400 Network Microcontroller Data Sheet: www.maxim-ic.com/DS80C400 DS80C410 Networked Microcontroller Data Sheet: www.maxim-ic.com/DS80C410 DS80C400 Evaluation Kit (DS80C400-KIT): www.maxim-ic.com/DS80C400-KIT DSTINIm400 Networked Microcontroller Evaluation Board: www.maxim-ic.com/DSTINIm400 DSTINIm410 Networked Microcontroller Evaluation Board: www.maxim-ic.com/DSTINIm410 Microcontroller Website: www.maxim-ic.com/microcontrollers SPI is a trademark of Motorola, Inc. 4 of 12 DSTINIs400/DSTINIs-00x Sockets Evaluation Board REVISION HISTORY REVISION DATE DESCRIPTION Updated the Component List. PAGES CHANGED 1, 2 100906 Replaced the Auto Negotiation Jumper (J9), 10/100Mb Ethernet Jumper (J10), and Full-Duplex Jumper (J11) sections with the DSTINIs400 Ethernet Configuration Jumpers (J9, J10, J11) section. 121406 Updated Ordering Information table and added note that the DSTINIm400 is only tested to prototype standards. 1 070507 Changed the DTR Reset Jumper (J4) to DTR Reset Jumper (J14) section. 2 061608 In the Component List, changed the description for C2, C4, C5, C6; added “(ceramic disk)” to C20, C21, C22 description. 1, 2 Added “#” to the end of DSTINIs400 references 3 1, 3 5 of 12 Maxim/Dallas Semiconductor cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim/Dallas Semiconductor product. No circuit patent licenses are implied. Maxim/Dallas Semiconductor reserves the right to change the circuitry and specifications without notice at any time. Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 © 2008 Maxim Integrated Products The Maxim logo is a registered trademark of Maxim Integrated Products, Inc. The Dallas logo is a registered trademark of Dallas Semiconductor Corporation. A B C D V33 VCC3 nRstIn CRS COL MDIO MDC RxD[3:0] RxEr RxDV RxClk TxD[3:0] TxClk TxEn nRstOut nRstIn A16 5 nPSEn A17 A20 A19 D[7:0] D6 D7 D5 D3 D4 D2 A0 D1 D0 P14 A3 P15 A2 A1 P13 4 P12 P16 P11 P17 P10 nRstOut 4 P10 P11 P12 P13 P14 P15 P16 P17 CRS TxEn COL RxEr R xDV MDC MDIO J1 TxD3 TxD2 TxD1 TxD0 DIMM144 TxClk R xClk RxD0 RxD1 RxD2 RxD3 P30 3 3 P31 P53 P32 nPCE1 nPCE3 P33 nPCE0 nPCE2 P52 P51 P50 A18 2 nCE2 nCE1 nCE0 P67 P66 2 A21 P66 P67 P50 P51 P52 P53 P33 P32 P31 P30 nCE7 nCE6 nCE5 nCE4 nCE3 Date: Size B Title Wednesday, May 21, 2003 Document Number TINIs400 Local1W 1 Sheet TINIm400 Socket Board: TINI Module Connector V50 nCE[7:3] Copyright (C) 2003 Dallas Semiconductor / Maxim ALE nWr nRd nPCE[3:0] 1 1 of 7 Rev C 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 5 GND1 GND2 VCC3 VCC4 A13 nRstIn A16 nRam2En A15 A8 A14 A9 A17 A11 A20 nPSEN A19 A10 D6 D7 D5 D3 D4 nFlashEn D2 A0 D1 A4 D0 P1.4 A3 P1.5 A2 nRam1En A1 P1.3 A12 P1.2 P1.6 P1.1 P1.7 P1.0 nRstOut nEA CRS TxEn COL RxEr RxDV MDC MDIO GND52 GND53 TxD.3 TxD.2 TxD.1 TxD.0 GND58 GND59 TxClk RxClk GND62 GND63 RxD.0 RxD.1 RxD.2 RxD.3 GND68 GND69 NC70 P3.0 ALE P3.1 P5.3 P3.2 nPCE1 NC77 nPCE3 P3.3 nPCE0 NC81 nPCE2 nWr NC84 nRd NC86 P5.2 NC88 NC89 NC90 NC91 NC92 NC93 NC94 P5.1 P5.0 A18 nCE3 nCE2 nCE1 nCE0 P6.7 P6.6 A21 nCE7 nCE6 nCE5 nCE4 A5 NC109 A6 NC112 A7 NC114 NC115 Local1W NC117 vPullup NC119 NC120 NC121 NC122 NC123 NC124 NC125 NC126 NC127 NC128 NC129 NC130 NC131 NC132 NC133 NC134 NC135 NC136 NC137 NC138 NC139 NC140 VCC141 VCC142 GND143 GND144 A B C D A B C D 1.0uF C10 V33 5 J2 87-72010-004 3 2 1 Center Positive 1 2 3 4 5 VDC +-5% INPUT MALE 2MM POWER JACK 5 OUT1 OUT2 SET GND 1N5908 MAX1792EUA18 IN1 IN2 RST SHDN U2 VCC5 D1 V50 8 7 6 5 P52 0.1 uF C3 4 4 C2 BSS84 VCC3 V18 0.22 uF C8 C11 4.7uF 47uF Q1 + 6 4 7 8 1 10 K R3 LIM REF SYNC/PWM SHDN IN U1 P32 GND 3 PGND 10 BP FB LX 2 5 9 VCC3 3 3Pin R1 205K 1% 47 pF C1 + + 47uF C5 Date: Size A Title P17 2 Thursday, May 22, 2003 47uF C6 1 2 2Pin J3 Sheet 1 2 2 2Pin 1 J5 of CONNECT FOR QUIET BOOT TINIm400 Socket Board: Power and Internals Document Number TINIs400 + VCC3 1 CONNECT FOR NET BOOT P53 47uF C4 Bead Z1 Copyright (C) 2003 Dallas Semiconductor / Maxim 3Pin 2 R2 121K 1% EXTERNAL INTERRUPT J4 1 2 3 C9 0.1 uF 22 uH L1 DIAGNOSTIC PORT J6 3 2 1 nExtInt MAX1692 3 V33 7 Rev C 0.1 uF C7 A B C D A B C D nRstOut RxD[3:0] MDC MDIO COL CRS RxDV RxClk RxEr TxD[3:0] TxEn TxClk 0.1 uF 0.01 uF 5 C26 10 K R16 C25 VCC3 VCC3 Option R25 Rx D3 Rx D2 Rx D1 Rx D0 5 6 12 43 42 62 63 3 64 4 39 49 52 53 45 46 47 48 R13 47 TxD3 TxD2 TxD1 TxD0 56 55 54 60 59 58 57 0.1 uF 0.01 uF R9 47 C13 SLEW0 SLEW1 ADDR0 MDC MDIO COL CRS MDDIS MDINT RESET PWRDWN RX_DV RX_CLK RX_ER RXD3 RXD2 RXD1 RXD0 TX_EN TX_CLK TX_ER TXD3 TXD2 TXD1 TXD0 VCC3 Z3 BEAD LXT972ALC U3 TPOP TPON TPIP TPIN XI XO TDI TDO TMS TCK TRST PAUSE RBIAS LED_CFG1 LED_CFG2 LED_CFG3 8 40 VCCIO1 VCCIO2 C12 4 51 VCCD 0.01 uF C27 0.01 uF C29 4 DECOUPLING CAPS FOR U2 0.1 uF C28 GND1 GND2 GND3 GND4 GND5 GND6 GND7 GND8 GND9 GND10 GND11 GND12 GND13 7 11 13 14 15 16 18 32 25 26 41 50 61 5 21 22 VCCA1 VCCA2 TEST0 TEST1 34 35 3 0 Ohm R19 27 pF 27 pF A_Gnd 49.9 1% C24 25.000 MHz Y1 22.1 K 1% R14 C18 270 pF R10 R8 49.9 1% C15 0.1 uF C23 0.1 uF C30 1 2 27 28 29 30 31 33 17 38 37 36 19 20 23 24 C16 270 pF BEAD A_Gnd C14 0.01 uF Z2 3 220 R18 220 R17 220 R15 A_Gnd 8 9 A_Gnd 2 3 1 4 597-7741 U6 3 4 3 2 2 597-7741 U5 597-7741 U4 C20 VCC3 VCC3 VCC3 0.001 uF, 2 kV 1 4 1 C19 0.01 uF S558_5999_T7 7 3 6 2 1 10 14 11 15 16 T1 1 2 3 1 2 3 1 2 3 3 Pin J11 3 Pin J10 3 Pin J9 Date: Size A 2 Wednesday, May 21, 2003 Document Number TINIs400 TINIm400 Socket Board: Ethernet RJ-45 J7 J8 Pad Sheet 3 1 of 7 Rev C PHY MODE CONFIGURATION PHY MODE CONFIGURATION PHY MODE CONFIGURATION 1 0.001 uF, 2 kV C22 49.9 1% 49.9 1% R7 49.9 1% 1 2 3 4 5 6 7 8 R12 R6 49.9 1% 1 R11 R5 49.9 1% 0.001 uF, 2 kV C21 R4 49.9 1% 10/100-BASE-T ETHERNET Copyright (C) 2003 Dallas Semiconductor / Maxim Title 0.01 uF C17 2 A B C D A B C 20 21 8 RTS4 TX4 RX0 22 19 CTS4 DC D4 nRstIn 5 C32 1 uF R5OUT R4OUT R3OUT R2OUT R1OUT T4IN T3IN T2IN 4 12 C1+ U7 MAX560CAI 14 C1- T1IN 13 V+ PAD JUMPER J14 26 RX4 5 6 DTR4 DTR0 7 TX0 CONNECT TO ENABLE RESET FROM DTR P14 P33 P66 P30 P67 P16 P15 P31 C34 1 uF nShDn + 11 VCC GND 10 D + 4 24 25 EN SHDN + C35 1 uF C36 1 uF 47K R20 R5IN R4IN R3IN R2IN R1IN T4OUT T3OUT T2OUT T1OUT 15 C2+ V- 17 5 + 16 C218 23 27 4 9 28 1 2 3 4 5 6 7 8 9 1 2 3 4 5 6 7 8 9 J13 J12 Date: Size A Title 2 Wednesday, May 21, 2003 Document Number TINIs400 Sheet 1 4 1 of 7 DB9 MALE (DTE) SERIAL PORT 4 Rev C DB9 FEMALE (DCE) SERIAL PORT 0 TINIm400 Socket Board: Internal Serial Ports 0 and 4 Copyright (C) 2003 Dallas Semiconductor / Maxim CTS4_232 TX4_232 DCD4_232 RX4_232 RTS4_232 1 C33 0.01uF TX0_232 RX0_232 DTR0_232 DTR4_232 3 1 uF C31 2 3 2 + VCC3 3 A B C D A B C D nExtInt P12 P13 5 Pad Jumper J17 RX1 TX1 0.01 uF C37 RXD TXD POL DS2480B 8 7 6 U8 4 VDD GND 1 5 4 NC OWIO 3 2 5 BAT54 D2 VPP 4 + 47uF C39 VCC5 4 NC1 NC15 NC16 3 P0 P1 P2 P3 P4 P5 P6 P7 STRB VCC5 OWIO U10 DS2408 1 15 16 0.1 uF C38 Local1W 3 3 VCC GND 5 10 2 14 13 12 11 9 8 7 1 2 3 4 5 6 7 8 9 10 11 11x1 J18 C2 A2 NC2 DS9502 A1 NC1 C1 U9 8 I/O LINES WITH STROBE 2 3 1 I-BUTTON CLIP 5 4 6 Date: Size A Title VCC5 1 2 3 4 5 6 2 Wednesday, May 21, 2003 Document Number TINIs400 Sheet RJ11 J16 5 1 of 7 Rev C EXTERNAL 1-WIRE 1 TINIm400 Socket Board: External 1-Wire Interface and DS2408 Copyright (C) 2003 Dallas Semiconductor / Maxim XOWIO DS9094F J15 2 A B C D A B C nPCE[3:0] 5 Pad Jumper J26 nPCE0 nPCE1 nPCE2 nPCE3 10K R24 1 3 5 7 4 J21 4x2 SPI 4 V33 nShDn 2 4 6 8 V50 V33 P51 P50 3 P11 P10 VCC3 J22 4 C0RX 1 SCLK SDA 5 1 D3 BAT54S RS CANL CANH 8 6 7 1 D4 J24 124 R21 J19 J25 R23 1K VCC5 BAT54S 2 VCC5 VCC5 Date: Size A Title 2 Wednesday, May 21, 2003 Document Number TINIs400 TINIm400 Socket Board: Other I/O Sheet 1 I2C BUS J27 1 2 3 4 6 1 of 7 Rev C 4 HEADER PINS, 0.1" VCC5 5x2 CAN BUS J20 1 2 3 4 5 6 7 8 9 10 CONNECT TO TERMINATE Copyright (C) 2003 Dallas Semiconductor / Maxim 2 2 VCC3 VCC5 VCC5 SN65HVD230 VCC3 3 J23 R22 1K VREF RXD TXD U11 0.1 uF C40 C0TX 3 3 VCC GND 2 D 5 3 A B C D A B C D ALE nRd D7 D6 D5 D4 D3 D2 D1 D0 20 Pin dual J29 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 100nF V33 C49 nCE7 nCE6 nCE5 nCE4 nCE3 10nF UIO0 UIO1 UIO2 UIO3 5 V33 4 P17 nExtInt A17 A19 A21 A1 A3 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 nRstOut XIO0 XIO1 One 10 nF ceramic capacitor XIO2 for each U1 V18 connection XIO3 V18 XIO4 XIO5 XIO6 C53 C54 XIO7 XIO8 10nF 10nF XIO9 XIO10 XIO11 XIO12 XIO13 XIO14 XIO15 Expanded I/O nCE[7:3] nWr D[7:0] nPSEn 100nF 100nF C48 100nF One 100 nF ceramic capacitor for each U1 V33 connection C47 C46 100nF 100nF IO1 IO2 IO3 IO4 VAUX IO6 IO7 IO8 IO9 IO10 IO11 IO12 IO13 IO14 IO15 IO16 IO17 IO18 IO19 Vxx GND21 IO22 IO23 IO24 GND P53 A16 A18 A20 A0 A2 UIO4 A3 A2 A1 C43 A0 C42 UIO32 XIO15 XIO14 UIO31 XIO13 UIO30 UIO29 UIO28 UIO27 U12 XC2C64-7VQ100C A21 A20 A19 A18 A17 C41 XIO12 XIO11 XIO10 A16 V33 3 3 UIO5 XIO0 4 XIO1 5 TDO XIO9 UIO26 XIO8 UIO25 UIO24 UIO23 UIO22 100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76 TDO 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51 8Pin J30 2 4 6 8 V18 2 100nF 100nF UIO11 UIO10 XIO2 UIO9 UIO8 UIO14 UIO13 XIO3 UIO12 UIO17 UIO16 XIO6 XIO5 UIO15 XIO4 10nF 10nF 10nF C52 Date: Size A Title 10nF C55 2 Wednesday, May 21, 2003 Document Number DSTINIs400 Programmable I/O UIO17 UIO18 UIO19 UIO20 UIO21 UIO22 UIO23 UIO24 UIO25 UIO26 UIO27 UIO28 UIO29 UIO30 UIO31 UIO32 UIO0 UIO1 UIO2 UIO3 UIO4 UIO5 UIO6 UIO7 UIO8 UIO9 UIO10 UIO11 UIO12 UIO13 UIO14 UIO15 UIO16 10nF C56 Sheet 7 10nF C57 1 of J28 7 Rev C 40 Pin dual 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 User I/O One 10 nF ceramic capacitor for each U1 V33 connection C51 C50 V33 C45 UIO21 XIO7 UIO20 UIO19 UIO18 1 One 100 nF ceramic capacitor for each U1 V18 connection C44 V18 Copyright (C) 2003 Dallas Semiconductor / Maxim 1 3 5 7 UIO7 UIO6 GND4 IO74 IO73 IO72 IO71 IO70 GND3 IO68 IO67 IO66 IO65 IO64 IO63 GND2 IO61 IO60 IO59 IO58 V18b IO56 IO55 IO54 IO53 IO52 VIO2 GND6 IO99 VIO4 IO97 IO96 IO95 IO94 IO93 IO92 IO91 IO90 IO89 VIO3 IO87 IO86 IO85 GND5 TDO IO82 IO81 IO80 IO79 IO78 IO77 IO76 V18a IO27 IO28 IO29 IO30 GND1 IO32 IO33 IO34 IO35 IO36 IO37 VIO1 IO39 IO40 IO41 IO42 IO43 IO44 TDI IO46 TMS TCK IO49 IO50 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 A B C D