FTP02N65 FTA02N65 N-Channel MOSFET Applications: • Adaptor • Charger • SMPS Standby Power • LCD Panel Power VDSS RDS(ON) (Max.) ID 650V 5.0 Ω 2.0A Features: D • Lead Free • Low ON Resistance • Low Gate Charge • Peak Current vs Pulse Width Curve • Inductive Switching Curves G Ordering Information PART NUMBER PACKAGE BRAND FTP02N65 TO-220 FTP02N65 FTA02N65 TO-220F FTA02N65 Absolute Maximum Ratings Symbol Parameter Drain-to-Source Voltage ID Continuous Drain Current TO-220F Not to Scale FTP02N65 (NOTE *1) FTA02N65 S Continuous Drain Current IDM Pulsed Drain Current, VGS@ 10V Units 650 2.0 ID@ 100 C PD TO-220 Not to Scale G D S TC=25 oC unless otherwise specified VDSS o G D S V 2.0* Figure 3 (NOTE *2) Power Dissipation o Derating Factor above 25 C VGS Gate-to-Source Voltage EAS Single Pulse Avalanche Engergy L=38 mH, ID=2.1 Amps IAS Pulsed Avalanche Rating dv/dt Peak Diode Recovery dv/dt TL TPKG Maximum Temperature for Soldering Leads at 0.063in (1.6mm) from Case for 10 seconds Package Body for 10 seconds TJ and TSTG Operating Junction and Storage Temperature Range A Figure 6 54 21 W 0.43 0.17 W/ C o ± 30 V 84 mJ Figure 8 (NOTE *3) 3.0 300 260 V/ns o C -55 to 150 *Drain Current limited by Maximum Junction Temperature. Caution: Stresses greater than those listed in the “Absolute Maximum Ratings” Table may cause permanent damage to the device. Thermal Resistance Symbol Parameter FTP02N65 FTA02N65 RθJC Junction-to-Case 2.3 6.0 RθJA Junction-to-Ambient 62 62 ©2006 InPower Semiconductor Co., Ltd. Units o C/W Test Conditions Water cooled heatsink, PD adjusted for o a peak junction temperature of +150 C. 1 cubic foot chamber, free air. FTP02N60/FTA02N60 REV. A. April. 2006 OFF Characteristics Symbol o TJ=25 C unless otherwise specified Parameter BVDSS Drain-to-Source Breakdown Voltage ∆BVDSS /∆ TJ BreakdownVoltage Temperature Coefficient, Figure 11. IDSS IGSS Min. Typ. Max. Units Test Conditions 650 -- -- V -- 0.7 -- V/ C VGS=0V, ID=250µA o Reference to 25 C, ID=250µA -- -- 25 o Drain-to-Source Leakage Current µA -- -- 250 Gate-to-Source Forward Leakage -- -- 100 Gate-to-Source Reverse Leakage -- -- -100 ON Characteristics Parameter RDS(ON) Static Drain-to-Source On-Resistance Figure 9 and 10. VGS(TH) Gate Threshold Voltage, Figure 12. gfs Forward Transconductance Dynamic Characteristics VGS=+30V VGS= -30V Min. Typ. Max. Units Test Conditions -- 4.0 5.0 Ω 2.0 -- 4.0 V VGS=10V, ID=1.2A (NOTE *4) VDS=VGS, ID=250µA -- 2.5 -- S VDS=15V, ID=2.0A (NOTE *4) Essentially independent of operating temperature Parameter Min. Typ. Max. Ciss Input Capacitance -- 330 -- Coss Output Capacitance -- 46 -- Crss Reverse Transfer Capacitance -- 9.0 -- Qg Total Gate Charge -- 12.5 -- Qgs Gate-to-Source Charge -- 2.2 -- Qgd Gate-to-Drain (“Miller”) Charge -- 6.0 -- Resistive Switching Characteristics Symbol VDS=520V, VGS=0V o TJ=125 C TJ=25 oC unless otherwise specified Symbol Symbol nA VDS=650V, VGS=0V Parameter pF nC Test Conditions VGS=0V VDS=25V f =1.0MHz Figure 14 VDD=325V ID=2.0A Figure 15 Essentially independent of operating temperature Min. Typ. Max. td(ON) Turn-on Delay Time -- 13 -- trise Rise Time -- 13 -- td(OFF) Turn-Off Delay Time -- 34 -- tfall Fall Time -- 26 -- ©2006 InPower Semiconductor Co., Ltd. Units Units Test Conditions VDD=325V ns ID=2.0A VGS=10V RG=18Ω FTP02N60/FTA02N60 REV. A . April. 2006 Page 2 of 9 Source-Drain Diode Characteristics Symbol o Tc=25 C unless otherwise specified Parameter Min. Typ. Max. Units Test Conditions IS Continuous Source Current (Body Diode) -- -- 2.0 A ISM Maximum Pulsed Current (Body Diode) -- -- 8.0 A Integral pn-diode in MOSFET VSD Diode Forward Voltage -- -- 1.5 IS=2.0A, VGS=0V trr Reverse Recovery Time -- 172 258 V ns Qrr Reverse Recovery Charge -- 0.75 1.13 µC IF=2.0A, di/dt=100 A/µs VGS=0V Notes: *1. TJ = +25 oC to +150 oC. *2. Repetitive rating; pulse width limited by maximum junction temperature. *3. ISD= 2.0A di/dt < 100 A/µs, VDD < BVDSS, TJ=+150 oC. *4. Pulse width < 380µs; duty cycle < 2%. ©2006 InPower Semiconductor Co., Ltd. FTP02N60/FTA02N60 REV. A . April. 2006 Page 3 of 9 Figure 1. Maximum Effective Thermal Impedance, Junction-to-Case Duty Factor ZθJC, Thermal Impedance (Normalized) 1.000 50% 20% 10% 0.100 PDM 5% 2% t1 1% 0.010 t2 NOTES: DUTY FACTOR: D=t1/t2 PEAK TJ=PDM x ZθJC x RθJC+TC single pulse 0.001 1E-05 1E-04 1E-03 1E-02 1E-01 1E+00 1E+01 tp, Rectangular Pulse Duration (s) Figure 2. Maximum Power Dissipation vs Case Temperature Figure 3. Maximum Continuous Drain Current vs Case Temperature 2.5 50 ID, Drain Current (A) PD, Power Dissipation (W) 60 40 30 20 10 2.0 1.5 1.0 0.5 0 0 25 50 75 125 100 25 150 50 TC, Case Temperature ( C) V = 15 V GS 6.0V VGS = VGS = 5.5V 3 VGS = 5.25V 2 VGS = 5.0V 1 VGS = 4.5V RDS(ON), Drain-to-Source ON Resistance (Ω) ID, Drain Current (A) 10 PULSE DURATION = 250 µS DUTY FACTOR = 0.5% MAX TC = 25 oC 4 100 125 150 Figure5. Typical Drain-to-Source ON Resistance vs Gate Voltage and Drain Current Figure 4. Typical Output Characteristics 5 75 TC, Case Temperature (oC) o PULSE DURATION = 250 µS DUTY FACTOR = 0.5% MAX TC = 25 oC 9 8 ID = 2A ID = 1A 7 6 5 4 3 0 0 5 10 15 20 VDS, Drain-to-Source Voltage (V) ©2006 InPower Semiconductor Co., Ltd. 25 4 5 6 7 8 9 10 11 12 13 14 15 VGS, Gate-to-Source Voltage (V) FTP02N60/FTA02N60 REV. A . April. 2006 Page 4 of 9 Figure 6. Maximum Peak Current Capability IDM, Peak Current (A) 100 TRANSCONDUCTANCE MAY LIMIT CURRENT IN THIS REGION FOR TEMPERATURES ABOVE 25 oC DERATE PEAK CURRENT AS FOLLOWS: I = I 25 150 – T C --------------------125 10 VGS = 10V 1 1E-6 10E-6 100E-6 1E-3 10E-3 100E-3 1E+0 10E+0 tp, Pulse Width (s) Figure 8. Unclamped Inductive Switching Capability Figure 7. Typical Transfer Characteristics 6 10.0 PULSE DURATION = 250 µs DUTY CYCLE = 0.5% MAX VDS = 10 V IAS, Avalanche Current (A) ID, Drain-to-Source Current (A) 7 5 4 3 2 +150 oC +25 oC 1 -55 oC STARTING TJ = 25 oC 1.0 STARTING TJ = 150 oC If R= 0: tAV= (L×IAS)/(1.3BVDSS-VDD) If R≠ 0: tAV= (L/R) ln[IAS×R)/(1.3BVDSS-VDD)+1] R equals total Series resistance of Drain circuit 0 2.5 3.0 3.5 4.0 4.5 5.0 6.0 5.5 0.1 1E-6 6.5 10E-6 10 V 6 GS RDS(ON), Drain-to-Source Resistance (Normalized) RDS(ON), Drain-to-Source ON Resistance (Ω) V = 10V GS = 20V 5 4 3 2 1 0 1 2 3 100E-3 2.6 2.4 PULSE DURATION = 2 µs DUTY CYCLE = 0.5% MAX TC=25°C 7 10E-3 Figure 10. Typical Drain-to-Source ON Resistance vs Junction Temperature Figure 9. Typical Drain-to-Source ON Resistance vs Drain Current 8 1E-3 tAV, Time in Avalanche (s) VGS, Gate-to-Source Voltage (V) 9 100E-6 4 5 ID, Drain Current (A) ©2006 InPower Semiconductor Co., Ltd. 6 7 8 2.2 2.0 1.8 1.6 1.4 1.2 1.0 0.8 0.6 PULSE DURATION = 250 µs DUTY CYCLE = 0.5% MAX VGS = 10V, ID = 2.0A 0.4 0.2 -75 -50 -25 0 25 50 75 100 125 150 TJ, Junction Temperature (oC) FTP02N60/FTA02N60 REV. A . April. 2006 Page 5 of 9 Figure 12. Typical Threshold Voltage vs Junction Temperature 1.15 1.2 VGS(TH), Threshold Voltage (Normalized) BVDSS, Drain-to-Source Breakdown Voltage (Normalized) Figure 11. Typical Breakdown Voltage vs Junction Temperature 1.10 1.05 1.00 0.95 VGS = 0V ID = 250 µA 0.90 -75 -50 -25 0.0 25 50 75 100 125 1.1 1.0 0.9 0.8 VGS = VDS ID = 250 µA 0.7 -75 150 -50 Figure 13. Maximum Forward Bias Safe Operating Area Figure 14. 25 50 75 100 125 150 Typical Capacitance vs Drain-to-Source Voltage 1000 10.0 Single Pulse 1. 0m 10 1.0 OPERATION IN THIS AREA MAY BE LIMITED BY R DS(ON) m C, Capacitance (pF) 10µs 10 0µ s TJ = MAX RATED TC = 25 oC s s Ciss 100 Coss 10 DC 0.1 VGS = 0V, f = 1MHz Ciss = Cgs + Cgd Coss ≅ Cds + Cgd Crss = Cgd Crss 1 10 1 1000 100 0.1 1 Figure 15. 10 100 1000 VDS, Drain Voltage (V) VDS, Drain-to-Source Voltage (V) Typical Gate Charge vs Gate-to-Source Voltage Figure 16. Typical Body Diode Transfer Characteristics 12 40 ISD, Reverse Drain Current (A) VGS, Gate-to-Source Voltage (V) 0.0 TJ, Junction Temperature ( C) TJ, Junction Temperature ( C) ID, Drain Current (A) -25 o o 10 VDS = 163V VDS = 325V VDS = 488V 8 6 4 2 ID = 2.0A 0 35 30 25 20 15 +150 oC o +25 C 10 -55 oC 5 VGS = 0V 0 0 2 4 6 8 10 12 QG , Total Gate Charge (nC) ©2006 InPower Semiconductor Co., Ltd. 14 16 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 VSD, Source-to-Drain Voltage (V) FTP02N60/FTA02N60 REV. A . April. 2006 Page 6 of 9 Test Circuits and Waveforms VDS ID ID VDS VGS Miller Region VGS VDD D.U.T. VGS(TH) 1 mA Qgs Qgd Qg Figure 17. Gate Charge Test Circuit Figure 18. Gate Charge Waveform VDS RL 90% VDS VGS RG VDD D.U.T. 10% VGS td(ON) Figure 19. Resistive Switching Test Circuit ©2006 InPower Semiconductor Co., Ltd. trise td(OFF) tfall Figure 20. Resistive Switching Waveforms FTP02N60/FTA02N60 REV. A . April. 2006 Page 7 of 9 Test Circuits and Waveforms di/dt adj. Current Pump ID Double Pulse di/dt = 100A/µA VDD D.U.T. Qrr L trr ID Figure 22. Diode Reverse Recovery Waveform Figure 21. Diode Reverse Recovery Test Circuit BVDSS L Series Switch (MOSFET) IAS BVDSS VDD D.U.T. Commutating Diode VGS 50Ω VDD 0 tAV IAS VGS tp I 2L E AS = AS 2 Figure 23. Unclamped Inductive Switching Test Circuit ©2006 InPower Semiconductor Co., Ltd. Figure 24. Unclamped Inductive Switching Waveforms FTP02N60/FTA02N60 REV. A . April. 2006 Page 8 of 9 Disclaimers: InPower Semiconductor Co., Ltd (IPS) reserves the right to make changes without notice in order to improve reliability, function or design and to discontinue any product or service without notice. Customers should obtain the latest relevant information before orders and should verify that such information is current and complete. All products are sold subject to IPS’s terms and conditions supplied at the time of order acknowledgement. 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Life support devices or systems are devices or systems which: a. are intended for surgical implant into the human body, b. support or sustain life, c. whose failure to perform when properly used in accordance with instructions for used provided in the labeling, can be reasonably expected to result in significant injury to the user. 2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. ©2006 InPower Semiconductor Co., Ltd. FTP02N60/FTA02N60 REV. A . April. 2006 Page 9 of 9