HITACHI HAT1043M

HAT1043M
Silicon P Channel Power MOS FET
Power Switching
ADE-208-754D (Z)
5th Edition
February 1999
Features
•
•
•
•
Low on-resistance
Low drive current
High density mounting
2.5 V gate drive device can be driven from 3 V source
Outline
TSOP–6
4
5
6
1 2 5 6
D D D D
3
2
1
3
G
4
Source
3
Gate
1, 2, 5, 6 Drain
S
4
HAT1043M
Absolute Maximum Ratings (Ta = 25°C)
Item
Symbol
Ratings
Unit
Drain to source voltage
VDSS
–20
V
Gate to source voltage
VGSS
±12
V
Drain current
ID
–4.4
A
–17.6
A
–4.4
A
2.0
W
1.05
W
Drain peak current
I D(pulse)
Body-drain diode reverse drain current
Channel dissipation
I DR
Note 1
Note 2
Pch (pulse)
Note 2
Pch (continuous)
Note 3
Channel temperature
Tch
150
°C
Storage temperature
Tstg
–55 to +150
°C
Note:
1. PW ≤ 10 µs, duty cycle ≤ 1%
2. When using the alumina ceramic board (50 x 50 x 0.7 mm), PW ≤ 5 s, Ta = 25°C
3. When using the alumina ceramic board (50 x 50 x 0.7 mm), Ta = 25°C
Electrical Characteristics (Ta = 25°C)
Item
Symbol Min
Typ
Max
Unit
Test Conditions
Drain to source breakdown voltage V(BR)DSS
–20
—
—
V
I D = –10 mA, VGS = 0
Gate to source leak current
I GSS
—
—
±0.1
µA
VGS = ±12 V, VDS = 0
Zero gate voltege drain current
I DSS
—
—
–1
µA
VDS = –20 V, VGS = 0
Gate to source cutoff voltage
VGS(off)
–0.4
—
–1.4
V
I D = –1 mA, VDS = –10 V
Static drain to source on state
RDS(on)
—
55
65
mΩ
I D = –3 A, VGS = –4.5 V Note 1
—
85
110
mΩ
I D = –3 A, VGS = –2.5 V Note 1
resistance
Forward transfer admittance
|yfs|
4
7
—
S
I D = –3 A, VDS = –10 V Note 1
Input capacitance
Ciss
—
750
—
pF
VDS = –10 V
Output capacitance
Coss
—
310
—
pF
VGS = 0
Reverse transfer capacitance
Crss
—
220
—
pF
f = 1 MHz
Total Gate charge
Qg
—
11
—
nc
VDD = –10 V
Gate to Source charge
Qgs
—
2
—
nc
VGS = –4.5 V
Gate to Drain charge
Qgd
—
3.5
—
nc
I D = –4.4 A
Turn-on delay time
t d(on)
—
15
—
ns
VGS = –4.5 V, ID = –3 A
Rise time
tr
—
100
—
ns
RL = 3.3 Ω
Turn-off delay time
t d(off)
—
85
—
ns
Fall time
tf
—
100
—
ns
Body–drain diode forward voltage
VDF
—
–0.95
–1.23
V
I F = –4.4 A, VGS = 0
Body–drain diode reverse
recovery time
t rr
—
50
—
ns
I F = –4.4 A, VGS = 0
diF/ dt = –20 A/ µs
Note:
2
1. Pulse test
HAT1043M
Main Characteristics
Power vs. Temperature Derating
Maximum Safe Operation Area
-100
I D (A)
1.5
1.0
0.5
0
50
100
150
200
Ambient Temperature Ta (°C)
Test Condition
When using the alumina ceramic board
(50x50x0.7mm),(PW ≤ 5s)
-30
10 µs
-10
PW
-3
Drain Current
Channel Dissipation
Pch (W)
2.0
DC
Op
er
-1
=
1
10
ati
on
ms
100 µs
m
s
(1
sh
(P
ot)
W
-0.3 Operation in
≤5
s)
this area is
No
-0.1 limited by R
te
DS(on)
1
-0.03 Ta = 25°C
1 shot pulse
-0.01
-3
-0.1 -0.3
-1
-10 -30 -100
Drain to Source Voltage V DS (V)
Note 1 When using the alumina ceramic board
( 50x50x0.7mm)
Typical Output Characteristics
Typical Transfer Characteristics
-10
-10
Pulse Test
(A)
-3 V
-2.5 V
-6
-2 V
ID
-8
V DS = -10 V
Pulse Test
-4 V
Drain Current
Drain Current
I D (A)
-10 V
-4
-2
-8
-6
-4
-2
0
-2
-4
-6
Drain to Source Voltage
-8
-10
V DS (V)
Tc = –25°C
75°C
VGS = -1.5 V
25°C
0
-1
-2
-3
Gate to Source Voltage
-4
-5
V GS (V)
3
HAT1043M
Pulse Test
-0.4
-0.3
I D = -5 A
-0.2
-2 A
-0.1
-1 A
0
-12
-4
-8
Gate to Source Voltage
Static Drain to Source on State Resistance
R DS(on) (mΩ )
200
100
4
I D = -5 A
-2.5 V
-5 A
-1, -2 A
-1, -2 A
50
VGS = -4.5 V
0
–50
0
50
100
150
200
Case Temperature Tc (°C)
VGS = -2.5 V
100
50
-4.5 V
20
10
-0.1 -0.2
-16
-20
V GS (V)
Static Drain to Source on State Resistance
vs. Temperature
250
Pulse Test
150
200
-0.5 -1 -2
-5 -10 -20
Drain Current I D (A)
Forward Transfer Admittance vs.
Drain Current
Forward Transfer Admittance |y fs | (S)
Drain to Source Saturation Voltage
V DS(on) (V)
-0.5
Static Drain to Source on State Resistance
vs. Drain Current
1000
Pulse Test
500
Drain to Source On State Resistance
R DS(on) (mΩ )
Drain to Source Saturation Voltage vs.
Gate to Source Voltage
50
20
V DS = -10 V
Pulse Test
10
Tc = –25 °C
5
25 °C
2
1
75 °C
0.5
0.2
0.1
-0.1
-0.3
-1
-3
-10
Drain Current I D (A)
-30 -50
HAT1043M
Body–Drain Diode Reverse
Recovery Time
Typical Capacitance vs.
Drain to Source Voltage
3000
VGS = 0
f = 1 MHz
200
100
50
20
10
-0.1
1000
Capacitance C (pF)
Reverse Recovery Time trr (ns)
500
Ciss
30
10
0
-0.2 -0.5 -1
-2
-5
-10
Reverse Drain Current I DR (A)
-30
-40
-50
0
V DS
V DD = - 5 V
-10 V
-20 V
I D = -4.4 A
4
8
12
16
Gate Charge Qg (nc)
-4
V GS
-6
-8
-10
20
-8
-12
-16
-20
Switching Characteristics
500
Switching Time t (ns)
-20
-2
V GS (V)
-10
1000
Gate to Emitter Voltage
V DS (V)
Collector to Emitter Voltage
0
-4
Drain to Source Voltage V DS (V)
Dynamic Input Characteristics
V DD = - 5 V
-10 V
-20 V
Crss
100
di / dt = 20 A / µs
V GS = 0, Ta = 25 °C
0
Coss
300
tr
200
tf
100
50
t d(off)
t d(on)
20
10
-0.1 -0.2
V GS = -4.5 V, V DD = -10 V
PW = 5 µs, duty < 1 %
-0.5
-1
-2
Drain Current
-5
-10 -20
I D (A)
5
HAT1043M
Reverse Drain Current vs.
Source to Drain Voltage
(A)
-10
Reverse Drain Current I F
-8
-5 V
-6
V GS = 0, 5 V
-4
-2
Pulse Test
0
-0.4
-0.8
-1.2
-1.6
Source to Drain Voltage
V SDF (V)
Switching Time Test Circuit
Switching Time Waveform
Vout
Monitor
Vin Monitor
-2.0
Vin
10%
D.U.T.
RL
90%
Vin
10 V
50Ω
V DD
= 10 V
Vout
td(on)
6
90%
90%
10%
10%
tr
td(off)
tf
HAT1043M
Normalized Transient Thermal Impedance vs. Pulse Width
Normalized Transient Thermal Impedance
γ s (t)
10
1
D=1
0.5
0.2
0.1
0.1
0.05
0.02
θ ch – f(t) = γ s (t) • θ ch – f
θ ch – f = 119 °C/W, Ta = 25 °C
When using the alumina ceramic board
(50x50x0.7 mm)
0.01 0.01
0.001
e
uls
p
ot
h
1s
PDM
D=
PW
T
PW
T
0.0001
10 µ
100 µ
1m
10 m
100 m
1
10
100
1000
10000
Pulse Width PW (S)
7
HAT1043M
Package Dimensions
Unit: mm
+ 0.10
1.0
1.0
2.8±0.2
0.6
0.15 – 0.05
0 ~ 0.1
0.6
1.6±0.15
0.3±0.1
0.9±0.1
0.2
2.95±0.15
8
Hitachi Code
EIAJ
JEDEC
TSOP-6
-
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received the latest product standards or specifications before final design, purchase or use.
3. Hitachi makes every attempt to ensure that its products are of high quality and reliability. However,
contact Hitachi’s sales office before using the product in an application that demands especially high
quality and reliability or where its failure or malfunction may directly threaten human life or cause risk
of bodily injury, such as aerospace, aeronautics, nuclear power, combustion control, transportation,
traffic, safety equipment or medical equipment for life support.
4. Design your application so that the product is used within the ranges guaranteed by Hitachi particularly
for maximum rating, operating supply voltage range, heat radiation characteristics, installation
conditions and other characteristics. Hitachi bears no responsibility for failure or damage when used
beyond the guaranteed ranges. Even within the guaranteed ranges, consider normally foreseeable
failure rates or failure modes in semiconductor devices and employ systemic measures such as failsafes, so that the equipment incorporating Hitachi product does not cause bodily injury, fire or other
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products.
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Copyright ' Hitachi, Ltd., 1999. All rights reserved. Printed in Japan.