HITACHI 2SJ450

2SJ450
Silicon P-Channel MOS FET
ADE-208-381
1st. Edition
Application
High speed power switching
Features
•
•
•
•
Low on-resistance.
Low drive power
High speed switching
2.5 V gate drive device.
Outline
UPAK
3
2 1
4
D
1. Gate
2. Drain
3. Source
4. Drain
G
S
2SJ450
Absolute Maximum Ratings (Ta = 25°C)
Item
Symbol
Ratings
Unit
Drain to source voltage
VDSS
–60
V
Gate to source voltage
VGSS
±20
V
Drain current
ID
–1
A
–2
A
–1
A
Drain peak current
I D(pulse)*
Drain peak current
I DR
1
2
Channel dissipation
Pch*
1
W
Channel temperature
Tch
150
°C
Storage temperature
Tstg
–55 to +150
°C
Notes: 1. PW ≤ 100 µs, duty cycle ≤ 10%
2. When using aluminium ceramic board (12.5 × 20 × 70 mm)
2
2SJ450
Electrical Characteristics (Ta = 25°C)
Item
Symbol
Min
Typ
Max
Unit
Test conditions
Drain to source breakdown
voltage
V(BR)DSS
–60
—
—
V
I D = –10 mA, VGS = 0
Gate to source breakdown
voltage
V(BR)GSS
±20
—
—
V
I G = ±100 µA, VDS = 0
Zero gate voltage drain current I DSS
—
—
–50
µA
VDS = –50 V, VGS = 0
Gate to source leak current
I GSS
—
—
±10
µA
VGS = ±16 V, VDS = 0
Gate to source cutoff voltage
VGS(off)
–0.5
—
–1.5
V
VDS = –10 V, ID = –1 mA
Static drain to source on state
resistance
RDS(on)
—
0.85
1.2
Ω
I D = –0.5 A
VGS = –4 V*1
Static drain to source on state
resistance
RDS(on)
—
1.1
1.9
Ω
I D = –0.3 A
VGS = –2.5 V*1
Fowerd transfer admittance
|yfs|
0.6
1.0
—
S
I D = –0.5 A
VDS = –10 V
Input capacitance
Ciss
—
150
—
pF
VDS = –10 V
Output capacitance
Coss
—
72
—
pF
VGS = 0
Reverse transfer capacitance
Crss
—
24
—
pF
f = 1 MHz
Turn-on delay time
t d(on)
—
6
—
ns
VGS = –10 V, ID = –0.5 A
Rise time
tr
—
9
—
ns
RL = 60 Ω
Turn-off delay time
t d(off)
—
50
—
ns
Fall time
tf
—
35
—
ns
Body to drain diode forward
voltage
VDF
—
–0.9
—
V
I F = –1 A, VGS = 0
Body to drain diode reverse
recovery time
t rr
—
100
—
ns
I F = –1 A, VGS = 0
diF/dt = 50A/µs
Note: 1. Pulse Test
Marking is "UY".
3
2SJ450
Maximum Safe Operation Area
Power vs. Temperature Derating
–10
–1.2
–2 V
–0.8
–0.4
VGS = –1.5 V
4
(A)
V DS = –10 V
Pulse Test
ID
I D (A)
Drain Current
–2.5 V
–1.6
0
–2.0
Pulse Test
–4 V
–3 V
–2
–4
–6
Drain to Source Voltage
–8
–10
V DS (V)
0.3
1
3
10
30
100
Drain to Source Voltage V DS (V)
Typical Transfer Characteristics
Drain Current
–2.0
Tc (°C)
Typical Output Characteristics
–10 V –6 V
s
m
Case Temperature
n
Ta = 25 °C
0.1
200
s
m
150
tio
100
10
Operation in
this area is
limited by R DS(on)
ra
pe
–0.1
–0.01
50
µs
–0.3
–0.03
0
1
I D (A)
0
–1
O
0.5
µs
=
1.0
10
–3
PW
Drain Current
1.5
C
D
Channel Dissipation
Test Condition :
When using the aliminium Ceramic
board (12.5 x 20 x 70 mm)
10
Pch (W)
2.0
–1.6
Tc = 75°C
–25°C
–1.2
25°C
–0.8
–0.4
0
–1
–2
–3
Gate to Source Voltage
–4
–5
V GS (V)
2SJ450
–1.6
I D = –1.5 A
–0.8
–1 A
–0.4
–0.5 A
Static Drain to Source on State Resistance
R DS(on) ( Ω)
0
–4
–2
–6
Gate to Source Voltage
8
I D = –1.5 A
4
V GS = –2.5 V
2
0
–40
–1.0 A
–0.5 A
1.5 A
–4 V –0.5 A –1.0 A
0
40
80
120
160
Case Temperature Tc (°C)
Static Drain to Source on State Resistance
vs. Drain Current
20
10
5
2
VGS = –2.5 V
1
0.5
–4 V
Pulse Test
0.2
–5
–0.1 –0.2 –0.5 –1 –2
Drain Current I D (A)
–8
–10
V GS (V)
Static Drain to Source on State Resistance
vs. Temperature
10
Pulse Test
6
Drain to Source On State Resistance
R DS(on) ( Ω )
–1.2
Pulse Test
–10
Forward Transfer Admittance vs.
Drain Current
Forward Transfer Admittance |yfs| (S)
V DS(on) (V)
–2.0
Drain to Source Voltage
Drain to Source Saturation Voltage vs.
Gate to Source Voltage
10
3
Tc = –25 °C
1
0.3
25 °C
75 °C
0.1
0.03
V DS = –10 V
Pulse Test
0.01
–1
–0.01 –0.03 –0.1 –0.3
–3
Drain Current I D (A)
–10
5
2SJ450
Body to Drain Diode Reverse
Recovery Time
500
500
Capacitance C (pF)
Reverse Recovery Time trr (ns)
1000
200
100
50
–60
–12
–80
–16
I D = –2 A
–100
0
2
4
Gate Charge
6
–8
V DD = –50 V
–25 V
–10 V
6
8
Qg (nc)
Crss
VGS = 0
f = 1 MHz
–10
–20
–30
–40
–50
Switching Characteristics
–20
10
V GS (V)
–4
V GS
V DS
20
200
0
100
Switching Time t (ns)
–40
Coss
50
Drain to Source Voltage V DS (V)
Gate to Source Voltage
V DS (V)
Drain to Source Voltage
–20
100
0
Dynamic Input Characteristics
V DD = –10 V
–25 V
–50 V
Ciss
5
10
–0.1 –0.2
–0.5 –1 –2
–5 –10
Reverse Drain Current I DR (A)
0
200
10
di / dt = 50 A / µs
V GS = 0, Ta = 25 °C
20
Typical Capacitance vs.
Drain to Source Voltage
50
20
t d(off)
tf
tr
10
t d(on)
5
2
–0.1 –0.2
V GS = –10 V, V DD = –30 V
duty < 1 %
–0.5
–1
Drain Current
–2
–5
I D (A)
–10
2SJ450
Reverse Drain Current I DR (A)
–2.0
Reverse Drain Current vs.
Source to Drain Voltage
Pulse Test
–1.6
–1.2
–5 V
V GS = 0, 5 V
–0.8
–0.4
0
–0.4
–0.8
–1.2
Source to Drain Voltage
–1.6
–2.0
V SD (V)
Avalanche Test Circuit and Waveform
Vout
Monitor
Vin Monitor
Vin
10%
D.U.T.
RL
90%
Vin
50Ω
–10 V
V DD
= –30 V
90%
90%
Vout
td(on)
10%
10%
tr
td(off)
tf
7
Unit: mm
1.5 1.5
3.0
0.44 Max
Hitachi Code
JEDEC
EIAJ
Weight (reference value)
(0.2)
(2.5)
(1.5)
(0.4)
0.53 Max
0.48 Max
1.5 ± 0.1
0.44 Max
2.5 ± 0.1
4.25 Max
φ1
0.8 Min
1.8 Max
0.4
4.5 ± 0.1
UPAK
—
Conforms
0.050 g
Cautions
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contact Hitachi’s sales office before using the product in an application that demands especially high
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traffic, safety equipment or medical equipment for life support.
4. Design your application so that the product is used within the ranges guaranteed by Hitachi particularly
for maximum rating, operating supply voltage range, heat radiation characteristics, installation
conditions and other characteristics. Hitachi bears no responsibility for failure or damage when used
beyond the guaranteed ranges. Even within the guaranteed ranges, consider normally foreseeable
failure rates or failure modes in semiconductor devices and employ systemic measures such as failsafes, so that the equipment incorporating Hitachi product does not cause bodily injury, fire or other
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