TI INA282AQDRDN

INA
INA282-Q1
28x
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SBOS554 – MARCH 2012
High-Accuracy, Wide Common-Mode Range, Bi-Directional
CURRENT SHUNT MONITOR
Zerø-Drift Series
Check for Samples: INA282-Q1
FEATURES
DESCRIPTION
•
•
The INA282-Q1 is a voltage output current shunt
monitor that can sense drops across shunts at
common-mode voltages from –14V to +80V,
independent of the supply voltage. The low offset of
the Zerø-Drift architecture enables current sensing
with maximum drops across the shunt as low as
10mV full-scale.
1
2
•
•
•
•
•
•
Qualified for Automotive Applications
AEC-Q100 Qualified With the Following
Results
– Device Temperature Grade 1: –40°C to
+125°C Ambient Operating Temperature
Range
– Device HBM ESD Classification Level H2
– Device CDM ESD Classification Level C3B
Wide Common-Mode Range: –14V to 80V
Offset Voltage: ±20 μV
CMRR: 140 dB
Accuracy:
– ±1.4% Gain Error (Max)
– 0.3μV/°C Offset Drift
– 0.005%/°C Gain Drift (Max)
Available Gains:
– 50V/V: INA282
– 100V/V: INA286
– 200V/V: INA283
– 500V/V: INA284
– 1000V/V: INA285
Quiescent Current: 900 μA (Max)
This current shunt monitor operates from a single
+2.7V to +18V supply, drawing a maximum of 900μA
of supply current. It is specified over the extended
operating temperature range of –40°C to +125°C, and
offered in an SOIC-8 package.
Supply
-14V to +80V
Load
+2.7V to +18V
+IN
1
V+
-IN
Æ2
Æ2
Æ2
Æ2
1
Æ1
APPLICATIONS
•
•
•
•
Telecom Equipment
Automotive
Power Management
Solar Inverters
Æ1
OUT
ZerÆDrift
GAIN
PRODUCT
50V/V
100V/V
200V/V
500V/V
1000V/V
INA282
INA286
INA283
INA284
INA285
33.3kW
33.3kW
Output
REF2
REF1
GND
1
2
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
All trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2012, Texas Instruments Incorporated
INA282-Q1
SBOS554 – MARCH 2012
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This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
PACKAGE/ORDERING INFORMATION (1)
PRODUCT
INA282AQDRQ1
INA282AQDRDN
(1)
GAIN
PACKAGE
PACKAGE
DESIGNATOR
50V/V
SOIC-8
D
PACKAGE
MARKING
282Q1
282DN
For the most current package and ordering information, see the Package Option Addendum located at the end of this data sheet, or see
the device product folder at www.ti.com.
ABSOLUTE MAXIMUM RATINGS (1)
Over operating free-air temperature range, unless otherwise noted.
VALUE
MIN
MAX
Supply voltage
Analog inputs,
V+IN, V–IN (2)
Differential (V+IN) – (V–IN)
(3)
Common-Mode
Ref1, Ref2, Out
(1)
(2)
(3)
V
–5
5
V
80
V
GND–0.3
(V+) + 0.3
V
5
mA
–65
150
°C
Junction temperature
ESD ratings
18
–14
Input current into any pin
Storage temperature
UNIT
Human Body Model (HBM) AEC-Q100 Classification Level H2
Charged-Device Model (CDM) AEC-Q100 Classification Level C3B
150
°C
2
kV
750
V
Stresses above these ratings may cause permanent damage. Exposure to absolute maximum conditions for extended periods may
degrade device reliability. These are stress ratings only, and functional operation of the device at these or any other conditions beyond
those specified is not implied.
V+IN and V–IN are the voltages at the +IN and –IN pins, respectively.
Input voltages must not exceed common-mode rating.
THERMAL INFORMATION
THERMAL METRIC (1)
INA282-Q1
D (8-PINS)
θJA
Junction-to-ambient thermal resistance
134.9
θJCtop
Junction-to-case (top) thermal resistance
72.9
θJB
Junction-to-board thermal resistance
61.3
ψJT
Junction-to-top characterization parameter
18.9
ψJB
Junction-to-board characterization parameter
54.3
θJCbot
Junction-to-case (bottom) thermal resistance
n/a
(1)
2
UNITS
°C/W
For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.
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ELECTRICAL CHARACTERISTICS
Boldface limits apply over the specified temperature range, TA = –40°C to 125°C.
At TA = +25°C, V+ = 5V, V+IN = 12V, VREF1 = VREF2 = 2.048V referenced to GND, and VSENSE = V+IN – V–IN, unless otherwise
noted.
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNIT
INPUT
Offset Voltage, RTI (1)
VOS
vs Temperature
dVOS/dT
vs Power Supply
PSRR
Common-Mode Input Range
Common-Mode Rejection
Input Bias Current per Pin (2)
Input Offset Current
VSENSE = 0mV
VS = +2.7V to +18V, VSENSE = 0mV
VCM
CMRR
±20
±70
μV
±0.3
±1.5
μV/°C
V+IN = –14V to +80V, VSENSE = 0mV
μV/V
3
–14
120
80
V
140
dB
IB
VSENSE = 0mV
25
μA
IOS
VSENSE = 0mV
1
μA
6
kΩ
Differential Input Impedance
REFERENCE INPUTS
Reference Input Gain
1
Reference Input Voltage Range (3)
0
Divider Accuracy (4)
Reference Voltage Rejection Ratio
VREF1 = VREF2 = 40mV to 9V, V+ = 18V
vs Temperature
V
±0.2
±0.5
%
±25
±75
μV/V
μV/V/°C
0.055
GND + 0.5V ≤ VOUT ≤ (V+) – 0.5V;
VREF1 = VREF2 = (V+)/2 for all devices
GAIN (5)
Gain
V/V
VGND + 9
G
V+ = +5V
50
Gain Error
vs Temperature
V/V
±0.4
±1.4
%
0.0008
0.005
%/°C
OUTPUT
Nonlinearity Error
±0.01
Output Impedance
1.5
Ω
1
nF
Maximum Capacitive Load
No sustained oscillation
VOLTAGE OUTPUT (6)
%
RL = 10kΩ to GND
Swing to V+ Power-Supply Rail
V+ = 5V
Swing to GND
(V+)–0.17
(V+)–0.4
V
GND+0.015
GND+0.04
V
FREQUENCY RESPONSE
Effective Bandwidth (7)
BW
10
kHz
110
nV/√Hz
NOISE, RTI (1)
Voltage Noise Density
1kHz
POWER SUPPLY
Specified Voltage Range
Quiescent Current
VS
+2.7
IQ
600
+18
V
900
μA
+125
°C
TEMPERATURE RANGE
Specified Range
(1)
(2)
(3)
(4)
(5)
(6)
(7)
–40
RTI = referred-to-input.
See typical characteristic graph Figure 20 .
The average of the voltage on pins REF1 and REF2 must be between VGND and the lesser of (VGND+9V) and V+.
Reference divider accuracy specifies the match between the reference divider resistors using the configuration in Figure 37.
See typical characteristic graph Figure 25.
See typical characteristic graphs Figure 29 through Figure 31.
See typical characteristic graph Figure 15 and the Effective Bandwidth section in the Applications Information.
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PIN CONFIGURATION
D PACKAGE
SOIC-8
(TOP VIEW)
-IN
1
8
+IN
GND
2
7
REF1
REF2
3
6
V+
(1)
4
5
OUT
NC
(1)
NC: This pin is not internally connected. The NC pin should either be left floating or connected to GND.
PIN DESCRIPTIONS
SOIC-8
PIN NO.
4
NAME
DESCRIPTION
1
–IN
2
GND
Connection to negative side of shunt resistor.
Ground
3
REF2
Reference voltage connection - See application section for connection options.
4
NC
5
OUT
This pin is not internally connected. The NC pin should either be left floating or connected to GND.
Output voltage
6
V+
Power supply
7
REF1
8
+IN
Reference voltage connection - See application section for connection options.
Connection to positive side of shunt resistor.
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TYPICAL CHARACTERISTICS
At TA = +25°C, V+ = 5V, V+IN = 12V, VREF1 = VREF2 = 2.048V referenced to GND, and VSENSE = V+IN – V–IN, unless otherwise
noted.
START-UP TRANSIENT RESPONSE
START-UP TRANSIENT RESPONSE
VREF = GND, VDRIVE = 0.125V, RLOAD = 10kW, CLOAD = 10pF
CLOAD = 10pF
VREF = GND
VDRIVE = 0.125V
RLOAD = 10kW
5V/div
V+
V+
25ms/div
250ms/div
Figure 1.
Figure 2.
12V COMMON-MODE STEP RESPONSE
12V COMMON-MODE STEP RESPONSE
500mV/div
500mV/div
5V/div
VOUT
500mV/div
500mV/div
VOUT
VOUT
VOUT
5V/div
VCM
2.5ms/div
2.5ms/div
Figure 3.
Figure 4.
12V COMMON-MODE STEP RESPONSE
12V COMMON-MODE STEP RESPONSE
500mV/div
500mV/div
5V/div
VCM
VOUT
VOUT
5V/div
5V/div
VCM
VCM
2.5ms/div
2.5ms/div
Figure 5.
Figure 6.
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TYPICAL CHARACTERISTICS (continued)
At TA = +25°C, V+ = 5V, V+IN = 12V, VREF1 = VREF2 = 2.048V referenced to GND, and VSENSE = V+IN – V–IN, unless otherwise
noted.
VOUT
VCM
10V/div
500mV/div
VOUT
10V/div
50V COMMON-MODE STEP RESPONSE
500mV/div
50V COMMON-MODE STEP RESPONSE
VCM
5ms/div
100mV STEP RESPONSE
500mV STEP RESPONSE
20mV/div
100mV/div
Figure 8.
10ms/div
10ms/div
Figure 9.
Figure 10.
4V STEP RESPONSE
17V STEP RESPONSE
5V/div
1V/div
6
5ms/div
Figure 7.
25ms/div
25ms/div
Figure 11.
Figure 12.
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TYPICAL CHARACTERISTICS (continued)
At TA = +25°C, V+ = 5V, V+IN = 12V, VREF1 = VREF2 = 2.048V referenced to GND, and VSENSE = V+IN – V–IN, unless otherwise
noted.
INA282 PSRR (RTI)
vs FREQUENCY
INPUT OVERLOAD
120
Power-Supply Rejection Ratio (dB)
Input Drive (1V to 0V)
1V/div
VOUT (5V to midsupply)
110
100
90
80
70
60
50
40
30
20
25ms/div
100
1k
10k
100k
1M
Frequency (Hz)
Figure 13.
Figure 14.
GAIN vs FREQUENCY
INA284
COMMON-MODE REJECTION RATIO (RTI)
150
Common-Mode Rejectio Ratio (dB)
60
50
Gain (dB)
40
30
20
10
INA282 (50V/V)
INA285 (1kV/V)
INA284 (500V/V)
INA283 (200V/V)
INA286 (100V/V)
0
-10
140
130
120
110
100
90
80
70
-20
10
100
1k
10k
100k
1
1M
10
1k
10k
Figure 15.
Figure 16.
INA282 COMMON-MODE
SLEW RATE INDUCED OFFSET
INA286 OUTPUT IMPEDANCE
vs FREQUENCY
0.1
100k
1k
0.01
100
0.001
ROUT (W)
VOS, Referred-to-Input (V)
100
Frequency (Hz)
Frequency (Hz)
0.0001
10
1
0.00001
0.000001
0.1
1k
10k
100k
1M
10
100
1k
10k
100k
1M
Frequency (Hz)
VCM Slew Rate (V/sec)
Figure 17.
Figure 18.
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TYPICAL CHARACTERISTICS (continued)
At TA = +25°C, V+ = 5V, V+IN = 12V, VREF1 = VREF2 = 2.048V referenced to GND, and VSENSE = V+IN – V–IN, unless otherwise
noted.
INA282 TYPICAL NONLINEARITY
vs OUTPUT VOLTAGE
INA283 +IN BIAS CURRENT
vs COMMON-MODE VOLTAGE
30
0.06
VSENSE = -50mV to +50mV
20
+IN Bias Current (mA)
Nonlinearity (%)
0.04
0.02
0
V+ = 18V
-0.02
V+ = 3.5V
-0.04
V+ = 18V
0
-10
-20
-30
-40
-0.06
0
3
6
9
12
15
-20 -10
18
0
10
800
800
Quiescent Current (mA)
Quiescent Current (mA)
60
QUIESCENT CURRENT
vs SUPPLY VOLTAGE
V+ = 18V
700
650
V+ = 5V
550
500
70
80
700
600
500
400
300
200
100
V+ = 2.7V
0
400
0
-20
20
40
60
80
4
2
6
8
Common-Mode Voltage (V)
10
12
14
16
18
Supply Voltage (V)
Figure 21.
Figure 22.
COMMON-MODE REJECTION RATIO
vs TEMPERATURE
QUIESCENT CURRENT
vs TEMPERATURE
170
980
160
880
V+ = 12V
150
Quiescent Current (mA)
Common-Mode Rejection Ratio (dB)
50
INA283 QUIESCENT CURRENT
vs COMMON-MODE VOLTAGE
900
450
40
Figure 20.
850
600
30
Figure 19.
900
750
20
Common-Mode Voltage (V)
VOUT (V)
140
130
120
V+ = 5V
110
100
90
V+ = 18V
780
V+ = 5V
680
580
480
380
V+ = 2.7V
280
180
80
80
-75
-50
-25
0
25
50
75
100
125
150
-75
Temperature (°C)
-50
-25
0
25
50
75
100
125
150
Temperature (°C)
Figure 23.
8
V+ = 5V
V+ = 2.7V
10
Figure 24.
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TYPICAL CHARACTERISTICS (continued)
At TA = +25°C, V+ = 5V, V+IN = 12V, VREF1 = VREF2 = 2.048V referenced to GND, and VSENSE = V+IN – V–IN, unless otherwise
noted.
+IN BIAS CURRENT
vs TEMPERATURE
GAIN vs TEMPERATURE
0
1.0
0.8
-5
0.4
+IN Bias Current (mA)
Deviation in Gain (%)
0.6
V+ = 5V
0.2
0
-0.2
V+ = 12V
-0.4
-0.6
-10
V+ = 2.7V
-15
-20
V+ = 5V
-25
V+ = 18V
-30
-0.8
-35
-1.0
-40
VCM = 0V
-75
-50
-25
0
25
75
50
100
125
150
-75
-50
0
-25
25
50
75
100
125
150
Temperature (°C)
Temperature (°C)
Figure 25.
Figure 26.
INA282 VOLTAGE NOISE vs FREQUENCY
Voltage Noise, RTO (mV/ÖHz)
6.0
0.12
5.5
0.11
5.0
0.10
4.5
0.09
4.0
0.08
3.5
0.07
3.0
100
Time (1s/div)
1k
Voltage Noise, RTI (mV/ÖHz)
Voltage Noise, RTI (200nV/div)
INA282 0.1Hz TO 10Hz VOLTAGE NOISE, RTI
0.06
100k
10k
Frequency (Hz)
Figure 27.
Figure 28.
INA284 SWING TO RAIL WITH SHORT-CIRCUIT CURRENT
Source 2.7V
ISC = 3.4mA
VOUT, Sinking (V)
14
12
-2
700
-4
-6
Source 18V
ISC = 5.8mA
10
800
Sink 18V
ISC = 8.6mA
-8
8
-10
6
-12
Sink 2.7V
ISC = 6.2mA
4
-14
Sink 5V
ISC = 8.2mA
2
0
0
1
2
3
4
5
6
7
8
9
10
-16
-18
VDROP from Rail, Sourcing (V)
Source 5V
ISC = 5.2mA
16
INA283 SWING TO RAIL vs OUTPUT CURRENT
0
Swing to Rail (mV)
18
+25°C
+85°C
+125°C
600
500
400
-40°C
300
200
2.7V Swing
5V Swing
100
0
0
IOUT (mA)
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
1.8
2.0
IOUT, Sourcing (mA)
Figure 29.
Figure 30.
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TYPICAL CHARACTERISTICS (continued)
At TA = +25°C, V+ = 5V, V+IN = 12V, VREF1 = VREF2 = 2.048V referenced to GND, and VSENSE = V+IN – V–IN, unless otherwise
noted.
INA283 SWING TO GROUND vs OUTPUT CURRENT
400
Swing to Ground (mV)
350
300
250
+125°C
200
150
100
2.7V Swing
5V Swing
18V Swing
+85°C
50
+25°C
0
0
0.5
-40°C
1.0
1.5
2.0
2.5
IOUT, Sinking (mA)
Figure 31.
10
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APPLICATIONS INFORMATION
GENERAL INFORMATION
The INA282-Q1 voltage output current shunt monitor features a common-mode range that extends 14V below
the negative supply rail, as well as up to 80V, which allows use for either low-side or high-side current sensing.
BASIC CONNECTIONS
Figure 32 shows the basic connection of an INA282-Q1. The input pins, +IN and –IN, should be connected as
closely as possible to the shunt resistor to minimize any resistance in series with the shunt resistance.
Supply
-14V to +80V
Load
+2.7V to +18V
+IN
1
V+
-IN
Æ2
Æ2
Æ2
Æ1
Æ2
1
Æ1
OUT
ZerÆDrift
GAIN
PRODUCT
50V/V
100V/V
200V/V
500V/V
1000V/V
INA282
INA286
INA283
INA284
INA285
33.3kW
33.3kW
Output
REF2
REF1
GND
Figure 32. Typical Application
Power-supply bypass capacitors are required for stability. Applications with noisy or high-impedance power
supplies may require additional decoupling capacitors to reject power-supply noise. Connect bypass capacitors
close to the device pins.
POWER SUPPLY
The INA282-Q1 can make accurate measurements well outside of its own power-supply voltage, V+, because its
inputs (+IN and –IN) may operate anywhere between –14V and +80V independent of V+. For example, the V+
power supply can be 5V while the common-mode voltage being monitored by the shunt may be as high as +80V.
Of course, the output voltage range of the INA282-Q1 is constrained by the supply voltage that powers it on V+.
Note that when the power to the INA282-Q1 is off (that is, no voltage is supplied to the V+ pin), the input pins
(+IN and –IN) are high impedance with respect to ground and typically leak less than ±1μA over the full commonmode range of –14V to +80V
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SELECTING RS
The Zerø-Drift architecture of the INA282-Q1 enables use with full-scale range shunt voltages as low as 10mV.
EFFECTIVE BANDWIDTH
The extremely high dc CMRR of the INA282-Q1 results from the switched capacitor input structure. Because of
this architecture, the INA28x exhibits discrete time system behaviors as illustrated in the gain versus frequency
graph of Figure 16 and the step response curves of Figure 3 through Figure 10. The response to a step input
depends somewhat on the phase of the internal INA28x clock when the input step occurs. It is possible to
overload the input amplifier with a rapid change in input common-mode voltage (see Figure 17). Errors as a
result of common-mode voltage steps and/or overload situations typically disappear within 15μs after the
disturbance is removed.
TRANSIENT PROTECTION
The –14V to +80V common-mode range of the INA282-Q1 is ideal for withstanding automotive fault conditions
that range from 12V battery reversal up to +80V transients; no additional protective components are needed up
to those levels. In the event that the INA282-Q1 is exposed to transients on the inputs in excess of its ratings,
then external transient absorption with semiconductor transient absorbers (Zener or Transzorbs) will be
necessary. Use of MOVs or VDRs is not recommended except when they are used in addition to a
semiconductor transient absorber. Select the transient absorber such that it cannot allow the INA282-Q1 to be
exposed to transients greater than 80V (that is, allow for transient absorber tolerance, as well as additional
voltage as a result of transient absorber dynamic impedance). Despite the use of internal zener-type electrostatic
discharge (ESD) protection, the INA282-Q1 does not lend itself to using external resistors in series with the
inputs without degrading gain accuracy.
SHUTDOWN
While the INA282-Q1 does not provide a shutdown pin, the quiescent current of 600μA enables it to be powered
from the output of a logic gate. Take the gate low to shut down the INA282-Q1.
12
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REFERENCE PIN CONNECTION OPTIONS
Figure 33 illustrates a test circuit for reference divider accuracy. The output of the INA282-Q1 can be connected
for unidirectional or bidirectional operation. Note that neither the REF1 pin nor the REF2 pin may be connected
to any voltage source lower than GND or higher than V+, and that the effective reference voltage (REF1 +
REF2)/2 must be 9V or less. This parameter means that the V+ reference output connection shown in Figure 35
is not allowed for V+ greater than 9V. However, the split-supply reference connection shown in Figure 37 is
allowed for all values of V+ up to 18V.
V+
+IN
Æ1
V+
-IN
Æ2
Æ2
Æ2
Æ1
Æ2
See Note (1)
Æ1
Æ1
OUT
ZerÆDrift
GAIN
PRODUCT
50V/V
100V/V
200V/V
500V/V
1000V/V
INA282
INA286
INA283
INA284
INA285
33.3kW
33.3kW
REF2
REF1
GND
(1) Reference divider accuracy is determined by measuring the output with the reference voltage applied to alternate reference resistors, and
calculating a result such that the amplifier offset is cancelled in the final measurement.
Figure 33. Test Circuit for Reference Divider Accuracy
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UNIDIRECTIONAL OPERATION
Unidirectional operation allows the INA282-Q1 to measure currents through a resistive shunt in one direction. In
the case of unidirectional operation, the output could be set at the negative rail (near ground, and the most
common connection) or at the positive rail (near V+) when the differential input is 0V. The output moves to the
opposite rail when a correct polarity differential input voltage is applied.
The required polarity of the differential input depends on the output voltage setting. If the output is set at the
positive rail, the input polarity must be negative to move the output down. If the output is set at ground, the
polarity is positive to move the output up.
The following sections describe how to configure the output for unidirectional operation.
Ground Referenced Output
When using the INA282-Q1 in this mode, both reference inputs are connected to ground; this configuration takes
the output to the negative rail when there is 0V differential at the input (as Figure 34 shows).
Supply
-14V to +80V
Load
V+
+IN
Æ1
V+
-IN
Æ2
Æ2
Æ2
Æ1
Æ2
Æ1
Æ1
OUT
ZerÆDrift
GAIN
PRODUCT
50V/V
100V/V
200V/V
500V/V
1000V/V
INA282
INA286
INA283
INA284
INA285
33.3kW
33.3kW
Output
REF2
REF1
GND
Figure 34. Ground Referenced Output
14
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V+ Referenced Output
This mode is set when both reference pins are connected to the positive supply. It is typically used when a
diagnostic scheme requires detection of the amplifier and the wiring before power is applied to the load (as
shown in Figure 35).
ISENSE
Supply
-14V to +80V
Load
V+
+IN
Æ1
V+
-IN
Æ2
Æ2
Æ2
Æ1
Æ2
Æ1
Æ1
OUT
ZerÆDrift
GAIN
PRODUCT
50V/V
100V/V
200V/V
500V/V
1000V/V
INA282
INA286
INA283
INA284
INA285
33.3kW
33.3kW
Output
REF2
REF1
GND
Figure 35. V+ Referenced Output
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BIDIRECTIONAL OPERATION
Bidirectional operation allows the INA282-Q1 to measure currents through a resistive shunt in two directions. In
this case, the output can be set anywhere within the limits of what the reference inputs allow (that is, between 0V
to 9V, but never to exceed the supply voltage). Typically, it is set at half-scale for equal range in both directions.
In some cases, however, it is set at a voltage other than half-scale when the bidirectional current is
nonsymmetrical.
The quiescent output voltage is set by applying voltage(s) to the reference inputs. REF1 and REF2 are
connected to internal resistors that connect to an internal offset node. There is no operational difference between
the pins.
External Reference Output
Connecting both pins together and to a reference produces an output at the reference voltage when there is no
differential input; this configuration is illustrated in Figure 36. The output moves down from the reference voltage
when the input is negative relative to the –IN pin and up when the input is positive relative to the –IN pin. Note
that this technique is the most accurate way to bias the output to a precise voltage.
Supply
-14V to +80V
Load
V+
+IN
Æ1
V+
-IN
Æ2
Æ2
Æ2
Æ1
Æ2
Æ1
Æ1
OUT
ZerÆDrift
GAIN
PRODUCT
50V/V
100V/V
200V/V
500V/V
1000V/V
INA282
INA286
INA283
INA284
INA285
33.3kW
33.3kW
REF2
Output
REF3020
2.048V
Reference
REF1
GND
Figure 36. External Reference Output
16
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Splitting the Supply
By connecting one reference pin to V+ and the other to the ground pin, the output is set at half of the supply
when there is no differential input, as shown in Figure 37. This method creates a midscale offset that is
ratiometric to the supply voltage; thus, if the supply increases or decreases, the output remains at half the
supply.
Supply
-14V to +80V
Load
V+
+IN
Æ1
V+
-IN
Æ2
Æ2
Æ2
Æ1
Æ2
Æ1
Æ1
OUT
ZerÆDrift
GAIN
PRODUCT
50V/V
100V/V
200V/V
500V/V
1000V/V
INA282
INA286
INA283
INA284
INA285
33.3kW
33.3kW
Output
REF2
REF1
GND
Figure 37. Split-Supply Output
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Splitting an External Reference
In this case, an external reference is divided by 2 with an accuracy of approximately 0.5% by connecting one
REF pin to ground and the other REF pin to the reference (as Figure 38 illustrates).
Supply
-14V to +80V
Load
V+
+IN
Æ1
V+
-IN
Æ2
Æ2
Æ2
Æ1
Æ2
Æ1
Æ1
OUT
ZerÆDrift
GAIN
PRODUCT
50V/V
100V/V
200V/V
500V/V
1000V/V
INA282
INA286
INA283
INA284
INA285
33.3kW
33.3kW
REF2
Output
REF02
5V
Reference
REF1
GND
Figure 38. Split Reference Output
18
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EXTENDED NEGATIVE COMMON-MODE RANGE
Using a negative power supply can extend the common-mode range 14V more negative than the supply used.
For instance, a –10V supply allows up to –24V negative common-mode. Remember to keep the total voltage
between the GND pin and V+ pin to less than 18V. The positive common-mode decreases by the same amount.
The reference input simplifies this type of operation because the output quiescent bias point is always based on
the reference connections. Figure 39 shows a circuit configuration for common-mode ranges from –24V to +70V.
Supply
-24V to +70V
Load
V+ = 5V
+IN
1
-IN
Æ2
V+
Æ2
Æ2
Æ1
Æ2
Æ1
Æ1
OUT
ZerÆDrift
PRODUCT
GAIN
INA282
INA283
INA284
INA285
INA286
50V/V
200V/V
500V/V
1000V/V
100V/V
33.3kW
33.3kW
REF2
REF1
See Note (1)
GND
Connect to -10V
(1)
Connect the REF pins as desired; however, they cannot exceed 9V above the GND pin voltage.
Figure 39. Circuit Configuration for Common-Mode Ranges from –24V to +70V
CALCULATING TOTAL ERROR
The electrical specifications for the INA282-286 family of devices include the typical individual errors terms such
as gain error, offset error, and nonlinearity error. Total error including all of these individual error components is
not specified in the Electrical Characteristics table. In order to accurately calculate the error that can be expected
from the device, we must first know the operating conditions to which the device is subjected. Some current
shunt monitors specify a total error in the product data sheet. However, this total error term is accurate under
only one particular set of operating conditions. Specifying the total error at this one point has little practical value
because any deviation from these specific operating conditions no longer yields the same total error value. This
section discusses the individual error sources, with information on how to apply them in order to calculate the
total error value for the device under any normal operating conditions.
The typical error sources that have the largest impact on the total error of the device are input offset voltage,
common-mode voltage rejection, gain error and nonlinearity error. For the INA282-286, an additional error source
referred to as Reference Common-Mode Rejection is also included in the total error value.
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The nonlinearity error of the INA282-286 is relatively low compared to the gain error specification, which results
in a gain error that can be expected to be relatively constant throughout the linear input range of the device.
While the gain error remains constant across the linear input range of the device, the error associated with the
input offset voltage does not. As the differential input voltage developed across a shunt resistor at the input of the
INA282-286 decreases, the inherent input offset voltage of the device becomes a larger percentage of the
measured input signal resulting in an increase in error in the measurement. This varying error is present among
all current shunt monitors, given the input offset voltage ratio to the voltage being sensed by the device. The
relatively low input offset voltages present in the INA282-286 devices limit the amount of contribution the offset
voltage has on the total error term.
The term Reference Common-Mode Rejection refers to the amount of error induced by applying a reference
voltage to the INA282-286 device that deviates from the inherent bias voltage present at the output of the first
stage of the device. The output of the switched-capacitor network and first-stage amplifier has an inherent bias
voltage of approximately 2.048V. Applying a reference voltage of 2.048V to the INA282-286 reference pins
results in no additional error term contribution. Applying a voltage to the reference pins that differs from 2.048V
creates a voltage potential in the internal difference amplifier, resulting in additional current flowing through the
resistor network. As a result of resistor tolerances, this additional current flow causes additional error at the
output because of resistor mismatches. Additionally, as a result of resistor tolerances, this additional current flow
causes additional error at the output based on the common-mode rejection ratio of the output stage amplifier.
This error term is referred back to the input of the device as additional input offset voltage. Increasing the
difference between the 2.048V internal bias and the external reference voltage results in a higher input offset
voltage. Also, as the error at the output is referred back to the input, there is a larger impact on the input-referred
offset, VOS, for the lower-gain versions of the device.
Two examples are provided that detail how different operating conditions can affect the total error calculations.
Typical and maximum calculations are shown as well to provide the user more information on how much error
variance could be present from device to device.
Example 1
INA282; VS = 5V; VCM = 12V; VREF = 2.048V; VSENSE = 10mV
Table 1. Example 1
TERM
SYMBOL
EQUATION
TYPICAL VALUE
MAXIMUM VALUE
Initial Input Offset
Voltage
VOS
—
20μV
70μV
Added Input Offset
Voltage Because of
Common-Mode
Voltage
VOS_CM
0μV
0μV
Added Input Offset
Voltage Because of
Reference Voltage
VOS_REF
0μV
0μV
Total Input Offset
Voltage
VOS_Total
(VOS)2 + (VOS_CM)2 + (VOS_REF)2
20μV
70μV
Error from Input
Offset Voltage
Error_VOS
VOS_Total
VSENSE ´ 100
0.20%
0.70%
10
(
20
(
20
1
CMRR_dB
´ (VCM - 12V)
RCMR ´ (2.048V - VREF)
Gain Error
Error_Gain
—
0.40%
1.40%
Nonlinearity Error
Error_Lin
—
0.01%
0.01%
Total Error
—
(Error_VOS)2 + (Error_Gain)2 + (Error_Lin)2
0.45%
1.56%
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Example 2
INA286; VS = 5V; VCM = 24V; VREF = 0V; VSENSE = 10mV
Table 2. Example 2
TERM
SYMBOL
EQUATION
TYPICAL VALUE
MAXIMUM VALUE
Initial Input Offset
Voltage
VOS
—
20μV
70μV
Added Input Offset
Voltage Because of
Common-Mode
Voltage
VOS_CM
1.2μV
12μV
Added Input Offset
Voltage Because of
Reference Voltage
VOS_REF
34.8μV
92.2μV
Total Input Offset
Voltage
VOS_Total
(VOS)2 + (VOS_CM)2 + (VOS_REF)2
40.2μV
116.4μV
Error from Input
Offset Voltage
Error_VOS
VOS_Total
VSENSE ´ 100
0.40%
1.16%
Gain Error
Error_Gain
—
0.40%
1.40%
Nonlinearity Error
Error_Lin
0.01%
0.01%
0.57%
1.82%
1
Total Error
20
(
10
(
CMRR_dB
´ (VCM - 12V)
RCMR ´ (2.048V - VREF)
—
2
2
(Error_VOS) + (Error_Gain) + (Error_Lin)
—
2
SUMMING CURRENTS AND PARALLELING
The outputs of multiple INA282-Q1devices are easily summed by connecting the output of one INA282-Q1
device to the reference input of a second INA282-Q1 device. Summing beyond two devices is possible by
repeating this connection, and is shown for three devices in Figure 40. The reference input of the first INA282-Q1
device sets the output quiescent level for all the devices in the string.
First Circuit
Æ1
Second Circuit
VIN+
VIN-
Æ2
Æ2
Æ1
Æ2
Æ1
Æ2
Æ1
VIN+
VIN-
Æ2
Æ2
Third Circuit
Æ1
Æ2
Æ1
Æ2
Æ1
VIN+
VIN-
Æ2
Æ2
Æ1
Æ2
Æ2
Æ1
Æ1
Output
Output
Output
Summed
Output
VREF
GND
GND
V+
GND
V+
V+
NOTE: The voltage applied to the reference inputs cannot exceed 9V.
Figure 40. Summing the Outputs of Multiple INA282-Q1 Devices
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CURRENT DIFFERENCING
Occasionally, the need arises to confirm that the current into a load is identical to the current out of a load,
usually as part of diagnostic testing or fault detection. This situation requires precision current differencing, which
is the same as summing except that the two amplifiers have the inputs connected opposite of each other. Under
normal operating conditions, the final output is very close to the reference value and proportional to any current
difference. Figure 41 is an example of the connections required for current differencing.
First Circuit
Second Circuit
Supply
Æ1
Load
VIN+
VIN-
Æ2
Æ2
Æ1
Æ2
Æ1
Æ2
Æ1
VIN+
VIN-
Æ2
Æ2
Æ1
Æ2
Æ2
Æ1
Æ1
Æ1
Output
Output
Difference
Output
VREF
GND
GND
V+
V+
NOTE: This example is identical to the current summing example, except that the two shunt inputs are reversed in polarity,
this current differencing circuit is useful in detecting when current into and out of a load do not match.
Figure 41. Current Differencing Using an INA282-Q1 Device
22
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COMMON-MODE DYNAMICS AND CURRENT DIFFERENCING
Current sensing is frequently used on totem-pole output stages, such as those of bridge-type motor drives. We
can sense current in one of three locations on a totem-pole output: on the ground side (low-side sensing); on the
power-supply side (high-side sensing); or on the output (phase sensing). Only the output line reports the exact
load current. Obviously, the ground and supply-side sensing report only the current in the individual respective
phases. Figure 42 depicts these various methods on a three-phase motor driver.
Motor
High Side
Current
Sense
High Side
Current
Sense
Phase
Current
Sense
Low Side
Current Sense
Low Side
Current Sense
High Side
Current
Sense
Phase
Current
Sense
Phase
Current
Sense
Low Side
Current Sense
NOTE: Motor drive current sensing can be done on the low side, phase side, or high side. Only the phase output gives
complete information regarding current in the motor, but is subject to common-mode transients that even the best
amplifiers do not reject completely.
Figure 42. Motor Drive Current Sensing
However, sensing on the output is subject to large common-mode voltage steps that result in feedthrough in
even the best amplifiers. The ground and supply-side sensing configurations are free of this problem, thanks to
the static common-mode environments. Sensing either ground or supply alone only provides partial information
regarding motor current, but sense them individually and sum them and we have the same information provided
by phase sensing, with an added advantage of not being subject to transient common-mode artifacts. See
Figure 43 for an illustration of two INA282-Q1 devices connected in this manner. Technically, this configuration is
current differencing, though, because we want the upper sense to report a positive-going excursion in the overall
output, and the negative sense to report a negative-going excursion.
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Æ2
+2.7V to
+18V
Æ2
Æ2
Æ1
VIN+
Æ1
Æ1
VIN-
Æ2
Æ1
Motor
Supply
(< 80V)
Q1
D1
MOSFET
Drive
Circuits
VREF
Output
+2.7V to
+18V
Æ2
Æ2
Æ1
VIN+
Æ1
Æ1
VIN-
Æ2
Æ1
Q2
Æ2
D2
NOTE: By sensing totem-pole current on both the positive and negative rail and summing, dynamic common-mode issues
can be avoided entirely. Note that IC2 is connected with inverting inputs because it should report current with an
opposite polarity to that of IC1.
Figure 43. Sensing and Summing Totem Pole Current
24
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PACKAGE OPTION ADDENDUM
www.ti.com
2-Apr-2012
PACKAGING INFORMATION
Orderable Device
INA282AQDRQ1
Status
(1)
Package Type Package
Drawing
ACTIVE
SOIC
D
Pins
Package Qty
8
2500
Eco Plan
(2)
Green (RoHS
& no Sb/Br)
Lead/
Ball Finish
MSL Peak Temp
(3)
Samples
(Requires Login)
CU NIPDAU Level-2-260C-1 YEAR
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF INA282-Q1 :
• Catalog: INA282
NOTE: Qualified Version Definitions:
• Catalog - TI's standard catalog product
Addendum-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
2-Apr-2012
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
INA282AQDRQ1
Package Package Pins
Type Drawing
SOIC
D
8
SPQ
Reel
Reel
A0
Diameter Width (mm)
(mm) W1 (mm)
2500
330.0
12.4
Pack Materials-Page 1
6.4
B0
(mm)
K0
(mm)
P1
(mm)
5.2
2.1
8.0
W
Pin1
(mm) Quadrant
12.0
Q1
PACKAGE MATERIALS INFORMATION
www.ti.com
2-Apr-2012
*All dimensions are nominal
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
INA282AQDRQ1
SOIC
D
8
2500
346.0
346.0
29.0
Pack Materials-Page 2
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