PD-91816B IRFIB5N65A SMPS MOSFET HEXFET® Power MOSFET Applications l Switch Mode Power Supply (SMPS) l Uninterruptible Power Supply l High Speed Power Switching l High Voltage Isolation = 2.5KVRMS Benefits l Low Gate Charge Qg results in Simple Drive Requirement l Improved Gate, Avalanche and Dynamic dv/dt Ruggedness l Fully Characterized Capacitance and Avalanche Voltage and Current VDSS RDS(on) max ID 0.93Ω 5.1A 650V TO-220 Full-Pak GDS Absolute Maximum Ratings Parameter ID @ TC = 25°C ID @ TC = 100°C IDM PD @TC = 25°C VGS dv/dt TJ TSTG Continuous Drain Current, VGS @ 10V Continuous Drain Current, VGS @ 10V Pulsed Drain Current Power Dissipation Linear Derating Factor Gate-to-Source Voltage Peak Diode Recovery dv/dt Operating Junction and Storage Temperature Range Soldering Temperature, for 10 seconds Mounting torqe, 6-32 or M3 screw Max. 5.1 3.2 21 60 0.48 ± 30 2.8 -55 to + 150 Units A W W/°C V V/ns °C 300 (1.6mm from case ) 10 lbf•in (1.1N•m) Typical SMPS Topologies l l Single Transistor Flyback Single Transistor Forward Notes through are on page 8 www.irf.com 1 6/21/00 IRFIB5N65A Static @ TJ = 25°C (unless otherwise specified) RDS(on) VGS(th) Parameter Drain-to-Source Breakdown Voltage Breakdown Voltage Temp. Coefficient Static Drain-to-Source On-Resistance Gate Threshold Voltage IDSS Drain-to-Source Leakage Current IGSS Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage V(BR)DSS ∆V(BR)DSS/∆TJ Min. Typ. Max. Units Conditions 650 ––– ––– V VGS = 0V, I D = 250µA ––– 0.67 ––– V/°C Reference to 25°C, ID = 1mA ––– ––– 0.93 Ω VGS = 10V, ID = 3.1.A 2.0 ––– 4.0 V VDS = VGS, ID = 250µA ––– ––– 25 VDS = 650V, VGS = 0V µA ––– ––– 250 VDS = 520V, VGS = 0V, T J = 125°C ––– ––– 100 VGS = 30V nA ––– ––– -100 VGS = -30V Dynamic @ TJ = 25°C (unless otherwise specified) gfs Qg Qgs Qgd td(on) tr td(off) tf Ciss Coss Crss Coss Coss Coss eff. Parameter Forward Transconductance Total Gate Charge Gate-to-Source Charge Gate-to-Drain ("Miller") Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Input Capacitance Output Capacitance Reverse Transfer Capacitance Output Capacitance Output Capacitance Effective Output Capacitance Min. 3.9 ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– Typ. ––– ––– ––– ––– 14 20 34 18 1417 177 7.0 1912 48 84 Max. Units Conditions ––– S VDS = 50V, ID = 3.1A 48 ID = 5.2A 12 nC VDS = 400V 19 VGS = 10V, See Fig. 6 and 13 ––– VDD = 325V ––– ID = 5.2A ns ––– RG = 9.1Ω ––– RD = 62Ω,See Fig. 10 ––– VGS = 0V ––– VDS = 25V ––– pF ƒ = 1.0MHz, See Fig. 5 ––– VGS = 0V, VDS = 1.0V, ƒ = 1.0MHz ––– VGS = 0V, VDS = 520V, ƒ = 1.0MHz ––– VGS = 0V, VDS = 0V to 520V Avalanche Characteristics Parameter EAS IAR EAR Single Pulse Avalanche Energy Avalanche Current Repetitive Avalanche Energy Typ. Max. Units ––– ––– ––– 325 5.2 6 mJ A mJ Typ. Max. Units ––– ––– 2.1 65 °C/W Thermal Resistance Parameter RθJC RθJA Junction-to-Case Junction-to-Ambient Diode Characteristics IS ISM VSD trr Qrr ton 2 Parameter Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode) Diode Forward Voltage Reverse Recovery Time Reverse RecoveryCharge Forward Turn-On Time Min. Typ. Max. Units Conditions D MOSFET symbol ––– ––– 5.2 showing the A G integral reverse ––– ––– 21 S p-n junction diode. ––– ––– 1.5 V TJ = 25°C, IS = 5.2A, VGS = 0V ––– 493 739 ns TJ = 25°C, IF = 5.2A ––– 2.1 3.2 µC di/dt = 100A/µs Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD) www.irf.com IRFIB5N65A 100 100 VGS 15V 10V 8.0V 7.0V 6.0V 5.5V 5.0V BOTTOM 4.5V VGS 15V 10V 8.0V 7.0V 6.0V 5.5V 5.0V BOTTOM 4.5V TOP I D , Drain-to-Source Current (A) I D , Drain-to-Source Current (A) TOP 10 1 10 4.5V 1 20µs PULSE WIDTH TJ = 150 °C 20µs PULSE WIDTH 4.5V TJ = 25 °C 0.1 0.1 1 10 0.1 1 100 3.0 RDS(on) , Drain-to-Source On Resistance (Normalized) I D , Drain-to-Source Current (A) 100 10 TJ = 150 ° C TJ = 25 ° C 1 V DS = 100V 20µs PULSE WIDTH 5.0 6.0 7.0 8.0 VGS , Gate-to-Source Voltage (V) Fig 3. Typical Transfer Characteristics www.irf.com 100 Fig 2. Typical Output Characteristics Fig 1. Typical Output Characteristics 0.1 4.0 10 VDS , Drain-to-Source Voltage (V) VDS , Drain-to-Source Voltage (V) 9.0 ID = 5.2A 2.5 2.0 1.5 1.0 0.5 0.0 -60 -40 -20 VGS = 10V 0 20 40 60 80 100 120 140 160 TJ , Junction Temperature ( °C) Fig 4. Normalized On-Resistance Vs. Temperature 3 IRFIB5N65A V GS C is s C rss C oss 1600 = = = = 20 0V, f = 1M Hz C g s + C g d , Cd s S H O R T E D C gd C ds + C gd VGS , Gate-to-Source Voltage (V) 2000 C , C a pa c itan c e (p F ) C is s 1200 C oss 800 400 C rs s 0 10 100 VDS = 400V 520V VDS = 325V VDS = 130V 16 12 8 4 FOR TEST CIRCUIT SEE FIGURE 13 0 A 1 ID = 5.2A 0 1000 10 20 30 40 50 Q G , Total Gate Charge (nC) V D S , D rain-to-S ource V oltage (V ) Fig 6. Typical Gate Charge Vs. Gate-to-Source Voltage Fig 5. Typical Capacitance Vs. Drain-to-Source Voltage 100 100 10us I D , Drain Current (A) ISD , Reverse Drain Current (A) OPERATION IN THIS AREA LIMITED BY RDS(on) 10 TJ = 150 ° C 1 100us 1ms 1 10ms TJ = 25 ° C 0.1 0.2 V GS = 0 V 0.4 0.6 0.8 1.0 VSD ,Source-to-Drain Voltage (V) Fig 7. Typical Source-Drain Diode Forward Voltage 4 10 1.2 0.1 TC = 25 ° C TJ = 150 ° C Single Pulse 10 100 1000 10000 VDS , Drain-to-Source Voltage (V) Fig 8. Maximum Safe Operating Area www.irf.com IRFIB5N65A 6.0 RD VDS VGS 5.0 D.U.T. I D , Drain Current (A) RG + -VDD 4.0 10V Pulse Width ≤ 1 µs Duty Factor ≤ 0.1 % 3.0 2.0 Fig 10a. Switching Time Test Circuit VDS 1.0 90% 0.0 25 50 75 100 TC , Case Temperature 125 150 ( °C) 10% VGS Fig 9. Maximum Drain Current Vs. Case Temperature td(on) tr t d(off) tf Fig 10b. Switching Time Waveforms Thermal Response (Z thJC ) 10 1 D = 0.50 0.20 0.10 P DM 0.05 0.1 t1 0.02 t2 0.01 Notes: 1. Duty factor D = t 1 / t 2 2. Peak T J = P DM x Z thJC + TC SINGLE PULSE (THERMAL RESPONSE) 0.01 0.00001 0.0001 0.001 0.01 0.1 1 10 t1 , Rectangular Pulse Duration (sec) Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case www.irf.com 5 IRFIB5N65A D R IV E R L VDS D .U .T RG + V - DD IA S 20V 0 .0 1 Ω tp Fig 12a. Unclamped Inductive Test Circuit V (B R )D SS tp A EAS , Single Pulse Avalanche Energy (mJ) 800 1 5V ID 2.3A 3.3A 5.2A TOP BOTTOM 600 400 200 0 25 50 75 100 125 150 Starting TJ , Junction Temperature ( °C) IAS Fig 12c. Maximum Avalanche Energy Vs. Drain Current Fig 12b. Unclamped Inductive Waveforms QG 10 V 800 QGD VG Charge Fig 13a. Basic Gate Charge Waveform Current Regulator Same Type as D.U.T. 50KΩ 12V .2µF V D S av , A valanc he V oltage (V ) QGS 780 760 740 720 .3µF D.U.T. + V - DS 700 A 0 VGS 1 2 3 4 5 I av , A valanche C urrent (A ) 3mA IG ID Current Sampling Resistors Fig 13b. Gate Charge Test Circuit 6 Fig 12d. Typical Drain-to-Source Voltage Vs. Avalanche Current www.irf.com 6 IRFIB5N65A Peak Diode Recovery dv/dt Test Circuit + D.U.T Circuit Layout Considerations • Low Stray Inductance • Ground Plane • Low Leakage Inductance Current Transformer + - - + • • • • RG dv/dt controlled by RG Driver same type as D.U.T. ISD controlled by Duty Factor "D" D.U.T. - Device Under Test Driver Gate Drive P.W. D= Period + - VDD P.W. Period VGS=10V * D.U.T. ISD Waveform Reverse Recovery Current Body Diode Forward Current di/dt D.U.T. VDS Waveform Diode Recovery dv/dt Re-Applied Voltage Body Diode VDD Forward Drop Inductor Curent Ripple ≤ 5% ISD * VGS = 5V for Logic Level Devices Fig 14. For N-Channel HEXFET® Power MOSFETs www.irf.com 7 IRFIB5N65A TO-220 Full-Pak Package Outline Dimensions are shown in millimeters (inches) 1 0.60 (.4 17 ) 1 0.40 (.4 09 ) ø 3 .40 (.13 3) 3 .10 (.12 3) 4.8 0 ( .189 ) 4.6 0 ( .181 ) -A 3 .70 (.14 5) 3 .20 (.12 6) 1 6.0 0 ( .63 0) 1 5.8 0 ( .62 2) 2.8 0 ( .11 0) 2.6 0 ( .10 2) LE A D A S S IG N M E N TS 1 - GATE 2 - D R A IN 3 - S OU R CE 7.1 0 ( .28 0) 6.7 0 ( .26 3) 1.1 5 ( .04 5) M IN . N O TE S : 1 D IM E N S IO N IN G & TO L E R A N C IN G P E R A N S I Y 14.5 M , 1 9 82 1 2 3 2 C O N TR O LL IN G D IM E N S IO N : IN C H . 3.30 (.1 30 ) 3.10 (.1 22 ) -B - 1 3.7 0 ( .54 0) 1 3.5 0 ( .53 0) C A 3X 1 .4 0 (.05 5) 1 .0 5 (.04 2) 0.9 0 ( .0 35) 3X 0.7 0 ( .0 28) 0.2 5 ( .01 0) 3X M A M 0.48 ( .01 9) 0.44 ( .01 7) 2 .85 ( .11 2) 2 .65 ( .10 4) B 2 .54 (.1 00 ) 2X D B M IN IM U M C R E E P A G E D IS T A N C E B E TW E E N A -B -C -D = 4 .80 (.1 89) TO-220 Full-Pak Part Marking Information E X AM P LE : TH IS IS A N IR F I8 40 G W IT H AS S E M B L Y L O T C O D E E 40 1 A IN T E R N A TIO N A L R E C T IF IE R LOGO PA R T NU M B E R IR F I8 4 0 G E 40 1 9 2 4 5 A S S EM BL Y LOT CODE Notes: Repetitive rating; pulse width limited by max. junction temperature. (See fig. 11) Starting TJ = 25°C, L = 24mH RG = 25Ω, IAS = 5.2A. (See Figure 12) ISD ≤ 5.2A, di/dt ≤ 90A/µs, VDD ≤ V(BR)DSS, DATE CODE (YY W W ) YY = YE A R W W = W EEK Pulse width ≤ 300µs; duty cycle ≤ 2%. Coss eff. is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 to 80% VDSS t=60s, f=60Hz TJ ≤ 150°C IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105 IR EUROPEAN REGIONAL CENTRE: 439/445 Godstone Rd, Whyteleafe, Surrey CR3 OBL, UK Tel: ++ 44 (0)20 8645 8000 IR CANADA: 15 Lincoln Court, Brampton, Ontario L6T3Z2, Tel: (905) 453 2200 IR GERMANY: Saalburgstrasse 157, 61350 Bad Homburg Tel: ++ 49 (0) 6172 96590 IR ITALY: Via Liguria 49, 10071 Borgaro, Torino Tel: ++ 39 011 451 0111 IR JAPAN: K&H Bldg., 2F, 30-4 Nishi-Ikebukuro 3-Chome, Toshima-Ku, Tokyo 171 Tel: 81 (0)3 3983 0086 IR SOUTHEAST ASIA: 1 Kim Seng Promenade, Great World City West Tower, 13-11, Singapore 237994 Tel: ++ 65 (0)838 4630 IR TAIWAN:16 Fl. Suite D. 207, Sec. 2, Tun Haw South Road, Taipei, 10673 Tel: 886-(0)2 2377 9936 Data and specifications subject to change without notice. 6/00 8 www.irf.com