IRF IRS2111STRPBF

Data Sheet No. PD60253
IRS2111(S)PbF
HALF-BRIDGE DRIVER
Features
• Floating channel designed for bootstrap operation
• Fully operational to +600 V
• Tolerant to negative transient voltage, dV/dt
Product Summary
VOFFSET
600 V max.
IO+/-
200 mA / 420 mA
VOUT
10 V - 20 V
ton/off (typ.)
750 ns & 150 ns
Deadtime (typ.)
650 ns
immune
• Gate drive supply range from 10 V to 20 V
• Undervoltage lockout for both channels
• CMOS Schmitt-triggered inputs with pull-down
• Matched propagation delay for both channels
• Internally set deadtime
• High side output in phase with input
Description
Packages
The IRS2111 is a high voltage, high speed power MOSFET and
IGBT driver with dependent high and low side referenced output channels designed for half-bridge applications. Proprietary
HVIC and latch immune CMOS technologies enable ruggedized
monolithic construction. Logic input is compatible with standard
CMOS outputs. The output drivers feature a high pulse current
buffer stage designed for minimum driver cross-conduction. Internal deadtime is provided to avoid shoot-through in the output
half-bridge. The floating channel can be used to drive an Nchannel power MOSFET or IGBT in the high side configuration
which operates up to 600 V.
8-Lead PDIP
IRS2111PbF
8-Lead SOIC
IRS21111SPbF
Typical Connection
up to 600 V
VCC
VCC
IN
IN
COM
VB
HO
VS
TO
LOAD
LO
(Refer to Lead Assignments for correct pin configuration). This diagram shows electrical connections only. Please
refer to our Application Notes and DesignTips for proper circuit board layout.
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1
IRS2111(S)PbF
Absolute Maximum Ratings
Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage parameters are absolute voltages referenced to COM. The thermal resistance and power dissipation ratings are measured
under board mounted and still air conditions. Additional information is shown in Figs. 7 through 10.
Symbol
Definition
Min.
Max.
VB
High side floating supply voltage
-0.3
625 (Note 1)
VS
High side floating supply offset voltage
VB - 25
VB + 0.3
VHO
High side floating output voltage
VS - 0.3
VB + 0.3
VCC
Low side and logic fixed supply voltage
-0.3
25 (Note 1)
VLO
Low side output voltage
-0.3
VCC + 0.3
Logic input voltage
-0.3
VCC + 0.3
—
50
VIN
dVs/dt
PD
RthJA
Allowable offset supply voltage transient (Fig. 2)
Package power dissipation @ TA ≤ +25°C
Thermal resistance, junction to ambient
(8 Lead PDIP)
—
1.0
(8 lead SOIC)
—
0.625
(8 lead PDIP)
—
125
(8 lead SOIC)
—
200
TJ
Junction temperature
—
150
TS
Storage temperature
-55
150
TL
Lead temperature (soldering, 10 seconds)
—
300
Units
V
V/ns
W
°C/W
°C
Note 1: All supplies are fully tested at 25 V, and an internal 20 V clamp exists for each supply
Recommended Operating Conditions
The input/output logic timing diagram is shown in Fig. 1. For proper operation the device should be used within the
recommended conditions. The VS offset rating is tested with all supplies biased at a 15 V differential.
Symbol
Min.
Max.
VB
High side floating supply absolute voltage
Definition
VS + 10
VS + 20
VS
High side floating supply offset voltage
Note 2
600
VHO
High side floating output voltage
VS
VB
VCC
Low side and logic fixed supply voltage
10
20
VLO
Low side output voltage
0
VCC
VIN
Logic input voltage
0
VCC
TA
Ambient temperature
-40
125
Units
V
°C
Note 2: Logic operational for VS of -5 V to +600 V. Logic state held for VS of -5 V to -VBS. (Please refer to the Design Tip
DT97-3 for more details).
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2
IRS2111(S)PbF
Dynamic Electrical Characteristics
VBIAS (VCC, VBS) = 15 V, CL = 1000 pF and TA = 25 °C unless otherwise specified. The dynamic electrical characteristics
are measured using the test circuit shown in Fig. 3.
Symbol
Definition
Min. Typ. Max. Units Test Conditions
ton
Turn-on propagation delay
550
750
950
VS = 0 V
toff
Turn-off propagation delay
—
150
180
VS = 600 V
tr
Turn-on rise time
—
75
130
tf
Turn-off fall time
—
35
65
480
650
820
—
30
—
DT
Deadtime, LS turn-off to HS turn-on &
HS turn-off to LS turn-on
MT
Delay matching, HS & LS turn-on/off
ns
Static Electrical Characteristics
VBIAS (VCC, VBS) = 15 V and TA = 25 °C unless otherwise specified. The VIN, VTH, and IIN parameters are referenced to
COM. The VO and IO parameters are referenced to COM and are applicable to the respective output leads: HO or LO.
Symbol
VIH
VIL
Definition
Logic “1” input voltage for HO & logic “0” for LO
Logic “0” input voltage for HO & logic “1” for LO
Min. Typ. Max. Units Test Conditions
6.4
—
—
VCC = 10 V
9.5
—
—
VCC = 15 V
12.6
—
—
VCC = 20 V
—
—
3.8
—
—
6.0
VCC = 15 V
—
—
8.3
VCC = 20 V
V
VCC = 10 V
VOH
High level output voltage, VBIAS - VO
—
0.05
0.2
VOL
Low level output voltage, VO
—
0.02
0.1
ILK
Offset supply leakage current
—
—
50
IQBS
Quiescent VBS supply current
—
50
100
IQCC
Quiescent VCC supply current
—
70
180
IIN+
Logic “1” input bias current
—
30
50
VIN = VCC
IIN-
Logic “0” input bias current
—
—
1.0
VIN = 0 V
VBSUV+
VBS supply undervoltage positive going threshold
7.6
8.6
9.6
VBSUV-
VBS supply undervoltage negative going threshold
7.2
8.2
9.2
VCCUV+
VCC supply undervoltage positive going threshold
7.6
8.6
9.6
VCCUV-
VCC supply undervoltage negative going threshold
7.2
8.2
9.2
Output high short circuit pulsed current
200
290
—
IO+
mV
VB = VS = 600 V
µA
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Output low short circuit pulsed current
420
600
—
VIN = 0 V or VCC
V
VO = 0 V, VIN = VCC
mA
IO-
IO = 2 mA
PW ≤ 10 µs
VO = 15 V, VIN = 0 V
PW ≤ 10 µs
3
IRS2111(S)PbF
Functional Block Diagram
VB
HV
LEVEL
SHIFT
DEAD
TIME
UV
DETECT
R
PULSE
FILTER
R
Q
PULSE
GEN
IN
HO
S
VS
UV
DETECT
VCC
LO
DEAD
TIME
COM
Lead Definitions
Symbol Description
IN
VB
HO
VS
VCC
LO
COM
Logic input for high side and low side gate driver outputs (HO & LO), in phase with HO
High side floating supply
High side gate drive output
High side floating supply return
Low side and logic fixed supply
Low side gate drive output
Low side return
Lead Assignments
8 Lead DIP
8 Lead SOIC
IRS2111
IRS2111S
Part Number
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4
IRS2111(S)PbF
Figure 1. Input/Output Timing Diagram
Figure 2. Floating Supply Voltage Transient Test Circuit
Figure 3. Switching Time Test Circuit
Figure 4. Switching Time Waveform Definition
Figure 5. Deadtime Waveform Definitions
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Figure 6. Delay Matching Waveform Definitions
5
IRS2111(S)PbF
1500
1250
M ax.
1000
Typ.
750
M in.
500
250
0
-50
Turn-On Delay Time (ns)
Turn-On Delay Time (ns)
1500
1250
Max.
1000
Typ.
750
Min.
500
250
0
-25
0
25
50
75
100 125
10
12
Temperature ( oC)
350
350
Turn-Off Delay Time (ns))
Turn-Off Delay Time (ns)
400
300
Max
200
Typ
100
50
0
-50
18
20
V BIA S Supply Voltage (V)
400
150
16
Figure 7B Turn-On Time vs Voltage
Figure 7A Turn-On Time vs Temperature
250
14
300
250
Max
200
150
Typ
100
50
0
-25
0
25
50
75
Temperature (°C)
100
125
10
12
14
16
18
20
V BIAS Supply Voltage
Figure 8A Turn-Off Time vs Temperature
Figure 8B Turn-Off Time vs Voltage
350
Turn-On Rise Time (ns)
Turn-On Rise Time (ns)
400
300
250
200
Max
150
100
Typ
50
0
-50
Max
Typ
10
-25
0
25
50
75
100
Temperature (°C)
Figure 9A Turn-On Rise Time vs
Temperature
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400
350
300
250
200
150
100
50
0
12
14
16
18
20
125
V BIAS Supply Voltage (V)
Figure 9B Turn-On Rise Time vs Voltage
6
200
200
150
150
100
Turn-Off Fall Time (ns)
Turn-Off Fall Time (ns)
IRS2111(S)PbF
Max
50
Typ
0
-50
-25
0
25
50
75
Temperature (°C)
100
100
Max
50
Typ
0
125
10
18
20
Figure 10B Turn-Off Fall Time vs Voltage
1000
1000
M ax.
Typ.
750
M in.
500
Deadtime (ns)
Deadtime (ns)
16
1250
1250
750
Max.
Typ.
Min.
500
250
250
0
-25
0
25
50
75
100
10
125
12
14
16
18
20
VBIAS Supply Voltage (V)
Temperature (oC)
Figure 11A Deadtime vs Temperature
6
3
0
-50
-25
0
25
50
75
100
125
9
9
Min
6
Min
3
12
0
15
12
15
Figure 11B Deadtime vs Voltage
Logic “1” Input Threshold (V)
Logic “1” Input Threshold (V)
14
VBIAS Supply Voltage (V)
Figure 10A Turn-Off Fall Time vs Temperature
0
-50
12
10
12
14
16
18
20
Temperature (°C)
Figure 12A Logic “I” Input voltage for HO
& Logic “0” for LO vs Temperature
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Figure 12B Logic “I” Input voltage for HO
& Logic “0” for LO vs Voltage
7
3
0
-25
0
25
50
Temperature (°C)
75
100
15
12
9
Max
6
Max
6
3
9
0
12
-50
High Level Output Voltage (V)
Logic “0” Input Threshold (V)
15
10
125
12
16
18
Figure 13A Logic “0” Input voltage for HO
& Logic “I” for LO vs Temperature
Figure 13B Logic “0” Input voltage for HO
& Logic “I” for LO vs Voltage
1.0
1.0
0.8
0.6
0.4
Max.
0.2
Typ.
0.0
-50
-25
0
25
50
75
100
0.6
0.4
0.2
Max.
Typ.
0.0
10
125
12
Figure 14A. High Level Output
vs. Tem perature
Low Level Output Voltage (V)
0.4
0.3
0.2
Max.
0.1
Typ.
0
25
50
75
100
125
Temperature ( oC)
Figure 15A. Low Level Output vs. Temperature
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16
18
20
Figure 14B. High Level Output
vs. Supply Voltage
0.5
-25
14
V cc Supply Voltage (V)
Temperature ( C)
0
-50
20
0.8
o
Low Level Output Voltage (V)
14
VCC Logic Supply Voltage (V)
High Level Output Voltage (V)
Logic “0” Input Threshold (V)
IRS2111(S)PbF
0.5
0.4
0.3
0.2
Max.
0.1
Typ.
0
10
12
14
16
18
20
V cc Supply Voltage (V)
Figure 15B. Low Level Output vs. Voltage
8
IRS2111(S)PbF
400
300
200
Max.
100
0
-50
-25
0
500
Offset Supply Current (µA)
Offset Supply Current (µA)
500
25
50
75
100
400
300
200
M ax .
100
0
125
0
Figure 16A Offset Supply Current vs
Temperature
300
400
500
600
Figure 16B Offset Supply Current vs Voltage
200
VBS Supply Current (µA)
200
VBS Supply Current (µA)
200
V B B oos t V oltage (v)
Temperature (°C)
150
Max.
100
Typ.
50
0
150
Max.
100
Typ.
50
0
-50
-25
0
25
50
75
100
125
10
Temperature (°C)
12
14
16
18
20
VBS Floating Supply Voltage (V)
Figure 17A VBS Supply Current vs Temperature
Figure 17B VBS Supply Current vs Voltage
500
500
VCC Supply Current (µA)
VCC Supply Current (µA)
100
400
300
Max.
200
Typ.
100
0
400
300
Max
200
100
Typ
0
-50
-25
0
25
50
75
100
125
Temperature (°C)
Figure 18A VCC Supply Current vs Temperature
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10
12
14
16
18
20
VCC Fixed Supply Voltage (V)
Figure 18B VCC Supply Current vs Voltage
9
120
Logic “1” Input Bias Current (µA)
Logic “1” Input Bias Current (µA)
IRS2111(S)PbF
100
80
60
Max.
40
Typ.
20
0
-50
-25
0
25
50
75
100
120
100
80
Max.
60
40
20
Typ.
0
10
125
12
4
3
2
Max.
1
0
25
50
75
100
125
Logic “0” Input Bias Current (µA)
Logic “0” Input Bias Current (µA)
5
0
20
5
4
3
2
Max.
1
0
10
12
14
16
18
20
VCC Supply Voltage (V)
Temperature (°C)
Figure 20A. Logic “0” Input Current
vs. Temperature
Figure 20B. Logic “0” Input Current
vs. VCC Voltage
12
V B S U V LO Threshold -(V )
12
VBS UVLO Threshold +(V)
18
Figure 19B Logic “1” Input Current
vs. VCC Voltage
Figure 19A Logic “1” Input Current
vs. Temperature
-25
16
VCC Supply Voltage (V)
Temperature (°C)
-50
14
11
Max.
10
Typ.
9
8
7
Min.
11
Max.
10
9
Typ.
8
7
Min.
6
6
-50
-25
0
25
50
75
100
125
Temperature (°C)
Figure 21 VBS Undervoltage Threshold (+)
vs. Temperature
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-50
-25
0
25
50
75
100
125
Temperature(°C)
Figure 22 VBS Undervoltage Threshold (-)
vs. Temperature
10
IRS2111(S)PbF
11
10
VCC Undervoltage Lockout- (V)
Vcc Undervoltage Lockout +(V)
11
Max.
9
Typ.
8
Min.
7
6
-50
-25
0
25
50
75
100
10
Max.
9
Typ.
8
Min.
7
6
-50
125
-25
0
Temperature (°C)
50
75
100
125
Figure 24 VCC Undervoltage (-) vs Temperature
500
500
400
Output Source Current(mA)
( )
µΑ
Output Source Current(mA)
( )
µΑ
Figure 23 VCC Undervoltage (-) vs Temperature
Typ.
300
Min.
200
100
0
400
300
Typ.
200
100
Min.
0
-50
-25
0
25
50
75
100
125
10
12
Temperature (oC)
14
16
18
20
V BIAS Supply Voltage (V)
Figure 25B Output Source Current vs Voltage
Figure 25A Output Source Current vs Temperature
900
Output Sink Current(mA)
( )
µΑ
900
Output Sink Current (mA)
( )
µΑ
25
Temperature (°C)
750
Typ.
600
Min.
450
300
150
750
600
Typ.
450
Min.
300
150
0
0
-50
-25
0
25
50
75
100
125
10
Temperature ( oC)
Figure 26A Output Sink Current vs Temperature
12
14
16
18
20
V BIAS Supply Voltage (V)
Figure 26B Output Sink Current vs Voltage
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11
150
100
160 V
75
30 V
50
25
0
1E+2
1E+3
1E+4
1E+5
100
30 V
75
50
25
0
1E+2
1E+6
160 V
125
1E+3
1E+4
1E+5
1E+6
Frequency (kHz)
Frequency (kHz)
Figure 27. IR2111 TJ vs. Frequency (IRFBC20)
RGATE = 33 Ω, VCC = 15 V
Figure 28. IR2111 TJ vs. Frequency (IRFBC30)
RGATE = 22 Ω, VCC = 15 V
320 V
150
Junction Temperature (oC)
Junction Temperature(°C)
125
320 V
150
320 V
160 V
30V
125
100
75
50
25
0
1E+2
1E+3
1E+4
1E+5
1E+6
320 V 160 V 30 V
150
Junction Temperature(°C)
Junction Temperature(°C)
IRS2111(S)PbF
125
100
75
50
25
0
1E+2
1E+3
1E+4
1E+5
1E+6
Frequency (kHz)
Frequency (kHz)
Figure 29. IR2111 TJ vs. Frequency (IRFBC40)
RGATE = 15 Ω, VCC = 15 V
Figure 30. IR2111 TJ vs. Frequency (IRFPC50)
RGATE = 10 Ω, VCC = 15 V
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12
IRS2111(S)PbF
320 V
320 V 140 V
160 V
125
100
75
30 V
50
25
0
1E+2
150
1E+3
1E+4
1E+5
Junction Temperature (oC)
Junction Temperature (oC)
150
30 V
125
100
75
50
25
0
1E+2
1E+6
1E+3
1E+4
1E+5
1E+6
Frequency (kHz)
Frequency (kHz)
Figure 31. IR2111S TJ vs. Frequency (IRFBC20)
RGATE = 33 Ω, VCC = 15 V
Figure 32. IR2111S TJ vs. Frequency (IRFBC30)
RGATE = 22 Ω, VCC = 15 V
320 V 140 V
30 V
125
100
75
50
25
0
1E+2
320 V 140 V
1E+3
1E+4
1E+5
1E+6
30 V
150
Junction Temperature (oC)
Junction Temperature (oC)
150
125
100
75
50
25
0
1E+2
1E+3
1E+4
1E+5
1E+6
Frequency (kHz)
Frequency (kHz)
Figure 33. IR2111S TJ vs. Frequency (IRFBC40)
RGATE = 15 Ω, VCC = 15 V
Figure 34. IR2111S TJ vs. Frequency (IRFPC50)
RGATE = 10 Ω, VCC = 15 V
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13
IRS2111(S)PbF
Case outlines
01-6014
01-3003 01 (MS-001AB)
8-Lead PDIP
D
DIM
B
5
A
FOOTPRINT
8
6
7
6
5
H
E
1
6X
2
3
0.25 [.010]
4
e
A
6.46 [.255]
3X 1.27 [.050]
e1
0.25 [.010]
A1
.0688
1.35
1.75
A1 .0040
.0098
0.10
0.25
b
.013
.020
0.33
0.51
c
.0075
.0098
0.19
0.25
D
.189
.1968
4.80
5.00
.1574
3.80
4.00
E
.1497
e
.050 BASIC
e1
MAX
1.27 BASIC
.025 BASIC
0.635 BASIC
H
.2284
.2440
5.80
6.20
K
.0099
.0196
0.25
0.50
L
.016
.050
0.40
1.27
y
0°
8°
0°
8°
y
0.10 [.004]
8X L
8X c
7
C A B
NOTES:
1. DIMENSIONING & TOLERANCING PER ASME Y14.5M-1994.
2. CONTROLLING DIMENSION: MILLIMETER
3. DIMENSIONS ARE SHOWN IN MILLIMETERS [INCHES].
4. OUTLINE C ONFORMS TO JEDEC OUTLINE MS-012AA.
8-Lead SOIC
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MIN
.0532
K x 45°
A
C
8X b
8X 1.78 [.070]
MILLIMETERS
MAX
A
8X 0.72 [.028]
INCHES
MIN
5 DIMENSION DOES NOT INCLUDE MOLD PROTRUSIONS.
MOLD PROTRUSIONS NOT TO EXCEED 0.15 [.006].
6 DIMENSION DOES NOT INCLUDE MOLD PROTRUSIONS.
MOLD PROTRUSIONS NOT TO EXCEED 0.25 [.010].
7 DIMENSION IS THE LENGTH OF LEAD FOR SOLDERING TO
A SUBSTRATE.
01-6027
01-0021 11 (MS-012AA)
14
IRS2111(S)PbF
Tape & Reel
8-lead SOIC
LOAD ED TA PE FEED DIRECTION
A
B
H
D
F
C
N OT E : CO NTROLLING
D IM ENSION IN MM
E
G
C A R R I E R T A P E D IM E N S I O N F O R 8 S O I C N
M etr ic
Im p er i al
Co d e
M in
M ax
M in
M ax
A
7 .9 0
8.1 0
0. 31 1
0 .3 18
B
3 .9 0
4.1 0
0. 15 3
0 .1 61
C
11 .7 0
1 2. 30
0 .4 6
0 .4 84
D
5 .4 5
5.5 5
0. 21 4
0 .2 18
E
6 .3 0
6.5 0
0. 24 8
0 .2 55
F
5 .1 0
5.3 0
0. 20 0
0 .2 08
G
1 .5 0
n/ a
0. 05 9
n/ a
H
1 .5 0
1.6 0
0. 05 9
0 .0 62
F
D
C
B
A
E
G
H
R E E L D IM E N S I O N S F O R 8 S O IC N
M etr ic
Im p er i al
Co d e
M in
M ax
M in
M ax
A
32 9. 60
3 30 .2 5
1 2 .9 76
13 .0 0 1
B
20 .9 5
2 1. 45
0. 82 4
0 .8 44
C
12 .8 0
1 3. 20
0. 50 3
0 .5 19
D
1 .9 5
2.4 5
0. 76 7
0 .0 96
E
98 .0 0
1 02 .0 0
3. 85 8
4 .0 15
F
n /a
1 8. 40
n /a
0 .7 24
G
14 .5 0
1 7. 10
0. 57 0
0 .6 73
H
12 .4 0
1 4. 40
0. 48 8
0 .5 66
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15
IRS2111(S)PbF
LEADFREE PART MARKING INFORMATION
IRSxxxx
Part number
YWW?
Date code
Pin 1
Identifier
?
P
MARKING CODE
Lead Free Released
Non-Lead Free
Released
IR logo
?XXXX
Lot Code
(Prod mode - 4 digit SPN code)
Assembly site code
Per SCOP 200-002
ORDER INFORMATION
8-Lead PDIP IRS2111PbF
8-Lead SOIC IRS2111SPbF
8-Lead SOIC Tape & Reel IRS2111STRPbF
The SOIC-8 is MSL2 qualified.
The SOIC-14 is MSL3 qualified.
This product has been designed and qualified for the industrial level.
Qualification standards can be found at www.irf.com <http://www.irf.com/>
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245 Tel: (310) 252-7105
Data and specifications subject to change without notice. 6/14/2006
www.irf.com
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