ISL28278, ISL28478 ® Data Sheet September 28, 2006 Dual Micropower Single Supply Rail-to-Rail Input and Output (RRIO) Precision Op-Amp FN6145.1 Features • Low Power 120µA typ supply current for both channels The ISL28278 and ISL28478 are Dual and Quad channel micropower precision operational amplifier optimized for single supply operation at 5V and can operate down to 2.4V. For equivalent performance in a single channel op-amp reference EL8178. The ISL28278 and ISL28478 feature an Input Range Enhancement Circuit (IREC) which enables both parts to maintain CMRR performance for input voltages equal to the positive and negative supply rails. The input signal is capable of swinging 10% above the positive supply rail and to 100mV below the negative supply with only a slight degradation of the CMRR performance. The output operation is rail to rail. The both parts draw minimal supply current while meeting excellent DC-accuracy, AC-performance, noise and output drive specifications. The ISL28278 and ISL28478 can be operated from one lithium cell or two Ni-Cd batteries. The input range includes both positive and negative rail. • 225µV max offset voltage • 30pA typ input bias current • 300kHz gain-bandwidth product • 100dB typ PSRR and CMRR • Single supply operation down to 2.4V • Input is capable of swinging above V+ and below V(ground sensing) • Rail-to-rail input and output (RRIO) • Pb-free plus anneal available (RoHS compliant) Applications • Battery- or solar-powered systems • 4mA to 25mA current loops • Handheld consumer products • Medical devices • Thermocouple amplifiers • Photodiode pre-amps Ordering Information PART PART NUMBER MARKING TAPE & REEL ISL28278FAZ (See Note) 97/Tube 28278FAZ • pH probe amplifiers PACKAGE PKG. DWG. # 16 Ld QSOP MDP0040 (Pb-free) ISL28278FAZ-T7 28278FAZ 7” 16 Ld QSOP MDP0040 (See Note) (1000 pcs) (Pb-free) Coming Soon ISL28478FAZ (Note) 28478FAZ 97/Tube 16 Ld QSOP MDP0040 (Pb-free) 28478FAZ 7” 16 Ld QSOP MDP0040 Coming Soon (1000 pcs) (Pb-free) ISL28478FAZ-T7 (Note) NOTE: Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020. 1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2006. All Rights Reserved All other trademarks mentioned are the property of their respective owners. ISL28278, ISL28478 Pinouts ISL28478 (16 LD QSOP) TOP VIEW ISL28278 (16 LD QSOP) TOP VIEW OUT_A 1 NC 2 15 V+ IN-_A 2 14 OUT_B IN+_A 3 16 OUT_D 15 IN-_D + 16 NC 14 IN+_D + 13 IN-_B V+ 4 IN+_A 5 12 IN+_B IN+_B 5 EN_A 6 11 EN_B IN-_B 6 V- 7 10 NC OUT_B 7 NC 8 9 NC NC 8 2 13 V12 IN+_C + - IN-_A 4 + - + OUT_A 3 + NC 1 11 IN-_C 10 OUT_C 9 NC FN6145.1 September 28, 2006 ISL28278, ISL28478 Absolute Maximum Ratings (TA = +25°C) Output Short-Circuit Duration . . . . . . . . . . . . . . . . . . . . . . .Indefinite Ambient Operating Temperature Range . . . . . . . . .-40°C to +125°C Storage Temperature Range . . . . . . . . . . . . . . . . . .-65°C to +150°C Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.5V Supply Turn On Voltage Slew Rate . . . . . . . . . . . . . . . . . . . . . 1V/μs Differential Input Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5mA Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5V Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . V- - 0.5V to V+ + 0.5V ESD tolerance, Human Body Model . . . . . . . . . . . . . . . . . . . . . .3kV ESD tolerance, Machine Model . . . . . . . . . . . . . . . . . . . . . . . . .300V CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. IMPORTANT : All parameters having Min/Max specifications are guaranteed. Typical values are for information purposes only. Unless otherwise noted, all tests are at the specified temperature and are pulsed tests, therefore: TJ = TC = TA Electrical Specifications PARAMETER V+ = 5V, V- = 0V,VCM = 2.5V, RL = 10kΩ, TA = +25°C unless otherwise specified. Boldface limits apply over the operating temperature range, -40°C to +125°C DESCRIPTION CONDITIONS MIN TYP MAX UNIT -225 -450 ±20 225 450 µV VOS Input Offset Voltage ΔV OS -----------------ΔTime Long Term Input Offset Voltage Stability 1.2 µV/Mo ΔV OS ---------------ΔT Input Offset Drift vs Temperature 2.2 µV/°C IOS Input Offset Current ±5 30 600 pA ±10 30 80 pA -600 IB Input Bias Current -40°C to +85°C -30 -80 Input Noise Voltage Peak-to-Peak f = 0.1Hz to 10Hz 5.4 µVPP Input Noise Voltage Density fO = 1kHz 50 nV/√Hz iN Input Noise Current Density fO = 1kHz 0.14 pA/√Hz CMIR Input Voltage Range Guaranteed by CMRR test 0 CMRR Common-Mode Rejection Ratio VCM = 0V to 5V 80 75 100 dB PSRR Power Supply Rejection Ratio V+ = 2.4V to 5V 85 80 105 dB AVOL Large Signal Voltage Gain VO = 0.5V to 4.5V, RL = 100kΩ 200 190 300 V/mV VO = 0.5V to 4.5V, RL = 1kΩ 25 V/mV Output low, RL = 100kΩ 3 6 30 mV 130 175 225 mV eN VOUT Maximum Output Voltage Swing Output low, RL = 1kΩ SR Slew Rate GBW Gain Bandwidth Product 3 5 V Output high, RL = 100kΩ 4.990 4.97 4.996 V Output high, RL = 1kΩ 4.800 4.750 4.880 V 0.12 0.09 ±0.14 300 0.16 0.21 V/µs kHz FN6145.1 September 28, 2006 ISL28278, ISL28478 Electrical Specifications PARAMETER V+ = 5V, V- = 0V,VCM = 2.5V, RL = 10kΩ, TA = +25°C unless otherwise specified. Boldface limits apply over the operating temperature range, -40°C to +125°C (Continued) DESCRIPTION CONDITIONS MIN TYP MAX UNIT IS,ON Supply Current, Enabled All channels enabled. 120 156 175 µA IS,OFF Supply Current, Disabled All channels disabled. 4 7 9 µA ISC+ Short Circuit Sourcing Capability RL = 10Ω 29 24 31 mA ISC- Short Circuit Sinking Capability RL = 10Ω 24 20 26 mA VS Minimum Supply Voltage VINH Enable Pin High Level VINL Enable Pin Low Level IENH Enable Pin Input Current VEN = 5V IENL Enable Pin Input Current VEN = 0V 2.4 V 2 V 0.8 V -0.1 0.8 1 1.5 µA 0 +0.1 µA Typical Performance Curves +1 45 0 GAIN (dB) 35 VS = ±1.2V RL = 10k -2 VS = ±2.5V RL = 10k -3 -4 30 GAIN (dB) -1 40 VS = ±1.2V RL = 1k VS = ±2.5V RL = 1k -5 VOUT = 50mVp-p AV = 1 -6 C = 3pF L R =0/RG = INF -7 F 8 1k 10k 100k FREQUENCY (Hz) 1M VS = ±1.0V 1k 10k 100k 1M FIGURE 2. FREQUENCY RESPONSE vs SUPPLY VOLTAGE 0 INPUT OFFSET VOLTAGE (µV) INPUT OFFSET VOLTAGE (µV) AV = 100 15 RL = 10kΩ CL = 3pF 10 R = 100kΩ F RG = 1kΩ 5 FREQUENCY (Hz) 100 VCM = VDD/2 60 40 20 VDD = 5V 0 -20 -40 VS = ±1.2V 20 0 100 5M FIGURE 1. FREQUENCY RESPONSE vs SUPPLY VOLTAGE 80 VS = ±2.5V 25 VDD = 2.5V -60 -80 -20 VOS, µV -40 -60 -80 -100 -100 0 1 2 3 4 5 OUTPUT VOLTAGE (V) FIGURE 3. INPUT OFFSET VOLTAGE vs OUTPUT VOLTAGE 4 0 1 2 3 4 5 COMMON-MODE INPUT VOLTAGE (V) FIGURE 4. INPUT OFFSET VOLTAGE vs COMMON-MODE INPUT VOLTAGE FN6145.1 September 28, 2006 ISL28278, ISL28478 (Continued) 120 80 80 40 200 100 150 80 -40 0 GAIN (dB) 0 40 PHASE (°) GAIN (dB) PHASE -80 -40 -80 1 100 10 10k 1k 1M 100k 100 60 50 40 0 20 GAIN -50 0 -100 -20 10 -120 10M 100 1k 10k -150 1M 100k FREQUENCY (Hz) FREQUENCY (Hz) FIGURE 5. AVOL vs FREQUENCY @ 100kΩ LOAD FIGURE 6. AVOL vs FREQUENCY @ 1kΩ LOAD 10 VS = 5VDC 0 VSOURCE = 1Vp-p -10 R = 10kΩ L -20 A = +1 V -30 PSRR -40 0 -10 -20 CMRR (dB) TEMPERATURE (°C) 10 -50 -60 VS = ±2.5VDC VSOURCE = 1Vp-p RL = 10kΩ -30 -40 -50 -60 PSRR + -70 -70 -80 -80 -90 -90 -100 10 100 1k 10k 100k -100 10 1M 100 1k 10k 100k 1M TEMPERATURE (°C) PSRR (dB) FIGURE 7. PSRR vs FREQUENCY FIGURE 8. CMRR vs FREQUENCY 5.0 2.56 VIN 2.54 VOLTS (V) 2.48 VS = 5VDC VOUT = 0.1Vp-p RL = 1kΩ AV = +1 2.46 2.44 4 6 8 10 12 14 16 18 20 TIME (µs) FIGURE 9. SMALL SIGNAL TRANSIENT RESPONSE 5 2.0 VIN 1.0 0 2.42 2 VOUT 3.0 VOUT 2.50 0 VS = 5VDC VOUT = 2Vp-p RL = 1kΩ AV = -2 4.0 2.52 VOLTS (V) PHASE (°) Typical Performance Curves 0 50 100 150 200 250 TIME (µs) FIGURE 10. LARGE SIGNAL TRANSIENT RESPONSE FN6145.1 September 28, 2006 ISL28278, ISL28478 Typical Performance Curves (Continued) 1k VOLTAGE NOISE (nV/√Hz) CURRENT NOISE (pA/√Hz) 10.00 1.00 0.10 100 10 1 0.01 1 10 100 1k 10k 1 100k 10 1k 100 FREQUENCY (Hz) 10k 100k FREQUENCY (Hz) FIGURE 11. CURRENT NOISE vs FREQUENCY FIGURE 12. VOLTAGE NOISE vs FREQUENCY 6 V+ = 5V VIN VOLTS (V) VOLTAGE NOISE (1µV/DIV) 5 4 100K VS + 3 100K 2 Function Generator 33140A DUT + VOUT 1K VS - 1 5.4µVP-P 0 0 50 TIME (1s/DIV) FIGURE 13. 0.1Hz TO 10Hz INPUT VOLTAGE NOISE 100 TIME (ms) 150 200 FIGURE 14. INPUT VOLTAGE SWING ABOVE THE V+ SUPPLY AV = -1 VIN = 200mVp-p V+ = 5V V- = 0V EN INPUT 1V/DIV 135 115 95 0 75 55 35 2 2.5 3 3.5 4 4.5 5 5.5 SUPPLY VOLTAGE (V) FIGURE 15. SUPPLY CURRENT vs SUPPLY VOLTAGE 6 VOUT 0.1V/DIV SUPPLY CURRENT (µA) 155 0 10µs/DIV FIGURE 16. ENABLE TO OUTPUT DELAY TIME FN6145.1 September 28, 2006 ISL28278, ISL28478 Typical Performance Curves (Continued) 160 4.8 n = 12 n = 12 4.6 MAX 140 CURRENT (µA) CURRENT (µA) 150 MEDIAN 130 120 110 4.4 MAX 4.2 MEDIAN 4 3.8 3.6 MIN 100 MIN 3.4 90 -40 3.2 -20 0 20 40 60 80 TEMPERATURE (°C) 100 120 FIGURE 17. SUPPLY CURRENT vs TEMPERATURE VS = ±2.5V ENABLED, RL = INF -40 100 120 0 n = 12 -100 CURRENT (pA) CURRENT (pA) 20 40 60 80 TEMPERATURE (°C) 50 0 -200 MAX -300 -400 MEDIAN -500 -700 -40 -20 0 20 40 60 80 TEMPERATURE (°C) n = 12 -50 -100 MAX -150 -200 MEDIAN -250 MIN -600 -300 100 MIN -350 -40 120 -20 0 40 60 80 100 120 FIGURE 20. I BIAS(-) vs TEMPERATURE VS = ±2.5V 50 450.05 MAX 0 n = 12 MAX 400.05 n = 12 MEDIAN 20 TEMPERATURE (°C) FIGURE 19. I BIAS(+) vs TEMPERATURE VS = ±2.5V 350.05 Min MIN AVOL (V/mV) CURRENT (pA) 0 FIGURE 18. SUPPLY CURRENT vs TEMPERATURE VS = ±2.5V DISABLED, RL = INF 100 -50 -20 -100 -150 -200 -250 300.05 250.05 200.05 MEDIAN MIN 150.05 100.05 -300 -350 -40 50.05 -20 0 20 40 60 80 100 120 TEMPERATURE (°C) FIGURE 21. INPUT OFFSET CURRENT vs TEMPERATURE VS = ±2.5V 7 0.05 -40 -20 0 20 40 60 80 TEMPERATURE (°C) 100 120 FIGURE 22. AVOL vs TEMPERATURE RL=100k, VO @ +2V/-2V @ VS ±2.5V FN6145.1 September 28, 2006 ISL28278, ISL28478 Typical Performance Curves (Continued) 400 300 n = 12 n = 12 300 MAX VOLTAGE (µV) VOLTAGE (µV) 200 100 0 MEDIAN -100 MAX 200 100 0 MEDIAN MIN -200 -100 MIN -300 -40 -20 0 20 40 60 80 TEMPERATURE (°C) 100 -200 -40 120 FIGURE 23. INPUT OFFSET VOLTAGE vs TEMPERATURE VS = ±2.5V 0 100 120 140 n = 12 n = 12 130 MAX PSRR (dB) 120 130 110 100 MEDIAN 80 -40 0 MAX 110 MEDIAN 90 MIN -20 120 100 90 20 40 60 80 100 80 -40 120 MIN -20 0 TEMPERATURE (°C) 4.895 4.89 60 80 100 120 180 n = 12 170 MAX MAX 160 4.88 VOUT (mV) 4.875 4.87 MEDIAN 4.86 MIN 4.855 150 140 MEDIAN 130 MIN 120 4.85 110 4.845 4.84 -40 40 FIGURE 26. PSRR vs TEMPERATURE, FREQ = 0Hz, VS = ±1.2V TO ±2.5V n = 12 4.885 4.865 20 TEMPERATURE (°C) FIGURE 25. CMRR vs TEMPERATURE, FREQ = 0Hz, VCM = +2.5V TO -2.5V VOUT (V) 20 40 60 80 TEMPERATURE (°C) FIGURE 24. INPUT OFFSET VOLTAGE vs TEMPERATURE VS = ±1.2V 140 CMRR (dB) -20 100 -20 0 20 40 60 80 100 120 TEMPERATURE (°C) FIGURE 27. POSITIVE VOUT vs TEMPERATURE RL = 1k, VS = ±2.5V 8 -40 -20 0 20 40 60 80 100 120 TEMPERATURE (°C) FIGURE 28. NEGATIVE VOUT vs TEMPERATURE RL = 1k, VS = ±2.5V FN6145.1 September 28, 2006 ISL28278, ISL28478 Typical Performance Curves (Continued) 4.3 4.9984 n = 12 4.9982 MAX 4.998 4.1 4 VOUT (mV) VOUT (V) 4.9978 4.9976 MEDIAN Median 4.9974 MIN 4.9972 4.997 3.9 4.9966 3.5 MIN 3.4 -40 -20 0 20 40 60 80 TEMPERATURE (°C) 100 120 FIGURE 29. POSITIVE VOUT vs TEMPERATURE RL = 100k, VS = ±2.5V 14.5 -40 -20 0 20 40 60 80 TEMPERATURE (°C) 0.9 n = 12 CURRENT (uA) MAX 13 MEDIAN 12.5 MIN 12 MAX -20 0 20 40 60 80 TEMPERATURE (°C) 100 MIN -20 0 20 40 60 80 TEMPERATURE (°C) 100 120 FIGURE 32. IIH (EN) vs TEMPERATURE VS = ±2.5V 0.2 0.2 n = 12 0.19 0.17 SLEW RATE (V/µs)) 0.18 MAX 0.16 MEDIAN 0.14 0.13 0.12 MIN 0.11 n = 12 0.18 MAX 0.17 0.16 0.15 MEDIAN 0.14 0.13 0.12 0.1 0.09 -40 MEDIAN 0.7 0.55 -40 120 FIGURE 31. IIL (EN) vs TEMPERATURE VS = ±2.5V 0.15 0.75 0.6 11 0.19 0.8 0.65 11.5 -40 120 n = 12 0.85 13.5 100 FIGURE 30. NEGATIVE VOUT vs TEMPERATURE RL = 100k, VS = ±2.5V 14 CURRENT (nA) MEDIAN 3.7 3.6 4.9964 MAX 3.8 4.9968 SLEW RATE (V/µs) n = 12 4.2 MIN 0.11 -20 0 20 40 60 80 TEMPERATURE (°C) 100 120 FIGURE 33. +SLEW RATE vs TEMPERATURE VS = ±2.5V, INPUT = ±0.75V AV = 2 9 0.1 -40 -20 0 20 40 60 80 TEMPERATURE (°C) 100 120 FIGURE 34. -SLEW RATE vs TEMPERATURE VS = ±2.5V, INPUT = ±0.75V AV = 2 FN6145.1 September 28, 2006 ISL28278, ISL28478 Typical Performance Curves (Continued) JEDEC JESD51-3 LOW EFFECTIVE THERMAL CONDUCTIVITY TEST BOARD 1.4 1.2 1.2 1 POWER DISSIPATION (W) POWER DISSIPATION (W) JEDEC JESD51-7 HIGH EFFECTIVE THERMAL CONDUCTIVITY TEST BOARD 893mW 1 QS θ OP JA 16 =1 12 °C /W 0.8 0.6 0.4 0.2 0.8 633mW 0.6 θJ 0.4 QS O A =1 58 P1 °C 6 /W 0.2 0 0 0 25 50 75 85 100 125 0 150 25 75 85 100 50 125 150 AMBIENT TEMPERATURE (°C) AMBIENT TEMPERATURE (°C) FIGURE 35. PACKAGE POWER DISSIPATION vs AMBIENT TEMPERATURE FIGURE 36. PACKAGE POWER DISSIPATION vs AMBIENT TEMPERATURE Pin Descriptions ISL28278 (16 LD QSOP) ISL28478 (16 LD QSOP) PIN NAME EQUIVALENT CIRCUIT 3 1 OUT_A Circuit 3 Amplifier A output 4 2 IN-_A Circuit 1 Amplifier A inverting input 5 3 IN+_A Circuit 1 Amplifier A non-inverting input 15 4 V+ Circuit 4 Positive power supply 12 5 IN+_B Circuit 1 Amplifier B non-inverting input 13 6 IN-_B Circuit 1 Amplifier B inverting input 14 7 OUT_B Circuit 3 Amplifier B output 1, 2, 8, 9, 10, 16 8, 9 NC 10 OUT_C DESCRIPTION No internal connection Circuit 3 Amplifier C output 11 IN-_C Circuit 1 Amplifier C inverting input 12 IN+_C Circuit 1 Amplifier B non-inverting input 13 V- Circuit 4 Negative power supply 14 IN+_D Circuit 1 Amplifier D non-inverting input 15 IN-_D Circuit 1 Amplifier D inverting input 16 OUT_D Circuit 3 Amplifier D output 6 EN_A Circuit 2 Amplifier A enable pin internal pull-down; Logic “1” selects the disabled state; Logic “0” selects the enabled state. 11 EN_B Circuit 2 Amplifier B enable pin with internal pull-down; Logic “1” selects the disabled state; Logic “0” selects the enabled state. 7 V+ V+ IN- IN+ V+ LOGIC PIN V- VCIRCUIT 2 10 CAPACITIVELY COUPLED ESD CLAMP OUT V- CIRCUIT 1 V+ VCIRCUIT 3 CIRCUIT 4 FN6145.1 September 28, 2006 ISL28278, ISL28478 Applications Information Introduction The ISL28278 and ISL28478 are Dual and Quad channel CMOS rail-to-rail input, output (RRIO) micropower precision operational amplifier with an enable feature. The parts are designed to operate from single supply (2.4V to 5.0V) or dual supply (±1.2V to ±2.5V) while drawing only 120μA of supply current. The device has an input common mode range that extends 10% above the positive rail and up to 100mV below the negative supply rail. The output operation can swing within about 4mV of the supply rails with a 100kΩ load (reference Figures 27 through 30). This combination of low power and precision performance makes them suitable for solar and battery power applications. Rail-to-Rail Input The input common-mode voltage range of the ISL28278 and ISL28478 is from the negative supply to 10% greater than the positive supply without introducing additional offset errors or degrading performance associated with a conventional rail-to-rail input operational amplifier. Many rail-to-rail input stages use two differential input pairs, a longtail PNP (or PFET) and an NPN (or NFET). Severe penalties have to be paid for this circuit topology. As the input signal moves from one supply rail to another, the operational amplifier switches from one input pair to the other causing drastic changes in input offset voltage and an undesired change in magnitude and polarity of input offset current. The ISL28278 and ISL28487 achieve input rail-to-rail operation without sacrificing important precision specifications and degrading distortion performance. The devices’ input offset voltage exhibits a smooth behavior throughout the entire common-mode input range. The input bias current versus the common-mode voltage range gives us an undistorted behavior from typically 100mV below the negative rail and 10% higher than the V+ rail (0.5V higher than V+ when V+ equals 5V). Input Protection All input terminals have internal ESD protection diodes to both positive and negative supply rails, limiting the input voltage to within one diode beyond the supply rails. They have additional back-to-back diodes across the input terminals. For applications where the input differential voltage is expected to exceed 0.5V, external series resistors must be used to ensure the input currents never exceed 5mA. Rail-to-Rail Output A pair of complementary MOSFET devices are used to achieve the rail-to-rail output swing. The NMOS sinks current to swing the output in the negative direction. The PMOS sources current to swing the output in the positive direction. The ISL28278 and ISL28478 with a 100kΩ load 11 will swing to within 4mV of the positive supply rail and within 3mV of the negative supply rail. Enable/Disable Feature The ISL28278 has an EN pin that disables the device when pulled up to at least 2.0V. In the disabled state (output in a high impedance state), the part consumes typically 4µA. By disabling the part, multiple ISL28278 parts can be connected together as a MUX. In this configuration, the outputs are tied together in parallel and a channel can be selected by the EN pin. The EN pin also has an internal pull down. If left open, the EN pin will pull to the negative rail and the device will be enabled by default. The loading effects of the feedback resistors of the disabled amplifier must be considered when multiple amplifier outputs are connected together. Using Only One Channel The ISL28278 and ISL28478 are Dual and Quad channel opamps. If the application only requires one channel when using the ISL28278 or less than 4 channels when using the ISL28478, the user must configure the unused channel (s) to prevent them from oscillating. The unused channel (s) will oscillate if the input and output pins are floating. This will result in higher than expected supply currents and possible noise injection into the channel being used. The proper way to prevent this oscillation is to short the output to the negative input and ground the positive input (as shown in Figure 37). + 1/2 ISL28278 1/4 ISL28478 FIGURE 37. PREVENTING OSCILLATIONS IN UNUSED CHANNELS Proper Layout Maximizes Performance To achieve the maximum performance of the high input impedance and low offset voltage, care should be taken in the circuit board layout. The PC board surface must remain clean and free of moisture to avoid leakage currents between adjacent traces. Surface coating of the circuit board will reduce surface moisture and provide a humidity barrier, reducing parasitic resistance on the board. When input leakage current is a concern, the use of guard rings around the amplifier inputs will further reduce leakage currents. Figure 38 shows a guard ring example for a unity gain amplifier that uses the low impedance amplifier output at the same voltage as the high impedance input to eliminate surface leakage. The guard ring does not need to be a specific width, but it should form a continuous loop around both inputs. For further reduction of leakage currents, FN6145.1 September 28, 2006 ISL28278, ISL28478 components can be mounted to the PC board using Teflon standoff insulators. V+ HIGH IMPEDANCE INPUT 1/2 ISL28278 1/4 ISL28478 IN Current Limiting The ISL28278 and ISL28478 have no internal currentlimiting circuitry. If the output is shorted, it is possible to exceed the Absolute Maximum Rating for output current or power dissipation, potentially resulting in the destruction of the device. Power Dissipation FIGURE 38. GUARD RING EXAMPLE FOR UNITY GAIN AMPLIFIER Example Application Thermocouples are the most popular temperature-sensing device because of their low cost, interchangeability, and ability to measure a wide range of temperatures. The ISL28278 (Figure 39) is used to convert the differential thermocouple voltage into single-ended signal with 10X gain. The ISL28278's rail-to-rail input characteristic allows the thermocouple to be biased at ground and the amplifier to run from a single 5V supply. R4 10kΩ R2 10kΩ K TYPE THERMOCOUPLE T JMAX = T MAX + ( θ JA xPD MAXTOTAL ) (EQ. 1) where: • PDMAXTOTAL is the sum of the maximum power dissipation of each amplifier in the package (PDMAX) • PDMAX for each amplifier can be calculated as shown in Eq.2: V OUTMAX PD MAX = 2*V S × I SMAX + ( V S - V OUTMAX ) × ---------------------------RL (EQ. 2) 100kΩ R3 It is possible to exceed the +150°C maximum junction temperatures under certain load and power-supply conditions. It is therefore important to calculate the maximum junction temperature (TJMAX) for all applications to determine if power supply voltages, load conditions, or package type need to be modified to remain in the safe operating area. These parameters are related in Eq.1.: V+ + ISL28278 V- 410µV/°C where: + 5V • TMAX = Maximum ambient temperature • θJA = Thermal resistance of the package R1 100kΩ FIGURE 39. THERMOCOUPLE AMPLIFIER • PDMAX = Maximum power dissipation of 1 amplifier • VS = Supply voltage • IMAX = Maximum supply current of 1 amplifier • VOUTMAX = Maximum output voltage swing of the application • RL = Load resistance 12 FN6145.1 September 28, 2006 ISL28278, ISL28478 Quarter Size Outline Plastic Packages Family (QSOP) MDP0040 A QUARTER SIZE OUTLINE PLASTIC PACKAGES FAMILY D (N/2)+1 N E SYMBOL QSOP16 QSOP24 QSOP28 TOLERANCE NOTES PIN #1 I.D. MARK E1 1 (N/2) A 0.068 0.068 0.068 Max. - A1 0.006 0.006 0.006 ±0.002 - A2 0.056 0.056 0.056 ±0.004 - b 0.010 0.010 0.010 ±0.002 - c 0.008 0.008 0.008 ±0.001 - D 0.193 0.341 0.390 ±0.004 1, 3 E 0.236 0.236 0.236 ±0.008 - E1 0.154 0.154 0.154 ±0.004 2, 3 e 0.025 0.025 0.025 Basic - L 0.025 0.025 0.025 ±0.009 - L1 0.041 0.041 0.041 Basic - N 16 24 28 Reference - B 0.010 C A B e H C SEATING PLANE 0.007 0.004 C b C A B Rev. E 3/01 NOTES: 1. Plastic or metal protrusions of 0.006” maximum per side are not included. L1 A 2. Plastic interlead protrusions of 0.010” maximum per side are not included. 3. Dimensions “D” and “E1” are measured at Datum Plane “H”. c 4. Dimensioning and tolerancing per ASME Y14.5M-1994. SEE DETAIL "X" 0.010 A2 GAUGE PLANE L A1 4°±4° DETAIL X All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems. Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com 13 FN6145.1 September 28, 2006