KS88C01016/C01008/C01004/C01116/C01108/C01104 1 PRODUCT OVERVIEW PRODUCT OVERVIEW OVERVIEW Samsung's KS88 series of 8-bit single-chip CMOS microcontrollers offers a fast and efficient CPU, a wide range of integrated peripherals, and various mask-programmable ROM sizes. Important CPU features include: — Efficient register-oriented architecture — Selectable CPU clock sources — Idle and Stop power-down mode release by interrupt — Built-in basic timer with watchdog function A sophisticated interrupt structure recognizes up to eight interrupt levels. Each level can have one or more interrupt sources and vectors. Fast interrupt processing (within a minimum six CPU clocks) can be assigned to specific interrupt levels. KS88C01016/C01008/C01004/C01116/C01108/C01104 MICROCONTROLLER The KS88C01016/C01008/C01004/C01116/C01108/C01104 single-chip CMOS microcontroller is fabricated using a highly advanced CMOS process and is based on Samsung's newest CPU architecture. The KS88C01016/C01008/C01004/C01116/C01108/C01104 is the microcontroller which has maskprogrammable ROM. The KS88P01016/P01008/P01004/P01116/P01108/P01104 is the microcontroller which has one-timeprogrammable EPROM. Using a proven modular design approach, Samsung engineers developed the KS88C01016/C01008/C01004/C01116/C01108/C01104 by integrating the following peripheral modules with the powerful SAM87 RC core: — Three programmable I/O ports, including two 8-bit ports and one 3-bit port, for a total of 19 pins. — Internal LVD circuit and eight bit-programmable pins for external interrupts. — One 8-bit basic timer for oscillation stabilization and watchdog functions (system reset). — One 8-bit timer/counter and one 16-bit timer/counter with selectable operating modes. — One 8-bit counter with auto-reload function and one-shot or repeat control. The KS88C01016/C01008/C01004/C01116/C01108/C01104 is a versatile general-purpose microcontroller which is especially suitable for use as remote transmitter controller. It is currently available in a 24-pin SOP and SDIP package 1-1 PRODUCT OVERVIEW KS88C01016/C01008/C01004/C01116/C01108/C01104 FEATURES CPU Timers and Timer/Counters • • One programmable 8-bit basic timer (BT) for oscillation stabilization control or watchdog timer function • One 8-bit timer/counter (Timer 0) with two operating modes; Interval mode and PWM mode. • One 16-bit timer/counter with one operating modes; Interval mode SAM87RC CPU core Memory • Program memory (ROM) - KS88C01016/C01116: 15,872-byte (0000H-3E00H) - KS88C01008/C01108: 8-Kbyte (0000H-1FFFH) - KS88C01004/C01104: 4-Kbyte (0000H-0FFFH) • Low Voltage Detect Circuit • Low voltage detect for reset or Back-up mode. • Low level detect voltage – KS88C01016/C01008/C01004 : 2.20V (Typ) ± 200 mV – KS88C01116/C01108/C01104: 1.90V (Typ) ± 200 mV Data memory: 256-byte RAM Instruction Set • 78 instructions • IDLE and STOP instructions added for powerdown modes Instruction Execution Time • Auto Reset Function • Reset occurs when stop mode is released by P0. • When a falling edge is detected at Port 0 during Stop mode, system reset occurs. 500 ns at 8-MHz fOSC (minimum) Interrupts Operating Temperature Range • • • 13 interrupt sources with 10 vector. 5 level, 10 vector interrupt structure I/O Ports –40°C to + 85°C Operating Voltage Range • 1.7 V to 3.6 V at 4 MHz fOSC 2.0 V to 3.6 V at 8 MHz fOSC • Two 8-bit I/O ports (P0-P1) and one 3-bit port (P2) for a total of 19 bit-programmable pins • • Eight input pins for external interrupts Package Type Carrier Frequency Generator • One 8-bit counter with auto-reload function and one-shot or repeat control (Counter A) Back-up mode • 1-2 When VDD is lower than VLVD, the chip enters Back-up mode to block oscillation and reduce the current consumption. • 24-pin SOP/SDIP KS88C01016/C01008/C01004/C01116/C01108/C01104 PRODUCT OVERVIEW BLOCK DIAGRAM LVD TEST XIN XOUT Main OSC 8-bit Basic Timer 8-bit Timer/ Counter 16-bit Timer/ Counter P0.0-P0.7/INT0-INT4 P1.0-P1.7 Port 0(INTR) Port 1 Internal Bus P2.0/T0PWM Port I/O and Interrupt Control Port 2 P2.1/REM P2.2 SAM87RI CPU Carrier Generator (Counter A) 15-Kbyte ROM 256-Byte Register File Figure 1-1. Block Diagram 1-3 PRODUCT OVERVIEW KS88C01016/C01008/C01004/C01116/C01108/C01104 PIN ASSIGNMENTS VSS XIN XOUT TEST P0.0/INT0/INTR P0.1/INT1/INTR RESET /P0.2/INT2/INTR P0.3/INT3/INTR P0.4/INT4/INTR P0.5/INT4/INTR P0.6/INT4/INTR P0.7/INT4/INTR 24 1 23 2 22 3 4 KS88C01016/C01008 21 20 5 /C01004/C01116 19 6 /C01108/C01104 18 7 17 8 24-SOP/SDIP 16 9 (TOP VIEW) 15 10 14 11 13 12 VDD P2.2 P2.1/REM/ SCLK P2.0/T0PWN/T0CK/ SDAT P1.7 P1.6 P1.5 P1.4 P1.3 P1.2 P1.1 P1.0 Figure 1-2. Pin Assignment Diagram (24-Pin SOP/SDIP Package) 1-4 KS88C01016/C01008/C01004/C01116/C01108/C01104 PRODUCT OVERVIEW PIN DESCRIPTIONS Table 1-1. Pin Descriptions Pin Names Pin Type Pin Description Circuit Type 24- Pin Number Shared Functions P0.0-P0.7 I/O I/O port with bit-programmable pins. Configurable to input or push-pull output mode. Pull-up resistors are assignable by software. Pins can be assigned individually as external interrupt inputs with noise filters, interrupt enable/ disable, and interrupt pending control. Interrupt with Reset(INTR) is assigned to Port 0. 1 5-12 INT0 – INT4/INTR P1.0-P1.7 I/O I/O port with bit-programmable pins. Configurable to input mode or output mode. Pin circuits are either push-pull or nchannel open-drain type. Pull-up resistors are assignable by software. 2 13-20 P2.0 P2.1 P2.2 I/O 3-bit I/O port with bit-programmable pins. Configurable to input mode, push-pull output mode, or n-channel open-drain output mode. Input mode with pull-up resistors are assignable by software. The two pins of port2 have high current drive capability. 3 4 5 21-23 REM/T0CK XIN, XOUT – System clock input and output pins – 2,3 – TEST I Test signal input pin (for factory use only; must be connected to VSS). – 4 – VDD – Power supply input pin – 24 – VSS – Ground pin – 1 – 1-5 PRODUCT OVERVIEW KS88C01016/C01008/C01004/C01116/C01108/C01104 PIN CIRCUITS VDD Pull-up Resistor Pull-up Enable VDD Data Input/Output Output Disable VSS External Interrupt Noise filter INTR (Interrupt with RESET) Stop Figure 1-3. Pin Circuit Type 1 (Port 0) NOTE Interrupt with reset (INTR) is assigned to port 0 of KS88C01016/C01008/C01004/C01116/C01108 /C01104. It is designed to release stop status with reset. When the falling/rising edge is detected at any pin of Port 0 during stop status, non vectored interrupt INTR signal occurs, after then system reset occurs automatically. It is designed for a application which are using “stop mode” like remote controller. If stop mode is not used, INTR do not operates and it can be discarded. 1-6 KS88C01016/C01008/C01004/C01116/C01108/C01104 PRODUCT OVERVIEW PIN CIRCUITS (Continued) VDD Pull-up Resistor Pull-up Enable VDD Data Input/Output Open-drain Output Disable VSS Normal Input Noise filter Figure 1-4. Pin Circuit Type 2 (Port 1) 1-7 PRODUCT OVERVIEW KS88C01016/C01008/C01004/C01116/C01108/C01104 PIN CIRCUITS (Continued) VDD Pull-up Resistor (Typical 21KΩ ) Pull-up Enable P2CON.0 VDD Port 2.0 Data T0_PWN M U X Data P2.0/T0PWN Open-drain Output Disable VSS P2.0 Input Figure 1-5. Pin Circuit Type 3 (P2.0) 1-8 KS88C01016/C01008/C01004/C01116/C01108/C01104 PRODUCT OVERVIEW PIN CIRCUITS (Continued) VDD Pull-up Resistor (Typical 21K Ω) Pull-up Enable P2CON.1 VDD Port 2.1 Data CAOF(CACON.0) Carrier On/Off (P2.5) M U X Data P2.1/REM/T0CK Open-Drain Output Disable VSS P2.1 Input T0CK Noise filter Figure 1-6. Pin Circuit Type 4 (P2.1) 1-9 PRODUCT OVERVIEW KS88C01016/C01008/C01004/C01116/C01108/C01104 PIN CIRCUITS (Continued) VDD Pull-up Resistor (Typical 21K Ω) Pull-up Enable VDD Data In/Out Open-drain Output Disable VSS Normal Input Figure 1-7. Pin Circuit Type 5 (P2.2) 1-10 KS88C01016/C01018/C01004/C01116/C01108/C01104 13 ELECTRICAL DATA ELECTRICAL DATA OVERVIEW In this section, KS88C01016/C01008/C01004/C01116/C01108/C01104 electrical characteristics are presented in tables and graphs. The information is arranged in the following order: — Absolute maximum ratings — D.C. electrical characteristics — Data retention supply voltage in Stop mode — Stop mode release timing when initiated by a Reset — I/O capacitance — A.C. electrical characteristics — Input timing for external interrupts (port 0) — Oscillation characteristics — Oscillation stabilization time 13-1 ELECTRICAL DATA KS88C01016/C01018/C01004/C01116/C01108/C01104 Table 13-1. Absolute Maximum Ratings (TA = 25°C) Rating Unit Supply voltage Parameter Symbol VDD – Conditions – 0.3 to + 6.5 V Input voltage VIN – – 0.3 to VDD + 0.3 V Output voltage VO All output pins – 0.3 to VDD + 0.3 V Output current High I OH One I/O pin active – 18 mA All I/O pins active – 60 Output current Low I OL One I/O pin active + 30 Total pin current for ports 0, 1, and 2 + 100 Total pin current for port 3 + 40 mA Operating temperature TA – – 40 to + 85 °C Storage temperature TSTG – – 65 to + 150 °C Table 13-2. D.C. Electrical Characteristics (TA = – 40°C to + 85°C, VDD = 2.0 V to 3.6 V) Parameter Symbol Operating Voltage VDD Conditions fOSC =8MHz Min Typ Max Unit 2.0 – 3.6 V 1.7 – 3.6 0.8 VDD – VDD (Instruction clock = 1.33 MHz) fOSC = 4MHz (Instruction clock = 0.67 MHz) Input High voltage Input Low voltage Output High voltage VIH1 All input pins except VIH2 and VIH3 VIH2 XIN VIL1 All input pins except VIL2 and VIL3 VIL2 XIN VOH1 VDD= 2.4 V, IOH = – 6 mA Port 2.1 only, TA = 25°C VDD – 0.7 VOH2 VDD = 2.4 V, IOH = – 2.2mA VDD - 0.7 – – VDD - 1.0 – – VDD – 0.3 0 VDD – 0.2 VDD VDD = 2.4 V, IOH = – 1 mA All output pins except Port2, TA = 25°C 13-2 V 0.3 V Port 2.0, 2.2, TA = 25°C VOH3 V KS88C01016/C01018/C01004/C01116/C01108/C01104 ELECTRICAL DATA Table 13-2. D.C. Electrical Characteristics (Continued) (TA = – 40°C to + 85°C, VDD = 2.0 V to 3.6 V) Parameter Output Low voltage Symbol VOL1 Conditions Min VDD = 2.4 V, IOL = 12 mA, port Typ Max 0.4 0.5 0.4 0.5 0.4 1.0 – 1 Unit 2.1 only, TA = 25°C VOL2 VDD = 2.4 V, IOL = 5 mA - Port 2.0,2.2, TA = 25°C VOL3 IOL = 1 mA Ports 0 and 1, TA = 25°C ILIH1 VIN = VDD All input pins except XIN and XOUT ILIH2 VIN = VDD, XIN and XOUT ILIL1 VIN = 0 V All input pins except XIN, XOUT ILIL2 VIN = 0 V XIN and XOUT Output High leakage current ILOH VOUT = VDD All output pins – – 1 µA Output Low leakage current ILOL VOUT = 0 V All output pins – – –1 µA Pull-up resistors RL1 VDD = 2.4V, VIN = 0 V; 44 55 95 KΩ - 5 9 mA 2.6 5 1.0 2.5 0.7 2.0 1 6 Input High leakage current Input Low leakage current – µA 20 – – –1 µA – 20 TA = 25°C , Ports 0-2 Supply current IDD1 (note) VDD = 3.6 V ± 10% 8-MHz crystal 4-MHz crystal IDD2 Idle mode; VDD = 3.6 V ± 10% 8-MHz crystal – 4-MHz crystal IDD3 Stop mode; VDD = 3.6 V - uA NOTE: Supply current does not include current drawn through internal pull-up resistors or external output current loads. 13-3 ELECTRICAL DATA KS88C01016/C01018/C01004/C01116/C01108/C01104 Table 13-3. Characteristics of Low Voltage Detect circuit (TA = – 40 °C to + 85 °C) Parameter Symbol Conditions Min Typ Max Unit ∆V – - 30 300 mV Low level detect voltage (KS88C01016/C01008/C01004) VLVD – 2.0 2.20 2.40 V Low level detect voltage (KS88C01116/C01108/C01104) VLVD – 1.70 1.90 2.1 V Hysteresys Voltage of LVD (Slew Rate of LVD) Table 13-4. Data Retention Supply Voltage in Stop Mode (TA = – 40 °C to + 85 °C) Parameter Symbol Conditions Min Typ Max Unit Data retention supply voltage VDDDR – 1.0 – 3.6 V Data retention supply current IDDDR VDDDR = 1.0 V Stop mode – – 1 µA Table 13-5. Input/Output Capacitance (TA = – 40°C to + 85°C, VDD = 0 V) Parameter Symbol Conditions Min Typ Max Unit Input capacitance CIN f = 1 MHz; unmeasured pins are connected to VSS — — 10 pF Output capacitance COUT I/O capacitance CIO Table 13-6. A.C. Electrical Characteristics (TA = – 40°C to + 85°C) Parameter Interrupt input, High, Low width 13-4 Symbol Conditions Min Typ Max Unit tINTH, tINTL P0.0–P0.7, VDD =3.6 V 200 300 — ns KS88C01016/C01018/C01004/C01116/C01108/C01104 ELECTRICAL DATA tINTL tINTH 0.8 VDD 0.2 VDD NOTE: The unit t CPU means one CPU clock period. Figure 13-1. Input Timing for External Interrupts (Port 0) Table 13-7. Oscillation Characteristics (TA = – 40°C + 85°C) Oscillator Clock Circuit Crystal Conditions C1 XIN Min Typ Max Unit CPU clock oscillation frequency 1 – 8 MHz CPU clock oscillation frequency 1 – 8 MHz XIN input frequency 1 – 8 MHz XOUT C2 Ceramic C1 XTIN XTOUT C2 External clock External Clock Open Pin XIN XOUT 13-5 ELECTRICAL DATA KS88C01016/C01018/C01004/C01116/C01108/C01104 Table 13-8. Oscillation Stabilization Time (TA = – 40°C + 85°C, VDD = 3.6 V) Min Typ Max Unit Main crystal Oscillator fOSC > 400 kHz Test Condition – – 20 ms Main ceramic Oscillation stabilization occurs when VDD is equal to the minimum oscillator voltage range. – – 10 ms External clock (main system) XIN input High and Low width (tXH, tXL) 25 – 500 ns Oscillator stabilization wait time tWAIT when released by a reset (1) – 216/ fOSC – ms tWAIT when released by an interrupt (2) – – – ms NOTES: 1. fOSC is the oscillator frequency. 2. The duration of the oscillation stabilization time (tWAIT) when it is released by an interrupt is determined by the setting in the basic timer control register, BTCON. Instruction Clock Instruction Clock 1.33 MHz 8 MHz B 1.00 MHz 6 MHz 670 kHz 500 kHz 4 kHz A 250 kHz 400 kHz 8.32 kHz 1 2 3 4 5 6 7 Supply Voltage (V) Instruction Clock = 1/6n x oscillator frequency (n = 1, 2, 8, 16) A 1.7 V: 4 MHz b 2.0 V: 8 MHz Figure 13-2. Operating Voltage Range of KS88C01016/C01008/C01004/C01116/C01108/C01104 13-6 KS88C01016/C01018/C01004/C01116/C01108/C01104 14 MECHANICAL DATA MECHANICAL DATA OVERVIEW The KS88C01016/C01008/C01004/C01116/C01108/C01104 microcontroller is currently available in a 24-pin SOP and SDIP package. 0-8 #13 #12 15.74 MAX 0.10 0.15 15.34 2.30 ± #1 ± 0.20 + 0.10 - 0.05 2.50 MAX 24-SOP-375 0.85 ± 0.20 7.50 ± 9.53 0.20 10.30 ± 0.30 #24 1.27 (0.69) 0.38 NOTE: + 0.10 - 0.05 0.05 MIN 0.10 MAX Dimensions are in millimeters. Figure 14-1. 24-Pin SOP Package Mechanical Data 14-1 MECHANICAL DATA KS88C01016/C01018/C01004/C01116/C01108/C01104 #13 0-15 0.2 5 6.40 24-SDIP-300 +0 - 0 .10 .05 7.62 ± 0.20 #24 0.46 ± 0.10 (1.70) 0.89 ± 0.10 NOTE: 1.778 0.20 22.95 ± 0.20 0.51 MIN 3.25 ± 23.35 MAX 5.08 MAX #12 3.30 ± 0.30 #1 Dimensions are in millimeters. Figure 14-2. 24-Pin SDIP Package Mechanical Data 14-2