Order this document by MC34016/D The MC34016 is a telephone line interface meant for use in cordless telephone base stations for CT0, CT1, CT2 and DECT. The circuit forms the interface towards the telephone line and performs all speech and line interface functions like dc and ac line termination, 2–4 wire conversion, automatic gain control and hookswitch control. Adjustment of transmission parameters is accomplished by two 8–bit registers accessible via the integrated serial bus interface and by external components. • DC Masks for Voltage and Current Regulation • • • • • • • CORDLESS UNIVERSAL TELEPHONE INTERFACE SEMICONDUCTOR TECHNICAL DATA Supports Passive or Active AC Set Impedance Applications Double Wheatstone Bridge Sidetone Architecture Symmetrical Inputs and Outputs with Large Signal Swing Capability 20 1 Gain Setting and Mute Function for Tx and Rx Amplifiers P SUFFIX PLASTIC PACKAGE CASE 738 Very Low Noise Performance Serial Bus Interface SPI Compatible Operation from 3.0 to 5.5 V FEATURES 20 Line Driver Architecture • Two DC Masks for Voltage Regulation • • • • 1 DW SUFFIX PLASTIC PACKAGE CASE 751D Two DC Masks for Current Regulation Passive or Active Set Impedance Adjustment Double Wheatstone Bridge Architecture Automatic Gain Control Function PIN CONNECTIONS Transmit Channel • Symmetrical Inputs Capable of Handling Large Voltage Swing • • • Clk 1 20 BEN Gain Select Option via Serial Bus Interface Data 2 Transmit Mute Function, Programmable via Bus Out2 3 19 LAO 18 LAI Large Voltage Swing Capability at the Telephone Line Stab 4 17 SRF 16 AGC Gnd 5 Receive Channel • Double Sidetone Architecture for Optimum Line Matching • • • Out1 7 15 Tx2 14 Tx1 VCC 8 Iref 9 HYL 10 13 Rx1 12 Rx2 11 HYS HKSW 6 Symmetrical Outputs Capable of Producing High Voltage Swing Gain Select Option via Serial Bus Interface Receive Mute Function, Programmable via Serial Bus (Top View) Serial Bus Interface • 3–Wire Connection to Microcontroller • • • ORDERING INFORMATION One Programmable Output Meant for Driving a Hookswitch Two Programmable Outputs Capable of Driving Low Ohmic Loads Two 8–Bit Registers for Parameter Adjustment Device MC34016P MC34016DW Operating Temperature Range TA = –20° to +70°C Motorola, Inc. 1996 MOTOROLA ANALOG IC DEVICE DATA Package DIP SO–20 Rev 1 1 MC34016 Representative Block Diagram Rx1 HYS HYL Rx Outputs LAI Rx IBG Rx2 Tx1 Tx Inputs Tx2 SRF Line Driver MC34016 LAO VBG Tx Hook Switch Gnd + Supply Serial Bus Interface AGC A (Tip) – VCC Iref Clk Data BEN Out1 Out2 HKSW AGC B (Ring) +5.0 V Serial Bus Inputs Logic Outputs This device contains 610 active transistors + 242 gates. MAXIMUM RATINGS Rating Symbol Value Unit VCC –0.5, 6.5 V All Other Inputs Vin –0.5, VCC +0.5 V Operating Ambient Temperature TA –20 to +70 °C Junction Temperature TJ +150 °C Operation Supply Voltage NOTE: ESD data available upon request. 2 MOTOROLA ANALOG IC DEVICE DATA MC34016 DC ELECTRICAL CHARACTERISTICS (All parameters are specified with Bit 0 of Register 1 set to 1, the rest of the bits in both registers set to 0, TA = 25°C, VCC = 5.0 V, Iline = 15 mA, f = 1.0 kHz, Test Circuit in Figure 9, unless otherwise noted.) Parameter Condition Min Typ Max Unit Iline = 5.0 mA Iline = 15 mA Iline = 60 mA 3.7 4.2 6.6 4.0 4.5 6.85 4.3 4.8 7.1 V VOLTAGE REGULATION Line Voltage Vline CURRENT REGULATION (Bit 4, Reg.1 = 1; Bit 1, Reg. 2 = 1; RAGC = 47 kΩ) Line Voltage Vline Iline = 15 mA 4.2 4.5 4.8 V Line Current Iline Vline = 10 V Vline = 35 V – – 35 56 – – mA Line Current Iline in Protection Mode Vline = 70 V – 28 – mA Operating Supply Voltage VCC – 3.0 – 5.5 V Current Consumption from VCC VCC = 3.0 V, all Bits to 0 VCC = 5.0 V, all Bits to 0 – – 3.0 3.5 4.0 4.5 mA Source Capabiltiy Pin LAO in Speech Mode VLAO = 0.7 V – – –2.0 mA Source Capability Pin LAO in Dialing Mode (Bit 5, Reg. 1 = 1) VLAO = 0.7 V – – –5.0 mA Internal Pull Down Resistor at Pin LAO – – 11 – kΩ Bias Voltage at Pins HYL, HYS and LAI – – 1.3 – V Bias Voltage at Pins Tx1 and Tx2 – – 1.5 – V Bias Voltage at Pins Rx1 and Rx2 – – 1.3 – V DC BIASING LOGIC INPUTS Logic Low Level Pins Clk, Data, BEN – – – 0.6 V Logic High Level Pins Clk, Data, BEN – 2.2 – – V Output Voltage at VCC – 1.3 V – – –1.0 mA Output Voltage at 0.5 V 5.0 – – mA LOGIC OUTPUTS Source Capability from Pins HKSW, Out1, Out2 Sink Capability into Pins HKSW, Out1, Out2 AC ELECTRICAL CHARACTERISTICS (All parameters are specified with Bit 0 of Register 1 set to 1, the rest of the bits in both registers set to 0, TA = 25°C, VCC = 5.0 V, Iline = 15 mA, f = 1.0 kHz, Test Circuit in Figure 9, unless otherwise noted.) Parameter Condition Min Typ Max Unit Transmit Gain from VTx to Vline MC34016P MC34016DW VTx = 0.1 Vrms –1.0 –1.25 0.25 –0.20 1.5 0.85 dB Gain Variation with Line Current Referred to Iline = 15 mA with the AGC Function Switched “Off” Iline = 70 mA, Bit 0, Reg. 2 = 1 –0.7 – 0.7 dB Gain Increase in 6.0 dB Mode Bit 4, Reg. 2 = 1 5.3 6.0 6.7 dB Gain Reduction in Mute Condition Bit 2, Reg. 2 = 1 65 – – dB Input Impedance at Tx1 or Tx2 – – 30 – kΩ Maximum Input Swing for VTx THD ≤ 2% – 4.0 – Vpp TRANSMIT CHANNEL THD at the Line (Vline) VTx = 3.0 dBm – 1.0 2.0 % 200 Ω Between Tx1 and Tx2 – –79 – dBmp Receive Gain from Vline to VRx Vline = 0.1 Vrms –1.0 0 1.0 dB Gain Variation with Line Current Referred to Iline = 15 mA with the AGC Function Switched “Off” Iline = 70 mA, Bit 0, Reg. 2 = 1 –0.7 – 0.7 dB Psophometrically Weighted Noise Level at the Line (Vline) RECEIVE CHANNEL MOTOROLA ANALOG IC DEVICE DATA 3 MC34016 AC ELECTRICAL CHARACTERISTICS (continued) (All parameters are specified with Bit 0 of Register 1 set to 1, the rest of the bits in both registers set to 0, TA = 25°C, VCC = 5.0 V, Iline = 15 mA, f = 1.0 kHz, Test Circuit in Figure 9, unless otherwise noted.) Parameter Condition Min Typ Max Unit Gain Increase in 6.0 dB Mode Bit 5, Reg. 2 = 1 5.3 6.0 6.7 dB Gain Reduction in Mute Condition Bit 3, Reg. 2 = 1 70 – – dB Input Impedance at HYL or HYS – – 30 – kΩ Output Impedance at Rx1 or Rx2 – – 150 – Ω Maximum Input Swing at HYL or HYS for THD ≤ 2% – 800 – mVpp Maximum Output Swing VRx for THD ≤ 10% – 3.5 – Vpp Total Harmonic Distortion at VRx Vline = 3.0 dBm – 1.0 2.0 % 200 Ω Between Tx1 and Tx2 – 80 – µVrms Iline = 70 mA 5.0 6.0 7.0 dB – – 20 – mA RECEIVE CHANNEL Psophometrically Weighted Noise Level at VRx AUTOMATIC GAIN CONTROL Gain Reduction in Transmit and Receive Channel with Respect to Iline = 15 mA Highest Line Current for Maximum Gain Lowest Line Current for Minimum Gain – – 60 – mA Gain Reduction in Transmit and Receive Channel with Respect to Iline = 35 mA Iline = 85 mA, Bit 1, Reg. 2 = 1 5.0 6.0 7.0 dB Highest Line Current for Maximum Gain Bit 1, Reg. 2 = 1 – 40 – mA Lowest Line Current for Minimum Gain Bit 1, Reg. 2 = 1 – 80 – mA f = 1.0 kHz 20 – – dB Iline = 15 mA, Bit 0, Reg. 2 = 1 – – –20 dB – – – 550 kHz BEN Rising Edge Setup Time Before First Clk Rising Edge See t1 in Timing Diagram 500 – – ns Data Setup Time Before Clk Rising Edge See t2 in Timing Diagram 500 – – ns Data Hold Time After Clk Rising Edge See t3 in Timing Diagram 500 – – ns BEN Falling Edge Delay Time After Last Clk Rising Edge See t4 in Timing Diagram 1.5 – – µs BEN Rising Edge Delay Time After Last BEN Falling Edge See t5 in Timing Diagram 6.0 – – µs – – 2.5 – V BALANCE RETURN LOSS Balance Return Loss with Respect to 600Ω SIDETONE Voltage Gain from VTx to VRx SERIAL BUS Clock Frequency Power Supply Reset Voltage VCC 4 MOTOROLA ANALOG IC DEVICE DATA MC34016 PIN FUNCTION DESCRIPTION Pin Symbol 1 Clk Serial bus clock input 2 Data Serial bus data input 3 Out2 Logic output 2 4 Stab Line driver compensation 5 Gnd Ground 6 HKSW 7 Out1 Logic output 1 8 VCC Supply input (+5.0 V) 9 Iref Reference current adjustment 10 HYL Hybrid input for long lines 11 HYS Hybrid input for short lines 12 Rx2 Receive output 2 13 Rx1 Receive output 1 14 Tx1 Transmit input 1 15 Tx2 Transmit input 2 16 AGC Automatic gain control input 17 SRF Sidetone reference input 18 LAI Line amplifier input 19 LAO Line amplifier output 20 BEN Serial bus enable input MOTOROLA ANALOG IC DEVICE DATA Description Logic output for the hook switch 5 MC34016 DESCRIPTION OF THE CIRCUIT Throughout this part, please refer to the typical application of Figure 10. The data given in this chapter refers to typical data of the characteristics. ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ with : I R S + I x line R AGC AGC Iknee = 21 µA for AGC ratio 1:2 Iknee = 31 µA for AGC ratio 3:5 DC OPERATION For dc, the MC34016 incorporates four different masks which can be selected via the serial bus interface: Bit 4, Reg. 1 ‘DC Mask’ Bit 5, Reg. 1 ‘DC Mode’ Bit 1, Reg. 2 ‘AGC Ratio’ DC Mask Selected 0 0 X Voltage Regulation Mask X 1 X Pulse Dial Mask 1 0 0 Current Regulation Mask with AGC Ratio 1:2 1 0 1 Current Regulation Mask with AGC Ratio 3:5 X = don’t care Voltage Regulation Mask The voltage regulation mask is the default setting of the MC34016 after power–up. In this mode, the circuit behaves as a zener with a series resistor. The line voltage can be expressed as: Vline = VBG + (IBG x RDC1) + (Iline x RS) with: VBG =1.3 V IBG = 5.2 µA RDC1 = DC setting resistor of 470 kΩ in the typical application Iline = Line current RS = Slope resistor of 50 Ω in the typical application thus: Vline = 3.75 + (50 x Iline) By choosing different values of RDC1, the zener voltage can be adjusted to fit country specific requirements. In Figure 1, a curve shows Vline versus Iline for different RDC1 values. Pulse Dial Mask In this mask, the circuit is forced into a very low voltage drop mode meant for pulse dialing (e.g. make period during pulse dialing). Pin LAO of the MC34016 sources a current of 5.0 mA in this mode, saturating output transistor Q1. The line voltage Vline is now determined by the saturation voltage of Q1 and the dc slope resistor RS: With RS = 50 Ω and RAGC = 47 kΩ, and the AGC ratio set to 3:5, IAGC will equal Iknee at a line current of 29 mA. With the AGC ratio set to 1:2, the knee occurs at 20 mA. Above these line currents, it can be derived that the dc slope of the circuit changes to: R x R DC1 R R 2.5 x S S Slope R AGC With the component values mentioned, a slope of 1300 Ω will occur. Figures 3 and 4 shows Vline versus Iline in the two current regulation masks for different values of RDC1. When IAGC reaches 62 µA for AGC ratio 3:5 or 52 µA in case of AGC ratio 1:2, the MC34016 will enter protection mode after about 800 ms. In practice this mode occurs only under overload conditions. In protection mode, the MC34016 decreases the power dissipation in Q1 by drastically increasing the dc slope starting from Iknee. This results in a reduced line current which remains practically constant over line voltage. With the equation for Iagc it can be derived that: ) + ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ AGC ratio Line Current to Enter Protection Mode Line Current in Protection Mode 3:5 58 mA 29 mA 1:2 49 mA 20 mA Once the MC34016 enters protection mode, it remains there until the output HKSW is toggled via Bit 0 of Register 1 (on–hook, off–hook). Supply Voltage VCC The MC34016 operates from an external supply within a voltage range of 3.0 to 5.5 V. The current consumption with all bits set to 0, equals 3.0 mA at 3.0 V and 3.5 mA at 5.5 V. AC SET IMPEDANCE The MC34016 offers two possibilities for the adjustment of the ac set impedance. Either a passive or an active set impedance can be obtained. Passive Set Impedance In this application, the set impedance is formed by the ac impedance of the circuit itself in parallel with resistor RSET and capacitor CSET. An equivalent network equals: Vline = VCE(sat)Q1 + (RS x Iline) ≅ 0.1 + (50 x Iline) Figure 2 shows Vline versus Iline. Current Regulation Masks These masks are equal to the voltage regulation mask up to a knee current. Above this current, the dc slope changes to a higher value fulfilling requirements such as those in France. Vline = 3.75 + (RS x Iline) RDC1 CM RDC1 x CM x RS RS RSET CSET for IAGC < Iknee Vline = [IBG + (2.5 x (IAGC – Iknee))] x RDC1 + [VBG + (RS x Iline)] for IAGC > Iknee 6 MOTOROLA ANALOG IC DEVICE DATA MC34016 With the component values of the typical application, the inductor has a value of about 2.4 H and RDC1 equals 470 kΩ. In the audio range of 300–3400 Hz, these components form a fairly large parallel impedance to RSET and CSET. Therefore, the set impedance is mainly determined by the passive network R SET and C SET. In the typical application, RSET is 600 Ω, but it can easily be replaced by a complex network to obtain a complex set impedance. Active Set Impedance An active set impedance can be obtained by placing a resistor between pin LAI and SRF (RSRF) as shown in Figure 11. By doing so, the MC34016 itself generates the ac set impedance and RSET and CSET can be omitted. An equivalent network now equals: RDC1 RDC1 x CM x RS ((RDC1 + RSRF) x RS/RSRF) – RS RSRF RS CM Ignoring the effect of the inductor and the parallel path RDC1 + RSRF again for audio frequencies, the set impedance is now determined by: Z SET + RRS SRF x (R DC1 ) RSRF) With RS = 50 Ω and RDC1 = 470 kΩ, RSRF should be 43 kΩ to obtain a 600 Ω set impedance. To obtain a complex set impedance, R DC1 can be made complex. In such case, the dc mask can be adjusted with the dc value of RDC1 and the set impedance can be adjusted with the ac value of RDC1. An application with an active set impedance is interesting, particularly in countries like France, where with the dc current regulation mask, rather high line voltages can be reached. With a passive set impedance, this would result in a high cost for capacitor CSET. TRANSMIT CHANNEL Inputs The inputs Tx1 and Tx2 are designed to handle large signal levels of up to +3.0 dBm. The input impedance for both Tx1 and Tx2 equals 30 kΩ. The inputs are designed for symmetrical as well as asymmetrical use. In asymmetrical drive, one input can be tied to Gnd via an external capacitor. Gain The gain from inputs Tx1 and Tx2 to the line is dependent on the set impedance, the line load impedance and dc slope resistor RS in the following way: Z x Z line 1 x SET A TX Z Z 6 x R line SET S + ) With ZSET = 600 Ω, Zline = 600 Ω and RS = 50 Ω the gain equals 0 dB. By setting Bit 4 of Register 2 to 1, the gain is raised by 6.0 dB. MOTOROLA ANALOG IC DEVICE DATA Outputs In order to transmit signals to the line, the output stage of the MC34016 (line driver) modulates the zener previously described. To guarantee stability of the output stage capacitor CSTB of 100 pF is required SIDETONE The MC34016 is equipped with a double Wheatstone bridge architecture to optimize sidetone. One sidetone network is used for short lines and one for long lines. Switchover between both networks is dependent on line current and is described in the automatic gain control section. Different sidetone equations apply depending on whether a passive or an active set impedance is set. Sidetone Cancellation with Passive Set Impedance In a passive set impedance application, the set impedance is a part of the equations for optimum sidetone. For short lines optimum cancellation occurs if: R Z x Z lineshort HS2 x SET Z HS1 R Z Z lineshort S SET with: Zlineshort = impedance of a short telephone line and for long lines: Z x Z R linelong HL2 x SET Z HL1 Z Z R linelong SET S with: Zlinelong= impedance of a long telephone line + ) + ) Sidetone Cancellation with Active Set Impedance In the active set impedance application, the set impedance does not appear in the equations for optimum sidetone cancellation as it does in the passive application. For short lines, optimum cancellation occurs if: R HS2 x Z Z lineshort HS1 R S and for long lines: R HL2 x Z Z HL1 linelong R S + + RECEIVE CHANNEL Inputs The inputs HYS and HYL have an input resistance of 30 kΩ and can handle signals up to 800 mVpp. This corresponds to a signal at the telephone line of about 8.0 dBm in the typical application. The switchover from HYS to HYL is dependent on line current and described in the automatic gain control section. Gain The overall gain from the line to the outputs Rx1 and Rx2 for short lines and passive impedance equals: R14′ A 7.6 x RX R14′ Z HYS For active impedance it follows: + A RX + 7.6 x R14′R14′ )Z ) x HYS ǒ 1 R1 x Z HYS ) R14 x Z SET Ǔ In these relations, R14′ is the resistor R14 in parallel with the input impedance at HYS of 30 kΩ. The gain for long lines can be derived by replacing ZHYS and R14 by ZHYL 7 MC34016 and R17. With R14 = 3.0 kΩ and Z HYS = 18 kΩ the receive gain equals 0 dB for the passive impedance application. Outputs The outputs R x1 and R x2 of the receive channel have an output impedance of 150 Ω and are designed to drive a 10 kΩ resistive load or a 47 nF capacitive load with a 3.5 Vpp swing. AUTOMATIC GAIN CONTROL The automatic gain control function (AGC) controls the transmit and receive gains and the switchover for the sidetone networks for short and long lines according to the line current (which represents line length). The effect of AGC on the transmit and receive amplifiers is 6.0 dB at default and it can be disabled via the serial bus. The switchover for the sidetone networks tracks the AGC curves for the transmit and receive amplifier gain. This feature can also be disabled via the serial bus: ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ Bit 6, Reg. 2 ‘PABX Mode’ Bit 0, Reg. 2 ‘AGC Range’ 0 0 AGC Gain Range of 6.0 dB, Sidetone Switchover Enabled 0 1 No AGC Gain Range, Sidetone Switchover Enabled 1 0 AGC Range of 6.0 dB, only HYS Input Active, HYL Muted 1 1 Description No AGC Gain Range, only HYS Input Active, HYL Muted The ratio between start and stop current for the AGC curves is programmable for both voltage and current regulation mode: Bit 4, Reg. 1 ‘DC Mask’ Bit 1, Reg. 2 ‘AGC Ratio’ 0 8 AGC Ratio Selected IAGCstart (µA) IAGCstop (µA) 0 Voltage Regulation, AGC Ratio 1:3 10 31 0 1 Voltage Regulation, AGC Ratio 1:2 21 42 1 0 Current Regulation, AGC Ratio 1:2 21 42 1 1 Current Regulation, AGC Ratio 3:5 31 52 The relation between line current and Istart and Istop is given by: R AGC x I I linestart AGCstart R S R AGC x I I linestop AGCstop R S Figures 5, 6, 7 and 8 show the AGC curves for both voltage regulation and current regulation. In current regulation, the start point for the AGC curves is coupled to the knee point of the dc characteristic, or: Iknee = IAGCstart. + + LOGIC OUTPUT DRIVERS The MC34016 is equipped with three logic outputs meant to interface to the front end of a telephone. The outputs can be controlled via the serial bus interface. As shown in the characteristics, the logic outputs are capable of sourcing at least 1.0 mA and sinking at least 5.0 mA. Output HKSW Output HKSW is dedicated to drive the hookswitch. With HKSW low, the line is opened via Q2 and Q3 and automatically switches off the line driver transistor Q1. This feature guarantees fast dc settling after line breaks occurring during pulse dialing. Outputs Out1 and Out2 Outputs Out1 and Out2 may be used for any logic function, such as control of an earth switch and/or a shunt wire. SERIAL BUS INTERFACE The serial interface of the MC34016 enables a simple three wire connection to a micro controller. Timing Times t1, t2, t3, t4 and t5 are specified in the electrical characteristics. With BEN high, data can be clocked into the serial port by using Data and Clk lines. On the rising edge of the Clk, the data enters the MC34016. The last 8–bits of data entered are shifted into the registers when BEN is forced low. With BEN low, the serial port of the MC34016 is disabled. BEN must be kept low until the next register update is needed. Data should be written by entering the most significant bit first (Bit 7) and the least significant bit (Bit 0) last. With BEN low, the Data and Clk lines may be used to control other devices in the application. MOTOROLA ANALOG IC DEVICE DATA MC34016 Timing Diagram Clk Data Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 BEN t1 t2 t3 Registers The MC34016 is equipped with two 8–bit registers which are selected by the value of the most significant bit (Bit 7). If the supply voltage of the MC34016 drops below 2.5 V, all registers are set to 0. This RESET function enables a smooth power–up of the device. The registers are as follows: ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ Register 1 (Bit 7 = 0) Bit Function ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁ ÁÁÁ ÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ t4 Operation Default 0 Output HKSW 0: HKSW is Low 1: HKSW is High 0 1 Output Out1 0: Out1 is Low 1: Out1 is High 0 2 Output Out2 0: Out2 is Low 1: Out2 is High 0 3 Not Used – – 4 DC Mask 0: Voltage Regulation Mask 1: Current Regulation Mask for France 0 5 DC Mode 0: Speech Mode/Normal Operation 1: Dialing Mode for Low Voltage Drop 0 6 Test Mode Only Used During Manufacturing 0 Register 2 (Bit 7 = 1) Bit Operation Default 0 AGC Range Function 0: AGC Range 6.0 dB 1: AGC Range 0 dB (Switched “Off”) 0 1 AGC Ratio Voltage Regulation: (Bit 4, Reg. 1 = 0) 0: Ratio 1:3 1: Ratio 1:2 0 2 Transmit Mute 0: Transmit Channel Active 1: Transmit Channel Muted 0 3 Receive Mute 0: Receive Channel Active 1: Receive Channel Muted 0 4 Transmit Gain 0: Transmit Channel Gain = 0 dB 1: Transmit Channel Gain = 6.0 dB 0 5 Receive Gain 0: Receive Channel Gain = 0 dB 1: Receive Channel Gain = 6.0 dB 0 6 PABX Mode 0: Normal Mode 1: PABX Mode (only Input HYS Selected) 0 (Pulse Dial Mask) (Voltage Regulation Mask) 10 6.0 RDC1 = 680 k 8.0 5.0 RDC1 = 470 k Vline , LINE VOLTAGE (V) Vline , LINE VOLTAGE (V) Current Regulation: (Bit 4, Reg. 1 = 1) 0: Ratio 1:2 1: Ratio 3:5 Figure 2. Line Voltage versus Line Current Figure 1. Line Voltage versus Line Current 6.0 RDC1 = 220 k 4.0 2.0 0 0 t5 4.0 3.0 2.0 1.0 10 20 30 40 50 60 70 Iline, LINE CURRENT (mA) MOTOROLA ANALOG IC DEVICE DATA 80 90 100 0 0 10 20 30 40 50 60 70 80 90 100 Iline, LINE CURRENT (mA) 9 MC34016 Figure 4. Line Voltage versus Line Current Figure 3. Line Voltage versus Line Current (Current Regulation Mask) (Current Regulation Mask) 60 RAGC = 47 k AGC Ratio 3:5 50 RDC1 = 680 k Vline , LINE VOLTAGE (V) Vline , LINE VOLTAGE (V) 50 60 40 RDC1 = 470 k 30 20 10 10 20 30 40 50 40 RDC1 = 470 k 30 20 RDC1 = 220 k 0 0 60 10 20 RAGC = 100 k AGC Ratio 1:2 AGC WEIGHTING FACTOR AGC WEIGHTING FACTOR (Voltage Retulation Mask) 0.8 Gain 0.4 HYS HYL 0.2 10 20 30 40 50 60 70 80 90 0.6 RAGC = 100 k AGC Ratio 1:3 HYS 10 20 30 40 50 60 70 80 90 Iline, LINE CURRENT (mA) Iline, LINE CURRENT (mA) Figure 7. AGC Weighting Factor versus Iline Figure 8. AGC Weighting Factor versus Iline 1.0 0.8 0.8 RAGC = 47 k AGC Ratio 3:5 Gain 0.4 HYS HYL 0.2 10 20 30 40 50 60 70 Iline, LINE CURRENT (mA) 100 (Currrent Regulation Mask) 1.0 AGC WEIGHTING FACTOR AGC WEIGHTING FACTOR HYL 0.2 0 0 100 Gain 0.4 (Current Regulation Mask) 10 60 Figure 6. AGC Weighting Factor versus Iline 0.8 0 0 50 Figure 5. AGC Weighting Factor versus Iline 1.0 0.6 40 Iline, LINE CURRENT (mA) 1.0 0 0 30 Iline, LINE CURRENT (mA) (Voltage Regulation Mask) 0.6 RDC1 = 680 k 10 RDC1 = 220 k 0 0 RAGC = 47 k AGC Ratio 1:2 80 90 100 0.6 RAGC = 47 k AGC Ratio 1:2 Gain 0.4 HYS HYL 0.2 0 0 10 20 30 40 50 60 70 80 90 100 Iline, LINE CURRENT (mA) MOTOROLA ANALOG IC DEVICE DATA MC34016 Figure 9. Test Diagram RHS1 18 k RHS2 RHL1 18 k RHL2 3.0 k RRx 10 k Rx1 VRx V CRx2 0.1 VTx + HYL LAI Rx SRF Stab IBG Rx2 CTx1 0.047 Tx2 RSET 600 CHL1 0.047 HYS Tx1 CStab 100 p 3.0 k CHS1 0.047 CRx1 0.1 RDC1 470 k Line LAO Driver VBG Gnd MC34016 Tx Q1 MJE340 CTx2 0.047 Supply Serial Bus Interface VCC Iref VCC + 5.0 V Clk Data BEN Out1 Out2 HKSW Rref 59 k A + A + Cline 47 µ AGC A Rline 600 AGC RAGC 100 k RS 50 CM 0.1 CSET 4.7 µ Iline + 15 mA VAC V Vline + From MPU MOTOROLA ANALOG IC DEVICE DATA 11 MC34016 Figure 10. Typical Application with Passive Impedance and Voltage Regulation Q2 MJE350 RHS1 18 k RHS2 RHL1 18 k RHL2 3.0 k 3.0 k CHS1 0.047 CRx1 0.047 Rx1 Tx1 Transmit CT 0.047 x1 Tx2 Inputs CStab 100 p + RSET 600 RINT 560 CHL1 0.047 HYS Receive Outputs CRx2 0.047 Rx2 RDC1 470 k Rx HYL LAI SRF Stab IBG LAO Line Driver VBG Gnd MC34016 Tx Vline Q1 D1 D2 1N4004 CTx2 0.047 Supply Serial Bus Interface D3 AGC B, Ring D4 A, Tip VCC Iref Supply Clk Data BEN Out1 Out2 HKSW Rref 59 k Q3 MPSA42 AGC RAGC 100 k RS 50 CM 0.1 CSET 4.7 µ From MPU Shunt Earth NOTE: 12 Sidetone Networks not adapted to country specific telephone lines. Optional MOTOROLA ANALOG IC DEVICE DATA MC34016 Figure 11. Typical Application with Active Impedance and Current Regulation Q2 MJE350 RHS1 36 k RHS2 RHL1 36 k RHL2 3.0 k 3.0 k CHS1 0.047 CRx1 0.047 Rx1 Tx1 Transmit CT 0.047 x1 Tx2 Inputs HYL Rx CStab 100 p + RINT 1.8 k RSRF 43 k CHL1 0.047 HYS Receive Outputs CRx2 0.047 Rx2 RDC1 470 k LAI SRF Stab IBG LAO Line Driver VBG Gnd MC34016 Tx Vline Q1 MJE340 D1 D2 1N4004 CTx2 0.047 Supply Serial Bus Interface D3 AGC B, Ring D4 A, Tip VCC Iref Supply Clk Data BEN Out1 Out2 HKSW Rref 59 k Q3 MPSA42 AGC RAGC 100 k RS 50 CM 0.1 From MPU Shunt Earth NOTE: Sidetone Networks not adapted to country specific telephone lines. MOTOROLA ANALOG IC DEVICE DATA Optional 13 MC34016 OUTLINE DIMENSIONS P SUFFIX PLASTIC PACKAGE CASE 738–03 ISSUE E -A20 11 1 10 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. DIMENSION L TO CENTER OF LEAD WHEN FORMED PARALLEL. 4. DIMENSION B DOES NOT INCLUDE MOLD FLASH. B C -T- L K SEATING PLANE M E N G F J 20 PL 0.25 (0.010) D 20 PL 0.25 (0.010) M T A T M M DW SUFFIX PLASTIC PACKAGE CASE 751D–04 ISSUE E –A– 20 10X P 0.010 (0.25) 1 M B M 10 20X D 0.010 (0.25) M T A B S J S F R C –T– 18X 14 G K SEATING PLANE M INCHES MIN MAX 1.010 1.070 0.240 0.260 0.150 0.180 0.015 0.022 0.050 BSC 0.050 0.070 0.100 BSC 0.008 0.015 0.110 0.140 0.300 BSC 0° 15° 0.020 0.040 MILLIMETERS MIN MAX 25.66 27.17 6.10 6.60 3.81 4.57 0.39 0.55 1.27 BSC 1.27 1.77 2.54 BSC 0.21 0.38 2.80 3.55 7.62 BSC 0° 15° 0.51 1.01 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSIONS A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.150 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.13 (0.005) TOTAL IN EXCESS OF D DIMENSION AT MAXIMUM MATERIAL CONDITION. 11 –B– B DIM A B C D E F G J K L M N X 45 _ DIM A B C D F G J K M P R MILLIMETERS MIN MAX 12.65 12.95 7.40 7.60 2.35 2.65 0.35 0.49 0.50 0.90 1.27 BSC 0.25 0.32 0.10 0.25 0_ 7_ 10.05 10.55 0.25 0.75 INCHES MIN MAX 0.499 0.510 0.292 0.299 0.093 0.104 0.014 0.019 0.020 0.035 0.050 BSC 0.010 0.012 0.004 0.009 0_ 7_ 0.395 0.415 0.010 0.029 M MOTOROLA ANALOG IC DEVICE DATA MC34016 NOTES MOTOROLA ANALOG IC DEVICE DATA 15 MC34016 Motorola reserves the right to make changes without further notice to any products herein. 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Box 20912; Phoenix, Arizona 85036. 1–800–441–2447 JAPAN: Nippon Motorola Ltd.; Tatsumi–SPD–JLDC, Toshikatsu Otsuki, 6F Seibu–Butsuryu–Center, 3–14–2 Tatsumi Koto–Ku, Tokyo 135, Japan. 03–3521–8315 MFAX: [email protected] – TOUCHTONE (602) 244–6609 INTERNET: http://Design–NET.com HONG KONG: Motorola Semiconductors H.K. Ltd.; 8B Tai Ping Industrial Park, 51 Ting Kok Road, Tai Po, N.T., Hong Kong. 852–26629298 16 ◊ *MC34016/D* MC34016/D MOTOROLA ANALOG IC DEVICE DATA