INTEGRATED CIRCUITS DATA SHEET UBA1707 Cordless telephone, answering machine line interface Product specification Supersedes data of 1998 Jun 11 File under Integrated Circuits, IC03 1999 Feb 17 Philips Semiconductors Product specification Cordless telephone, answering machine line interface UBA1707 • AGC: FEATURES Line interface – On/off • Low DC line voltage; operates down to 1.2 V (excluding polarity guard) – Slope – Istart line current. • Voltage regulator with adjustable DC voltage • Auxiliary amplifier mute function • DC mask for voltage or current regulation (CTR 21) • Loudspeaker channel: • Line current limitation for protection – Input selection • Electronic hook switch control input – Volume setting • Transmit amplifier with: – Dynamic limiter inhibition – Power-down mode. – Symmetrical inputs – Fixed gain • General purpose switches state – Large signals handling capability. • Global power-down mode. • Receive amplifier with fixed gain Supply • Transmit and receive amplifiers AGC for line loss compensation. Operates with external supply voltage from 3.0 to 5.5 V. Auxiliary amplifier APPLICATIONS • Fixed gain. • Cordless base stations • Answering machines Loudspeaker channel • Mains or battery-powered telephone sets. • Dual inputs • Rail-to-rail output stage for single-ended load drive GENERAL DESCRIPTION • High output current capability The UBA1707 is a BiCMOS integrated circuit intended for use in mains-powered telecom terminals. It performs all speech and line interface functions, DC mask for voltage or current regulation and electronic hook switch control. The device includes an auxiliary amplifier, a loudspeaker channel and general purpose switches. • Dynamic limiter to prevent distortion • Digital volume control • Fixed maximum gain. General purpose switches • Three switches with open-collector. Most of the characteristics are programmable via a 3-wire serial bus interface. 3-wires serial bus interface Allows to control: • DC mask (voltage or current regulation) • Receive amplifier mute function ORDERING INFORMATION TYPE NUMBER UBA1707T UBA1707TS 1999 Feb 17 PACKAGE NAME SO28 SSOP28 DESCRIPTION VERSION plastic small outline package; 28 leads; body width 7.5 mm SOT136-1 plastic shrink small outline package; 28 leads; body width 5.3 mm SOT341-1 2 Philips Semiconductors Product specification Cordless telephone, answering machine line interface UBA1707 QUICK REFERENCE DATA Iline = 15 mA; VCC = 3.3 V; RSLPE = 10 Ω; AGC pin connected to GND; Zline = 600 Ω; ZSET = 619 Ω; EHI = HIGH; f = 1 kHz; Tamb = 25 °C; bit AGC at logic 1, all other configuration bits at logic 0; measured in test circuit of Fig.17; unless otherwise specified. SYMBOL PARAMETER VCC operating voltage range ICC current consumption from pin VCC Iline line current operating range VLN DC line voltage RREGC DC mask slope in current regulation mode Gv(trx) voltage gain transmit amplifier from TXI to LN CONDITIONS gain control range for transmit and receive amplifiers with respect to Iline = 15 mA TYP. MAX. UNIT 3.0 − 5.5 V normal operation; bit PD = 0 − 2.2 3.2 mA power-down mode; bit PD = 1 − 110 150 µA normal operation 11 − 140 mA with reduced performance 3 − 11 mA 2.7 3.0 3.3 V Iline > 35 mA (typical); RLVI = 1 MΩ; RRGL = 7.15 kΩ; bit CRC = 1 − 1.4 − kΩ VTXI = 50 mV (RMS) 10.6 11.6 12.6 dB 36.9 37.9 38.9 dB − 6.5 − dB receive amplifier from RXI to RXO VRXI = 2 mV (RMS) ∆Gv(trx) MIN. Iline = 90 mA Gv(AX) voltage gain from AXI to AXO VAXI = 2 mV (RMS) 30.8 31.8 32.8 dB Gv(LSA) voltage gain from LSAI1 or LSAI2 to LSAO for maximum volume VLSAI = 8 mV (RMS); bits LSA1 = 1 and LSA2 = 1 26.5 28 29.5 dB ∆Gv(LSA) voltage gain adjustment range for loudspeaker channel bits (VOL0, VOL1, VOL2) from (0, 0, 0) to (1, 1, 1) − 21 − dB ∆Gv(LSA)s voltage gain adjustment step for loudspeaker channel VOL0 from 0 to 1 − 3 − dB 1999 Feb 17 3 Philips Semiconductors Product specification Cordless telephone, answering machine line interface UBA1707 BLOCK DIAGRAM handbook, full pagewidth VCC 25 RXI 10 UBA1707 I 2Vd 18 TXI− 17 8 RXO 2 LN 2Vd EHI TXI+ GND LINE INTERFACE RXM V 22 V LN + ZSET I 300 mV RSLPE 1 SLPE RAGC2 RAGC1 3 REG CREG AGC 9 LOW VOLTAGE PART AGC 2 SAGC, AGC EHI EHI CURRENT LIMITATION SLPE VCC REG 11 EHI 6 LCC 7 CST VCC CCST 600 mV TPDARL D CRC RRGL 200 nA RGL 5 4 LVI RLVI TNSW TNON-HOOK AXM AUXILIARY AMPLIFIER AXI 15 16 AXO 24 LSAO 28 DLC 2Vd LOUDSPEAKER CHANNEL LSA1 LSAI1 26 V I 2Vd LSPD LSAI2 LSA2 27 VCC 0.5VCC LSPD 2Vd V DYNAMIC LIMITER I LSPD VOLUME CONTROL LSPGND CDLC DLCI 23 VOL0 TO 3 VOL2 GENERAL SWITCHES 3 19 SERIAL INTERFACE SUPPLY SWC1, SWC2, SWC3 21 SWI1 20 SWI2 19 SWI3 PD 13 14 12 EN CLK DATA MGK705 Bit names are given in italics. Fig.1 Block diagram. 1999 Feb 17 4 LN − Philips Semiconductors Product specification Cordless telephone, answering machine line interface UBA1707 PINNING SYMBOL PIN DESCRIPTION SLPE 1 connection for slope resistor LN 2 positive line terminal REG 3 line voltage regulator decoupling LVI 4 negative line voltage sense input RGL 5 reference for current regulation mode LCC 6 line current control output CST 7 input for stability capacitor RXO 8 receive amplifier output AGC 9 automatic gain control/line loss compensation adjustment RXI 10 receiver amplifier input EHI 11 electronic hook switch control input DATA 12 serial bus data input EN 13 programming serial bus enable input RXO 8 21 SWI1 CLK 14 serial bus clock input AGC 9 20 SWI2 AXI 15 auxiliary amplifier input RXI 10 19 SWI3 AXO 16 auxiliary amplifier output EHI 11 18 TXI+ TXI− 17 inverted transmit amplifier input DATA 12 17 TXI− TXI+ 18 non-inverted transmit amplifier input SWI3 19 NPN open-collector output 3 EN 13 16 AXO SWI2 20 NPN open-collector output 2 CLK 14 15 AXI SWI1 21 NPN open-collector output 1 GND 22 ground reference LSPGND 23 ground reference for the loudspeaker amplifier LSAO 24 loudspeaker amplifier output VCC 25 supply voltage LSAI1 26 loudspeaker amplifier input 1 LSAI2 27 loudspeaker amplifier input 2 DLC 28 dynamic limiter timing adjustment 1999 Feb 17 handbook, halfpage SLPE 1 28 DLC LN 2 27 LSAI2 REG 3 26 LSAI1 LVI 4 25 VCC RGL 5 24 LSAO LCC 6 23 LSPGND CST 7 22 GND UBA1707 MGK704 Fig.2 Pin configuration. 5 Philips Semiconductors Product specification Cordless telephone, answering machine line interface UBA1707 • The automatic gain control FUNCTIONAL DESCRIPTION • The DC mask management All data given in this chapter are typical values, except when otherwise specified. • The low voltage area characteristics. In the same way, changing the value of ZSET also affects the characteristics. The IC has been optimized for Vref = 2.9 V and ZSET = 619 Ω. Supply (pins VCC and GND; bits PD and LSPD) The UBA1707 must be supplied with an external stabilized voltage source between pins VCC and GND. Pins GND and LSPGND must be connected together. MGK706 8.5 Without any signal, with the loudspeaker channel enabled at minimum volume and without any general purpose switch selected, the internal current consumption is 2.2 mA at VCC = 3.3 V. Each selected switch (pins SWI1, SWI2, or SWI3) increases the current consumption by 600 µA. handbook, halfpage Vref (V) 7.5 6.5 The supply current can be reduced when the loudspeaker channel is not used by switching it off (bit LSPD at logic 1). The current consumption is then decreased by approximately 800 µA at minimum volume. 5.5 To drastically reduce current consumption, the UBA1707 is provided with a power-down mode controlled by bit PD. When bit PD is at logic 1, the current consumption from VCC becomes 110 µA. In this mode, the serial interface is the only function which remains active. 3.5 4.5 (1) (2) 2.5 103 105 RVA (Ω) 106 (1) Influence of RVA on Vref. (2) Vref without influence of RVA. Line interface DC CHARACTERISTICS (PINS LN, SLPE, REG, CST, LVI, LCC, RGL AND GND; BIT CRC) Fig.3 Reference voltage adjustment with RVA. The IC generates a stabilized reference voltage (Vref) between pins LN and SLPE. This reference voltage is equal to 2.9 V, is temperature compensated and can be adjusted by means of an external resistor (RVA). It can be increased by connecting the RVA resistor between pins REG and SLPE (see Fig.3). The IC regulates the line voltage at pin LN which can be calculated as follows: V LN = V ref + R SLPE × I SLPE I SLPE = I line – I ZSET – I* ≅ I line – I ZSET The voltage at pin REG is used by the internal regulator to generate the stabilized reference voltage and is decoupled by a capacitor (CREG) which is connected to GND. This capacitor, converted into an equivalent inductance (see Section “Set impedance”) realizes the set impedance conversion from its DC value (RSLPE) to its AC value (ZSET in the audio-frequency range). Figure 4 illustrates the reference voltage supply configuration. As can be seen from Fig.4, part of the line current flows into the ZSET impedance network and is not sensed by the UBA1707. Therefore using the RVA resistor to change value of the reference voltage will also modify all parameters related to the line current such as: 1999 Feb 17 104 Where: Iline = line current IZSET = current flowing through ZSET I* = current consumed between LN and GND (approximately 100 µA). The preferred value for RSLPE is 10 Ω. Changing RSLPE will affect more than the DC characteristics; it also influences the transmit gain, the gain control characteristics, the sidetone level and the maximum output swing on the line. However, for compliance with CTR 21 8.66 Ω is the best value for RSLPE. 6 Philips Semiconductors Product specification Cordless telephone, answering machine line interface UBA1707 LN+ handbook, full pagewidth ILN Iline LN Rp UBA1707 35 kΩ I* ZSET IZSET 619 Ω Vd Rd 4 kΩ REG CREG 4.7 µF SLPE GND RSLPE ISLPE 10 Ω MGK707 Fig.4 Reference voltage supply configuration. handbook, full pagewidth ILN Iline LN+ Zline LN Rp UBA1707 35 kΩ IZSET Vref Rexch ZSET 619 Ω Vd Rd Vline HOOK SWITCH MANAGEMENT 4 kΩ REG CREG 4.7 µF GND SLPE ISLPE LCC RSLPE VEHI 10 Ω TNSW Vexch EHI VCE (TNSW) LN− MGK708 Fig.5 Line current settling simplified configuration. 1999 Feb 17 7 Philips Semiconductors Product specification Cordless telephone, answering machine line interface In off-hook conditions (voltage at pin EHI is HIGH), an operational amplifier drives (at pin LCC) the base of TPDARL which forms a current amplifier structure in association with TNSW. The line current flows through TNSW transistor. The TNON-HOOK transistor is forced into deep saturation. A virtual ground is created at pin LVI because of the operational amplifier. A DC current (ILVI) is sourced from pin LVI into the RLVI resistor in order to generate a voltage source. Thus the voltage between pin GND and the negative line terminal (LN−) becomes: The DC line current flowing into the set is determined by the exchange supply voltage (Vexch), the feeding bridge resistance (Rexch), the DC resistors of the telephone line (Rline) and the set (RSET), the reference voltage (Vref) and the voltage introduced by the transistor (TNSW) used as line interrupter (see Fig.5). With a line current below Ilow (8 mA with ZSET = 619 Ω), the internal reference voltage (Vref) is automatically adjusted to a lower value. This means that more sets can operate in parallel with DC line voltages (excluding the polarity guard) down to 1.2 V. At line current below Ilow, the circuit has limited transmit and receive levels. This is called the low voltage area. VCE (TNSW) = RLVI × ILVI + VCE (TNON-HOOK) ≅ RLVI × ILVI The voltage Vline between the line terminals LN+ and LN− can be calculated as follows: Figure 6 shows in more details how the UBA1707, in association with some external components, manages the line interrupter (TNSW external transistor). Vline ≅ Vref + RSLPE × (Iline − IZSET) + VCE (TNSW) In on-hook conditions (voltage at pin EHI is LOW), the voltage at pin LCC is pulled-up to the supply voltage level (VCC) to turn off the TPDARL transistor. As a result, because of the RPLD resistor, the TNSW and TNON-HOOK transistors are switched off. The TNON-HOOK transistor disconnects the RLVI resistor from the LN− line terminal in order to guarantee a high on-hook impedance. 1999 Feb 17 UBA1707 Where: Iline = line current IZSET = current flowing through ZSET. 8 This text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader.This text is here in _white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader.This text is here inThis text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader. white to force landscape pages to be ... LN+ UBA1707 Vref REG Iline ILN 8.2 V IZSET Vd ZSET 619 Ω CREG 4.7 µF Rd SLPE ISLPE 4 kΩ EHI VEHI RSLPE 10 Ω VCC 9 CURRENT REGULATION MODE MANAGEMENT CURRENT LIMITATION ILVIV 200 nA RPLU 150 kΩ LCC ILVI TPDARL Vline Philips Semiconductors LN 35 kΩ Cordless telephone, answering machine line interface andbook, full pagewidth 1999 Feb 17 Rp CRC RGL LVI GND RRGL CLVI RLVI 7.15 kΩ 470 pF 1 MΩ CST CCST 22 pF RON-HOOK TNON-HOOK 100 kΩ DPROT DSW TNSW RPLD 20 kΩ Iline Fig.6 Line interrupter management and DC mask regulation configuration. UBA1707 Bit names are given in italics. Product specification LN− MGK709 Philips Semiconductors Product specification Cordless telephone, answering machine line interface UBA1707 Therefore VCE (TNSW) ≅ RLVI × ILVIV = 200 mV in typical application (see Fig.18). The UBA1707 offers the possibility to choose two kinds of regulations for the DC characteristic between the line terminals LN+ and LN− (see Fig.7): The slope ∆Vline/∆Iline of the Vline, Iline characteristic is RREGV ≅ RSLPE. • Voltage regulation mode • Current regulation mode. Current regulation mode In current regulation mode (bit CRC at logic 1), when the line current is lower than Iknee = 35 mA (with ZSET = 619 Ω), VCE (TNSW) is fixed by means of a 200 nA DC constant current ILVIV flowing through RLVI. When the line current is higher than 35 mA, an additional current (proportional to the line current) flows through RLVI. As a result, TNSW works as a DC voltage source increasing with the line current. VCE (TNSW) can be calculated as follows: handbook, halfpage Vline R SLPE V CE ( TN SW ) ≅ R LVI × ---------------- × ( I line – I knee ) + I LVIV R RGL Where: Iline = line current RRGL = resistor connected at pin RGL. (1) (2) Ilow (3) Iknee Iline The slope ∆Vline/∆Iline of the Vline, Iline characteristic is determined by the ratio of resistors connected at pins SLPE, LVI and RGL, and can be calculated as R SLPE follows: R REGC ≅ R SLPE + R LVI × --------------- = 1400 Ω in R RGL Iprot (4) MGK710 (1) Low voltage area. (2) Small slope (determined by RSLPE). typical application (see Fig.18). (3) Small slope (dashed line; determined by RSLPE) in voltage regulation mode. High slope (full line; determined by RSLPE, RLVI and RRGL) in current regulation mode. Current limitation Whatever the selected mode is, the line current is limited to approximately 145 mA. This current is sensed on SLPE, for this purpose the external zener diode must be connected between pins LN and SLPE. The speech function no longer operates in this condition. (4) Current limitation. Fig.7 General form of the DC mask as a function of regulation mode. ELECTRONIC HOOK SWITCH CONTROL (PIN EHI) The regulation mode is selected by the bit CRC via the serial interface. The electronic hook switch input (EHI) controls the state of TPDARL transistor. When the voltage applied at pin EHI is LOW, TPDARL transistor is turned off. Voltage at pin LCC is pulled up to supply voltage (VCC). TNSW and TNON-HOOK transistors are also turned off by means of a pull-down resistor (RPLD). When the voltage applied at pin EHI is HIGH, TPDARL transistor is driven by the operational amplifier at pin LCC and the regulation mode selected is operating. An internal 165 kΩ pull-up resistor is connected between pins LCC and VCC. The DC mask regulation is realised by adjusting the DC voltage VCE (TNSW) between pin GND and line terminal LN− as a function of the line current. Voltage regulation mode In voltage regulation mode (bit CRC at logic 0), VCE (TNSW) voltage is fixed by means of a 200 nA DC constant current ILVIV flowing through RLVI. 1999 Feb 17 10 Philips Semiconductors Product specification Cordless telephone, answering machine line interface The EHI input can also be used for pulse dialling or register recall (timed loop break). During line breaks (voltage at pin EHI is LOW or open-circuit), the voltage regulator is switched off and the capacitor at pin REG is internally disconnected to prevent its discharge. As a result, the voltage stabilizer will have negligible switch-on delay after line interruptions. This minimizes the contribution of the IC to the current waveform during pulse dialling or register recall. TRANSMIT AMPLIFIER (PINS TXI+ AND TXI−) The UBA1707 has symmetrical transmit inputs TXI+ and TXI−. The input impedance between pins TXI+ or TXI− and GND is 21 kΩ. The voltage gain from pins TXI+ or TXI− to pin LN is set at 11.6 dB with 600 Ω line load (Zline) and 619 Ω set impedance. The inputs are biased at 2 × Vd ≅ 1.4 V, with Vd representing the diode voltage. Automatic gain control is provided on this amplifier for line loss compensation. When the UBA1707 is in power-down mode (bit PD at logic 1), the TPDARL transistor is forced to be turned off whatever the voltage applied at pin EHI. RECEIVE AMPLIFIER (PINS RXI AND RXO; BIT RXM) The receive amplifier (see Fig.9) has one input (RXI) and one output (RXO). The input impedance between pins RXI and GND is 21 kΩ. The rail-to-rail output stage is designed to drive a 500 µA peak current. The output impedance at pin RXO is approximately 100 Ω. SET IMPEDANCE In the audio frequency range, the dynamic impedance between pins LN and GND (illustrated in Fig.8) is mainly determined by the ZSET impedance. The voltage gain from pin RXI to pin RXO is set at 37.9 dB. This gain value compensates typically the attenuation of the anti-sidetone network (see Fig.10). The output as well as the input are biased at 2 × Vd ≅ 1.4 V. Automatic gain control is provided on this amplifier for line loss compensation. This amplifier can be muted by activating the receive mute function (bit RXM at logic 1). The impedance introduced by the external TNSW transistor connected between pin GND and the negative line terminal (LN−) is negligible. handbook, halfpage LN LEQ Vref ZSET 619 Ω RP REG SLPE RSLPE 10 Ω GND CREG 4.7 µF MGL215 Leq = CREG × RSLPE × RP RP = internal resistance = 35 kΩ. Fig.8 Equivalent impedance between LN and GND. 1999 Feb 17 UBA1707 11 Philips Semiconductors Product specification Cordless telephone, answering machine line interface handbook, full pagewidth UBA1707 RXM RXI V I 2Vd I RXO V 2Vd from AGC UBA1707 MGK711 Bit names are given in italics. Fig.9 Receive amplifier. Therefore, the value chosen for Zbal should be for an average line length which gives satisfactory sidetone suppression with short and long lines. SIDETONE SUPPRESSION The UBA1707 anti-sidetone network comprising ZSET//Zline, Rast1, Rast2, Rast3, RSLPE and Zbal (see Fig.10) suppresses the transmitted signal in the received signal. Maximum compensation is obtained when the following conditions are fulfilled: The suppression also depends on the accuracy of the match between Zbal and the impedance of the average line. RSLPE × Rast1 = ZSET × (Rast2 + Rast3) The anti-sidetone network for the UBA1707 (see Fig.18) attenuates the receiving signal from the line by 38 dB before it enters the receiving amplifier. The attenuation is almost constant over the whole audio frequency range. A Wheatstone bridge configuration (see Fig.11) may also be used. ( R ast2 × ( R ast3 + R SLPE ) ) k = ------------------------------------------------------------------( R ast1 × R SLPE ) Zbal = k × Zline The scale factor ‘k’ is chosen to meet the compatibility with a standard capacitor from the E6 or E12 range for Zbal. More information on the balancing of an anti-sidetone bridge can be obtained in our publication “Applications Handbook for Wired Telecom Systems, IC03b”. In practice, Zline varies considerably with the line type and the line length. LN handbook, full pagewidth Zline ZSET Rast1 Im GND RXI ZRXI Rast2 RSLPE Rast3 SLPE Zbal MGL216 Fig.10 Equivalent circuit of UBA1707 anti-sidetone bridge. 1999 Feb 17 12 Philips Semiconductors Product specification Cordless telephone, answering machine line interface handbook, full pagewidth UBA1707 LN Zline ZSET Zbal Im GND RSLPE RXI ZRXI Rast1 RA SLPE MGL217 Fig.11 Equivalent circuit of an anti-sidetone network in a Wheatstone bridge configuration. An external resistor RAGC (connected between pins GND and AGC) enables the Istart and Istop line currents to be increased (the ratio between Istart and Istop is not affected by this external resistor). So internal and external adjustments of the automatic gain control allow optimization of the IC for many configurations of exchange supply voltage and feeding bridge resistance. Part of the line current flows into the ZSET impedance network. The IC has been optimized for ZSET = 619 Ω. Changing this 619 Ω value slightly modifies Istop and Istart line currents as well as the value of the two AGC slopes. AUTOMATIC GAIN CONTROL (PIN AGC; BITS RAGC1, RAGC2, SAGC AND AGC) The UBA1707 performs automatic line loss compensation. The automatic gain control varies the gain of the transmit amplifier and the gain of the receive amplifier in accordance with the DC line current. The control range is 6.5 dB (which roughly corresponds to a line length of 5.5 km for a 0.5 mm diameter twisted-pair copper cable with a DC resistance of 176 Ω/km and an average attenuation of 1.2 dB/km). When the line current is greater than Istop, the voltage gains are minimum. When the line current is less than Istart, the voltage gains are maximum. When the AGC pin is connected to pin GND, the start line current (Istart) can be chosen between 22.5 and 29.5 mA via bits RAGC1 and RAGC2 through the serial interface. Two values for the Istop/Istart ratio (slope of the AGC) are possible via the bit SAGC through the serial interface. When bit SAGC is at logic 0 then Istop = 2.7 × Istart (optimized for voltage regulation mode). When SAGC is at logic 1 then Istop = 1.9 × Istart (optimized for current regulation mode). 1999 Feb 17 The automatic gain control function can be disabled by setting the AGC bit to logic 0 via the serial interface or when pin AGC is left open-circuit. In this case both of the voltage gains are maximum. 13 Philips Semiconductors Product specification Cordless telephone, answering machine line interface UBA1707 Auxiliary amplifier (pins AXI and AXO; bit AXM) The auxiliary amplifier (see Fig.12) has one input (AXI) and one output (AXO). The input impedance between pins AXI and GND is 3.8 kΩ. The rail-to-rail output stage is designed to drive a 500 µA peak current. The output impedance at pin AXO is approximately 100 Ω. The output as well as the input are biased at 2 × Vd ≅ 1.4 V DC voltage. The voltage gain from pin AXI to pin AXO is set at 31.8 dB.The amplifier can be muted by setting bit AXM at logic 1 via the serial interface. In this case, the input impedance between pins AXI and GND is infinite. handbook, full pagewidth AXM AXI AXO UBA1707 2Vd MGK712 Bit names are given in italics. Fig.12 Auxiliary amplifier. As a result, it can drive loudspeaker loads down to 8 Ω at VCC = 4.0 V and 16 Ω at VCC = 5.5 V. The output is biased Loudspeaker channel (see Fig.13) LOUDSPEAKER AMPLIFIER (PINS LSAI1, LSAI2, LSAO AND LSPGND; BITS LSPD, LSA1 AND LSA2) at 1⁄2VCC. Its output voltage capability is specified for continuous wave drive and depends on the value of VCC. The loudspeaker amplifier has two symmetrical inputs LSAI1 and LSAI2 selectable independently by the bits LSA1 and LSA2 respectively. The input impedance between pins LSAI1or LSAI2 and GND is typically 21 kΩ. Each of these two inputs stages can accommodate signals up to 500 mV (RMS) at room temperature for less than 2% of Total Harmonic Distortion (THD) at minimum voltage gain. In order to avoid crosstalk from the loudspeaker to other amplifiers, the loudspeaker current flows via pin LSPGND. This pin must be externally connected to pin GND. The nominal value of the voltage gain for maximum volume from pins LSAI1 or LSAI2 to pin LSAO is set at 28 dB. This amplifier is no longer supplied by setting the LSPD bit at logic 1 via the serial interface. The inputs are biased at 2 × Vd ≅ 1.4 V DC voltage (whatever the state of bits LSA1 and LSA2). The rail-to-rail output stage is designed to power a loudspeaker connected as a single-ended load (between pins LSAO and LSPGND). The output LSAO is able to drive at least a 150 mA peak current. 1999 Feb 17 14 Philips Semiconductors Product specification Cordless telephone, answering machine line interface handbook, full pagewidth UBA1707 LSPD UBA1707 LSA1 VCC LSAI1 V 2Vd I I LSA2 LSAI2 0.5VCC DLC LSPD V 2Vd LSAO V DYNAMIC LIMITER CLSAO DLCI CDLC I LSP LSPD LSPGND LSPD VOLUME CONTROL VOL0 TO 3 VOL2 MGK713 Bit names are given in italics. Fig.13 Loudspeaker channel. When the supply voltage drops below an internal threshold voltage of 2.7 V, the gain of the loudspeaker amplifier is rapidly reduced (approximately 1 ms). When the supply voltage exceeds 2.7 V, the gain of the loudspeaker amplifier is increased again. DYNAMIC LIMITER (PIN DLC; BIT DLCI) The dynamic limiter of the UBA1707 prevents clipping of the loudspeaker output stage and protects the operation of the circuit when the supply voltage at VCC falls below 2.7 V. The hard clipping of the dynamic limiter can be inhibited by setting the DLCI bit at logic 1, via the serial interface. Hard clipping of the loudspeaker output stage is prevented by rapidly reducing the gain when the output stage starts to saturate. The time in which gain reduction is effected (clipping attack time) is approximately a few milliseconds. The circuit stays in the reduced gain mode until the peaks of the loudspeaker signals no longer cause saturation. The gain of the loudspeaker amplifier then returns to its normal value within the clipping release time (typically 250 ms). Both attack and release times are proportional to the value of the capacitor CDLC. The total harmonic distortion of the loudspeaker output stage, in reduced gain mode, stays below 5% up to 10 dB (minimum) of input voltage overdrive [providing VLSAI is below 500 mV (RMS)]. 1999 Feb 17 The dynamic limiter is no longer supplied by setting the LSPD bit at logic 1. In this case, the CDLC capacitor charge is maintained to allow the gain of the loudspeaker amplifier to return to its nominal value as soon as the loudspeaker channel is supplied again. VOLUME CONTROL (BITS VOL0, VOL1 AND VOL2) The loudspeaker amplifier voltage gain can be reduced in steps of 3 dB via the serial interface (via bits VOL0, VOL1 and VOL2). These bits provide 7 steps of voltage gain adjustment. The voltage gain is maximum when all bits are at logic 1 and is reduced by 21 dB when all bits are at logic 0. 15 Philips Semiconductors Product specification Cordless telephone, answering machine line interface During normal operation, EN should be kept LOW. Only the last 8 bits serially clocked into the device are retained within the programming register. Additional leading bits are ignored and no check is made on the number of clock pulses. It can always capture new programming data even during global power-down (bit PD at logic 1). General purpose switches (pins SWI1, SWI2 and SWI3; bits SWC1, SWC2 and SWC3) The UBA1707 is equipped with 3 general purpose open-collector switches which short the pins SWI1, SWI2 and SWI3 to ground. They are respectively controlled by bits SWC1, SWC2 and SWC3 and have an operating voltage limited to 12 V. The outputs have to be current biased. Data is entered with the most significant bit first. The leading 6 bits make up the data field (bits D0 to D5) while the trailing 2 bits are the address field (bits ADO and AD1). The first bit entered is D5, the last bit AD0. This organisation allows to send only the number of bits of the addressed register. For a bias current between 2 and 20 mA, the AC impedance is 30 Ω maximum. Serial interface (pins DATA, CLK and EN) Figure 16 shows the serial timing diagram. Table 1 gives the list of registers. A simple 3-wire unidirectional serial bus is used to program the circuit. The 3 wires of the bus are EN, CLK and DATA. The data sent to the device is loaded in bursts framed by EN. Programming clock edges (falling edges) and their appropriate data bits are ignored until EN goes active HIGH. The programmed information is loaded into the addressed register when EN returns inactive (LOW) or left open-circuit. 1999 Feb 17 UBA1707 When the supply voltage VCC drops below 2.5 V, all register files are set in the initial state (see Table 1) defined by the power-up reset. At start-up, the circuit is in power-down mode. In the event that the IC is used in a noisy environment, it is advised to periodically refresh the content of registers. 16 Philips Semiconductors Product specification Cordless telephone, answering machine line interface Table 1 UBA1707 Register description BIT NAME FUNCTION POLARITY DATA ADDRESS STATE AT POWER-UP RESET (AD1, AD0) = (0,0) 0 Register 0: general purpose switches state and DC mask regulation mode SWC1 SWI1 output connection SWC2 SWI2 output connection SWC3 SWI3 output connection un CRC unused current regulation mode 0: SWI1 switched off 1: SWI1 switched on 0: SWI2 switched off 1: SWI2 switched on 0: SWI3 switched off 1: SWI3 switched on must be set to logic 0 0: voltage regulation 1: current regulation D0 D1 0 D2 0 D3 D4 0 0 Register 1: automatic gain control RAGC1 RAGC2 SAGC AGC range selection 1 AGC range selection 2 AGC slope selection AGC line loss compensation mode 0: 2.7 type slope; note 1 1: 1.9 type slope; note 1 0: AGC inhibited 1: AGC enabled D0 D1 D2 (AD1, AD0) = (0,1) D3 0 0 0 0 Register 2: loudspeaker channel LSA1 loudspeaker channel input 1 selection LSA2 loudspeaker channel input 2 selection LSPD loudspeaker channel power-down VOL0 VOL1 VOL2 volume control (least significant bit) volume control volume control (most significant bit) 0: LSAI1 unselected 1: LSAI1 selected 0: LSAI2 unselected 1: LSAI2 selected 0: channel on 1: channel in power-down D0 (AD1, AD0) = (1,0) 0 D1 0 D2 0 D3 D4 D5 0 0 0 Register 3: mute functions and power-down AXM auxiliary amplifier mute RXM receive amplifier mute PD reduced consumption mode DLCI dynamic limiter inhibit 0: amplifier enabled 1: amplifier muted 0: amplifier enabled 1: amplifier muted 0: normal operating mode 1: power-down mode 0: limiter enabled 1: limiter inhibited D0 (AD1, AD0) = (1,1) D1 0 D2 1 D3 0 Note 1. See Section “Automatic gain control (pin AGC; bits RAGC1, RAGC2, SAGC and AGC)”. 1999 Feb 17 17 0 Philips Semiconductors Product specification Cordless telephone, answering machine line interface UBA1707 LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 134). SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT VCC supply voltage on pin VCC GND − 0.4 5.5 V VLN positive continuous line voltage on pin LN GND − 0.4 12.0 V repetitive line voltage during switch-on or line interruption GND − 0.4 13.2 V VSWIn voltage on pins SWI1, SWI2, and SWI3 continuous GND − 0.4 12.0 V during switching GND − 0.4 13.2 V GND − 0.4 VCC + 0.4 V Vn(max) maximum voltage on all other pins ILN current sunk by pin LN see Figs 14 and 15 − 150 mA ISWIn continuous current sunk by pins SWI1, SWI2, and SWI3 bit SWCn = 1 − 20 mA Ptot total power dissipation Tamb = 75 °C; see Figs 14 and 15 − 625 mW − 416 mW UBA1707T UBA1707TS Tstg IC storage temperature −40 +125 °C Tamb operating ambient temperature −25 +75 °C THERMAL CHARACTERISTICS SYMBOL Rth j-a PARAMETER VALUE UNIT UBA1707T 70 K/W UBA1707TS 104 K/W thermal resistance from junction to ambient 1999 Feb 17 CONDITIONS in free air 18 Philips Semiconductors Product specification Cordless telephone, answering machine line interface UBA1707 MGK714 150 ILN (mA) handbook, full pagewidth no power delivered to the loudspeaker 130 (4) (3) (2) (1) 110 90 ∆ Vref 70 with power delivered to the loudspeaker 50 30 2 3 4 5 6 7 8 9 10 11 VLN − VSLPE (V) 12 LINE Tamb (°C) Ptot (mW) (1) 45 1000 The line current value can be calculated from ILN value as follows: (2) 55 875 I LN × ( R SET + R SLPE ) + V LN – V SLPE I line = --------------------------------------------------------------------------------------------- where RSET is the resistive part of ZSET. R SET (3) 65 750 (4) 75 625 When power is delivered to a loudspeaker with RL impedance, the curves must be shifted to the left by: 2 V CC ∆V ref = -----------------------------------------with maximum power dissipated by the loudspeaker amplifier (dotted line given for VCC = 5.5 V, RL = 16 Ω). 2 2 × π × R L × I LN Fig.14 Safe operating area (UBA1707T). 1999 Feb 17 19 Philips Semiconductors Product specification Cordless telephone, answering machine line interface UBA1707 MGK715 140 handbook, full pagewidth ILN (mA) no power delivered to the loudspeaker 120 100 (4) (3) (2) (1) 80 ∆ Vref 60 40 with power delivered to the loudspeaker 20 2 3 4 5 6 7 8 9 10 11 VLN − VSLPE (V) 12 LINE Tamb (°C) Ptot (mW) (1) 45 666 The line current value can be calculated from ILN value as follows: (2) 55 583 I LN × ( R SET + R SLPE ) + V LN – V SLPE I line = --------------------------------------------------------------------------------------------- where RSET is the resistive part of ZSET. R SET (3) 65 500 (4) 75 416 When power is delivered to a loudspeaker with RL impedance, the curves must be shifted to the left by: 2 V CC ∆V ref = -----------------------------------------with maximum power dissipated by the loudspeaker amplifier (dotted line given for VCC = 5.5 V, RL = 16 Ω). 2 2 × π × R L × I LN Fig.15 Safe operating area (UBA1707TS). 1999 Feb 17 20 Philips Semiconductors Product specification Cordless telephone, answering machine line interface UBA1707 CHARACTERISTICS Iline = 15 mA; VCC = 3.3 V; RSLPE = 10 Ω; AGC pin connected to GND; Zline = 600 Ω; ZSET = 619 Ω; EHI = HIGH; f = 1 kHz; Tamb = 25 °C; bit AGC at logic 1, all other configuration bits at logic 0; measured in test circuit of Fig.17; unless otherwise specified. SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT Supply (pins VCC and GND; bit PD) VCC operating supply voltage 3.0 − 5.5 V ICC current consumption from pin VCC − 2.2 3.2 mA ICC(pd) current consumption from pin VCC in power-down mode bit PD = 1 − 110 150 µA Line interface (pins LN, SLPE and REG) DC CHARACTERISTICS Vref stabilized voltage between pins LN and SLPE Iline = 11 to 140 mA 2.6 2.9 3.2 V VLN DC line voltage between pins LN and GND Iline = 2 mA − 1.2 − V Iline = 4 mA − 1.8 − V Iline = 15 mA 2.7 3.0 3.3 V Iline = 140 mA − 4.35 − V VLN(Rext) DC line voltage between pins LN and GND with an external resistor RVA RVA(SLPE−REG) = 8 kΩ − 4.5 − V ∆VLN(T) DC line voltage variation with temperature referenced to 25 °C Tamb = −25 to +75 °C − 8.0 − mV Masks regulation (pins LCC, LVI, CST and RGL; bit CRC) DC CHARACTERISTICS ILCC(max) maximum current sunk by pin LCC 500 − − µA Rint(LCC) internal resistance between pins VCC and LCC − 165 − kΩ bit CRC = 0 − 200 − nA Voltage regulation mode ILVIV current sourced from pin LVI Current regulation mode Iknee start line current for current regulation mode bit CRC = 1 − 35 − mA RREGC DC mask slope in current regulation mode Iline > Iknee; RLVI = 1 MΩ; − RRGL = 7.15 kΩ; bit CRC = 1 1.4 − kΩ − 145 − mA Current limitation Iprot 1999 Feb 17 current limitation level 21 Philips Semiconductors Product specification Cordless telephone, answering machine line interface SYMBOL PARAMETER UBA1707 CONDITIONS MIN. TYP. MAX. UNIT Electronic hook-switch control (pin EHI) VIH HIGH-level input voltage 2.3 − VCC + 0.4 V VIL LOW-level input voltage VCC = 3.0 to 5.5 V GND − 0.4 − 0.3VCC V Ibias input bias current input level = HIGH 1 2 5 µA between pins TXI+ and GND − or TXI− and GND 21 − kΩ between pins TXI+ and TXI− − 36 − kΩ VTXI = 50 mV (RMS) 10.6 11.6 12.6 dB − ±0.3 − dB − ±0.3 − dB Transmit amplifier (pins TXI+, TXI− and LN) Zi input impedance Gv(TX) voltage gain from TXI+/TXI− to LN ∆Gv(TX)(f) voltage gain variation with f = 300 to 3400 Hz frequency referenced to 1 kHz ∆Gv(TX)(T) voltage gain variation with temperature referenced to 25 °C CMRR common mode rejection ratio − 65 − dB PSRR power supply rejection ratio − 36 − dB VLN(max)(rms) maximum sending signal (RMS value) Iline = 15 mA; THD = 2% 1.2 1.4 − V Iline = 4 mA; THD = 10% − 0.26 − V ViTX(max)(rms) maximum transmit input voltage (RMS value) for 2% THD on pin LN Iline = 15 mA − 0.35 − V Iline = 90 mA − 0.75 − V noise output voltage at pin LN pins TXI+ and TXI− short-circuited through 200 Ω in series with 10 µF; psophometrically weighted (P53 curve) − −74 − dBmp − 21 − kΩ Vno(LN) Tamb = −25 to +75 °C Receive amplifier (pins RXI and RXO; bit RXM) Zi input impedance between pins RXI and GND Gv(RX) voltage gain from RXI to RXO ∆Gv(RX)(f) voltage gain variation with f = 300 to 3400 Hz frequency referenced to 1 kHz ∆Gv(RX)(T) voltage gain variation with temperature referenced to 25 °C PSRR power supply rejection ratio THD total harmonic distortion 1999 Feb 17 VRXI = 2 mV (RMS) 36.9 37.9 38.9 dB − ±0.2 − dB Tamb = −25 to +75 °C − ±0.3 − dB − 68 − dB VRXI = 2 mV (RMS) − 0.03 − % VRXI = 12.5 mV (RMS) − 2 − % VRXI = 19.5 mV (RMS); Iline = 90 mA − 2 − % 22 Philips Semiconductors Product specification Cordless telephone, answering machine line interface UBA1707 SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT Vno(RXO)(rms) noise output voltage at pin RXO (RMS value) RXI open-circuit; psophometrically weighted (P53 curve) − −81 − dBVp ∆Gv(RX)(m) voltage gain reduction from pin RXI to RXO when muted VRXI = 10 mV (RMS); bit RXM = 1 − 80 − dB − 6.5 − dB Automatic gain control (pin AGC; bits RAGC1, RAGC2, SAGC and AGC) ∆Gv(trx) gain control range for transmit and receive amplifiers with respect to Iline = 15 mA Iline = 90 mA Istart highest line current for maximum gain bits RAGC1 = 1; RAGC2 = 1 − 22.5 − mA bits RAGC1 = 1; RAGC2 = 0 − 25 − mA bits RAGC1 = 0; RAGC2 = 1 − 27 − mA bits RAGC1 = 0; RAGC2 = 0 − Istop ∆Gv(trxoff) 29.5 − mA lowest line current for minimum gain when Istart = 23 mA bits SAGC = 0; RAGC1 = 1; RAGC2 = 1 − 62 − mA bits SAGC = 1; RAGC1 = 1; RAGC2 = 1 − 43 − mA gain variation for transmit and receive amplifiers when AGC is off bit AGC = 0; Iline = 15 to 140 mA − − ±0.2 dB − 3.8 − kΩ 30.8 31.8 32.8 dB − ±0.2 − dB − ±0.2 − dB Amplifiers AUXILIARY AMPLIFIER (PINS AXI AND AXO; BIT AXM) Zi input impedance between pins AXI and GND Gv(AX) voltage gain from pin AXI to AXO ∆Gv(AX)(f) voltage gain variation with f = 300 to 3400 Hz frequency referenced to 1 kHz ∆Gv(AX)(T) voltage gain variation with temperature referenced to 25 °C VAXI = 2 mV (RMS) Tamb = −25 to +75 °C − PSRR power supply rejection ratio Vno(AXO)(rms) noise output voltage at pin AXO (RMS value) ∆Gv(AX)(m) voltage gain reduction from VAXI = 10 mV (RMS); pin AXI to AXO when amplifier bit AXM = 1 muted 1999 Feb 17 pin AXI connected to pin − GND through 200 Ω in series with 10 µF; psophometrically weighted (P53 curve) 23 − 79 − dB −83 − dBVp 80 − dB Philips Semiconductors Product specification Cordless telephone, answering machine line interface SYMBOL PARAMETER UBA1707 CONDITIONS MIN. TYP. MAX. UNIT LOUDSPEAKER CHANNEL (PINS LSAI1, LSAI2, LSAO, DLC AND LSPGND; BITS LSA1, LSA2, LSPD, VOL0, VOL1, VOL2 AND DLCI) Loudspeaker amplifier Zi input impedance between pins bits LSA1 = 1, LSA2 = 1 LSAI1 or LSAI2 and GND − 21 − kΩ Gv(LSA) voltage gain from LSAI1 or LSAI2 to LSAO for maximum volume 26.5 28 29.5 dB ∆Gv(LSA)(f) voltage gain variation with VLSAI = 8 mV (RMS); frequency referenced to 1 kHz f = 300 to 3400 Hz − ±0.3 − dB ∆Gv(LSA)(T) voltage gain variation with temperature referenced to 25 °C Tamb = −25 to +75 °C − ±0.3 − dB VLSAI(rms) maximum input voltage between pins LSAI1 or LSAI2 and GND (RMS value) VCC = 5.0 V; Gv(LSA) = 7 dB; − for 2% of THD in input stage 500 − mV pin LSAI1 (with bits − LSA1 = 1, LSA2 = 0) or pin LSAI2 (with bits LSA1 = 0, LSA2 = 1) connected to pin GND through 200 Ω in series with 10 µF; psophometrically weighted (P53 curve) −80 − dBVp 3.0 3.6 − V − 2.0 − V 150 − − mA Vno(LSAO)(rms) noise output voltage at pin LSAO (RMS value) VLSAI = 8 mV (RMS); bits LSA1 = 1, LSA2 = 1 Output capability VLSAO(p-p) output voltage capability at pin VCC = 5.0 V; LSAO (peak-to-peak value) Gv(LSA) = 28 dB; VLSAI = 100 mV (RMS); RL = 16 Ω VCC = 3.3 V; Gv(LSA) = 28 dB; VLSAI = 100 mV (RMS); RL = 8 Ω ILSAO(max) 1999 Feb 17 maximum current capability at pin LSAO (peak value) 24 Philips Semiconductors Product specification Cordless telephone, answering machine line interface SYMBOL PARAMETER UBA1707 CONDITIONS MIN. TYP. MAX. UNIT Dynamic limiter tatt attack time VCC = 3 V; Gv(LSA) = 28 dB when VLSAI jumps from 20 mV (RMS) to 20 mV (RMS) + 10 dB; bit DLCI = 0 − − 5 ms when VCC drops below 2.7 V; bit DLCI = don’t care − 1 − ms trel release time VCC = 3 V; Gv(LSA) = 28 dB; when VLSAI jumps from 20 mV (RMS) + 10 dB to 20 mV (RMS); bit DLCI = 0 − 250 − ms THD total harmonic distortion at VLSAI = 20 mV (RMS) + 10 dB VCC = 3 V; Gv(LSA) = 28 dB; t > tatt − 0.5 5 % Volume control ∆Gv(LSA) voltage gain adjustment range bits (VOL0, VOL1, VOL2) from (0, 0, 0) to (1, 1, 1) − 21 − dB ∆Gv(LSA)(s) voltage gain adjustment step − 3 − dB 700 − − kΩ − − 30 Ω 2.3 − VCC + 0.4 V VOL0 from 0 to 1 Switches (pins SWI1, SWI2 and SWI3; bits SWC1, SWC2 and SWC3) Zi(off) AC impedance between pins SWIn and GND when not selected Zi(on) AC impedance between pins 2 mA < ISWIn < 20 mA; SWIn and GND when selected bit SWCn = 1 bit SWCn = 0 Serial interface (pins DATA, CLK and EN) VIH HIGH-level input voltage VIL LOW-level input voltage VCC = 3 to 5.5 V GND − 0.4 − 0.3VCC V Ibias input bias current input level = HIGH 1 2 5 µA Ci input capacitance at pins DATA, CLK and EN − 4 − pF 1999 Feb 17 25 Philips Semiconductors Product specification Cordless telephone, answering machine line interface UBA1707 SERIAL BUS TIMING CHARACTERISTICS VCC = 3.3 V; Tamb = 25 °C; unless otherwise specified. SYMBOL PARAMETER MIN. MAX. UNIT Serial programming clock; pin CLK clock frequency fclk 0 300 kHz Enable programming; pin EN tSTART delay to falling clock edge 1 − µs tEND delay from last rising clock edge 0.1 − µs tW(min) minimum inactive pulse width 1.5 − µs tSU;EN enable set-up time to next clock edge 0.1 − µs Serial data; pin DATA tSU;DATA input data to clock set-up time 2 − µs tHD;DATA input data to clock hold time 2 − µs tW handbook, full pagewidth tSU;DATA tHD;DATA tSU;EN 1/fclk CLK DATA D5 D4 AD1 AD0 EN tEND tSTART Fig.16 Serial bus timing diagram. 1999 Feb 17 26 MGK716 This text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader.This text is here in _white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader.This text is here inThis text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader. white to force landscape pages to be ... 220 nF LN GND 2 22 SWI3 19 SWI2 20 SWI1 21 EHI 11 DATA EN 12 13 CLK 14 RXI 10 RXO 8 28 TXI+ 18 15 Cline VTXI TXI− 619 Ω CEMC 220 nF CAXI 16 17 UBA1707 27 AXO LSAI2 10 nF 27 Zline VCC 26 24 VVCC 6 7 LCC 4 CST 3 LVI 9 REG 5 AGC 1 RGL LSAO 23 SLPE VLSAI2 CLSAI1 220 nF 600 Ω CVCC LSAI1 25 VAXI CLSAI2 220 nF ICC Iline AXI CDLC 1 µF 100 µF ZSET DLC VLSAI1 Philips Semiconductors CRXI Cordless telephone, answering machine line interface VLN TEST AND APPLICATION INFORMATION dbook, full pagewidth 1999 Feb 17 VRXI from microcontroller CLSAO LSPGND 220 µF TPDARL MPSA92 10 µF CLCC 6.8 pF CCST RLVI CLVI 1 MΩ 470 pF CREG 4.7 µF RRGL 7.15 kΩ RSLPE 10 Ω RLSAO 16 Ω 22 pF MGK717 RON-HOOK TNSW DSW 1N4148 MPSA42 100 kΩ BUX86 DPROT 1N4148 UBA1707 Fig.17 Test circuit. Product specification RPLD 20 kΩ TNON-HOOK This text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader.This text is here in _white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader.This text is here inThis text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader. white to force landscape pages to be ... Zbal 3.92 kΩ 260 kΩ CRXI 100 nF MICROCONTROLLER VLN Rast3 392 Ω CRXO LN 2 SWI3 19 SWI2 20 SWI1 EHI 21 11 DATA EN 12 13 CLK RXI 14 10 RXO 8 1 CTXIP TXI+ 18 15 100 nF CTXIM ZSET 619 Ω CEMC(3) 10 nF 16 TXI− 17 UBA1707 27 100 nF 22 ICC VCC 26 28 CVCC a/b 10 µF 6 7 4 CST 3 LVI 9 REG 5 AGC 28 RGL LSAI2 GND LSAI1 CLCC(4) 6.8 pF 10 Ω CAXI 100 nF CAXO CLSAI2 100 nF CLSAI1 CCST RLVI CLVI(2) 1 MΩ 470 pF CREG 4.7 µF LSAO 23 DLC TPDARL MPSA92 AXO RSLPE 100 nF 24 LCC BOD BR211-240 AXI 25 VVCC BRIDGE 4 × BAS11 SLPE RRGL CDLC 7.15 kΩ 220 nF LSPGND CLSAO Philips Semiconductors Rast2 Cordless telephone, answering machine line interface full pagewidth 1999 Feb 17 BZX79C8V2 Rast1 220 µF LSP 16 Ω 22 pF b/a MGK718 RON-HOOK TNSW DSW 1N4148 100 kΩ BUX86 (MPSA42 (1) ) RPLD TNON-HOOK MPSA42 DPROT 1N4148 20 kΩ Fig.18 Typical application. Product specification In case of low line current in voltage regulation mode. Only required in current regulation mode. To improve EMC performance; necessary for stability. To improve stability only in current regulation mode. UBA1707 (1) (2) (3) (4) Philips Semiconductors Product specification Cordless telephone, answering machine line interface UBA1707 PACKAGE OUTLINES SO28: plastic small outline package; 28 leads; body width 7.5 mm SOT136-1 D E A X c y HE v M A Z 15 28 Q A2 A (A 3) A1 pin 1 index θ Lp L 1 14 e bp 0 detail X w M 5 10 mm scale DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (1) e HE L Lp Q v w y mm 2.65 0.30 0.10 2.45 2.25 0.25 0.49 0.36 0.32 0.23 18.1 17.7 7.6 7.4 1.27 10.65 10.00 1.4 1.1 0.4 1.1 1.0 0.25 0.25 0.1 0.9 0.4 inches 0.10 0.012 0.096 0.004 0.089 0.01 0.019 0.013 0.014 0.009 0.71 0.69 0.30 0.29 0.050 0.419 0.043 0.055 0.394 0.016 0.043 0.039 0.01 0.01 0.004 0.035 0.016 Z (1) θ 8o 0o Note 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. REFERENCES OUTLINE VERSION IEC JEDEC SOT136-1 075E06 MS-013AE 1999 Feb 17 EIAJ EUROPEAN PROJECTION ISSUE DATE 95-01-24 97-05-22 29 Philips Semiconductors Product specification Cordless telephone, answering machine line interface UBA1707 SSOP28: plastic shrink small outline package; 28 leads; body width 5.3 mm D SOT341-1 E A X c HE y v M A Z 28 15 Q A2 A (A 3) A1 pin 1 index θ Lp L 1 14 bp e detail X w M 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (1) e HE L Lp Q v w y Z (1) θ mm 2.0 0.21 0.05 1.80 1.65 0.25 0.38 0.25 0.20 0.09 10.4 10.0 5.4 5.2 0.65 7.9 7.6 1.25 1.03 0.63 0.9 0.7 0.2 0.13 0.1 1.1 0.7 8 0o Note 1. Plastic or metal protrusions of 0.20 mm maximum per side are not included. OUTLINE VERSION SOT341-1 1999 Feb 17 REFERENCES IEC JEDEC EIAJ EUROPEAN PROJECTION ISSUE DATE 93-09-08 95-02-04 MO-150AH 30 o Philips Semiconductors Product specification Cordless telephone, answering machine line interface • Use a double-wave soldering method comprising a turbulent wave with high upward pressure followed by a smooth laminar wave. SOLDERING Introduction to soldering surface mount packages • For packages with leads on two sides and a pitch (e): This text gives a very brief insight to a complex technology. A more in-depth account of soldering ICs can be found in our “Data Handbook IC26; Integrated Circuit Packages” (document order number 9398 652 90011). – larger than or equal to 1.27 mm, the footprint longitudinal axis is preferred to be parallel to the transport direction of the printed-circuit board; There is no soldering method that is ideal for all surface mount IC packages. Wave soldering is not always suitable for surface mount ICs, or for printed-circuit boards with high population densities. In these situations reflow soldering is often used. – smaller than 1.27 mm, the footprint longitudinal axis must be parallel to the transport direction of the printed-circuit board. The footprint must incorporate solder thieves at the downstream end. • For packages with leads on four sides, the footprint must be placed at a 45° angle to the transport direction of the printed-circuit board. The footprint must incorporate solder thieves downstream and at the side corners. Reflow soldering Reflow soldering requires solder paste (a suspension of fine solder particles, flux and binding agent) to be applied to the printed-circuit board by screen printing, stencilling or pressure-syringe dispensing before package placement. During placement and before soldering, the package must be fixed with a droplet of adhesive. The adhesive can be applied by screen printing, pin transfer or syringe dispensing. The package can be soldered after the adhesive is cured. Several methods exist for reflowing; for example, infrared/convection heating in a conveyor type oven. Throughput times (preheating, soldering and cooling) vary between 100 and 200 seconds depending on heating method. Typical dwell time is 4 seconds at 250 °C. A mildly-activated flux will eliminate the need for removal of corrosive residues in most applications. Typical reflow peak temperatures range from 215 to 250 °C. The top-surface temperature of the packages should preferable be kept below 230 °C. Manual soldering Fix the component by first soldering two diagonally-opposite end leads. Use a low voltage (24 V or less) soldering iron applied to the flat part of the lead. Contact time must be limited to 10 seconds at up to 300 °C. Wave soldering Conventional single wave soldering is not recommended for surface mount devices (SMDs) or printed-circuit boards with a high component density, as solder bridging and non-wetting can present major problems. When using a dedicated tool, all other leads can be soldered in one operation within 2 to 5 seconds between 270 and 320 °C. To overcome these problems the double-wave soldering method was specifically developed. If wave soldering is used the following conditions must be observed for optimal results: 1999 Feb 17 UBA1707 31 Philips Semiconductors Product specification Cordless telephone, answering machine line interface UBA1707 Suitability of surface mount IC packages for wave and reflow soldering methods SOLDERING METHOD PACKAGE REFLOW(1) WAVE BGA, SQFP not suitable HLQFP, HSQFP, HSOP, HTSSOP, SMS not PLCC(3), SO, SOJ suitable suitable(2) suitable suitable suitable LQFP, QFP, TQFP not recommended(3)(4) suitable SSOP, TSSOP, VSO not recommended(5) suitable Notes 1. All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the maximum temperature (with respect to time) and body size of the package, there is a risk that internal or external package cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). For details, refer to the Drypack information in the “Data Handbook IC26; Integrated Circuit Packages; Section: Packing Methods”. 2. These packages are not suitable for wave soldering as a solder joint between the printed-circuit board and heatsink (at bottom version) can not be achieved, and as solder may stick to the heatsink (on top version). 3. If wave soldering is considered, then the package must be placed at a 45° angle to the solder wave direction. The package footprint must incorporate solder thieves downstream and at the side corners. 4. Wave soldering is only suitable for LQFP, TQFP and QFP packages with a pitch (e) equal to or larger than 0.8 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.65 mm. 5. Wave soldering is only suitable for SSOP and TSSOP packages with a pitch (e) equal to or larger than 0.65 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm. DEFINITIONS Data sheet status Objective specification This data sheet contains target or goal specifications for product development. Preliminary specification This data sheet contains preliminary data; supplementary data may be published later. Product specification This data sheet contains final product specifications. Limiting values Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Where application information is given, it is advisory and does not form part of the specification. LIFE SUPPORT APPLICATIONS These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale. 1999 Feb 17 32 Philips Semiconductors Product specification Cordless telephone, answering machine line interface NOTES 1999 Feb 17 33 UBA1707 Philips Semiconductors Product specification Cordless telephone, answering machine line interface NOTES 1999 Feb 17 34 UBA1707 Philips Semiconductors Product specification Cordless telephone, answering machine line interface NOTES 1999 Feb 17 35 UBA1707 Philips Semiconductors – a worldwide company Argentina: see South America Australia: 34 Waterloo Road, NORTH RYDE, NSW 2113, Tel. +61 2 9805 4455, Fax. +61 2 9805 4466 Austria: Computerstr. 6, A-1101 WIEN, P.O. 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The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights. Printed in The Netherlands 465002/750/03/pp36 Date of release: 1999 Feb 17 Document order number: 9397 750 04964