INTEGRATED CIRCUITS DATA SHEET TEA1065 Versatile telephone transmission circuit with dialler interface Product specification File under Integrated Circuits, IC03A March 1994 Philips Semiconductors Product specification Versatile telephone transmission circuit with dialler interface TEA1065 • Large gain setting range on microphone and earpiece amplifiers FEATURES • Current and voltage regulator mode with adjustable static resistances • Line loss compensation facility, line current dependent (on microphone and earpiece amplifiers) • Provides supply for external circuitry • Adjustable gain control • Symmetrical high-impedance inputs for piezoelectric microphone • DC line voltage adjustment facility • Asymmetrical high-impedance input for electret microphone GENERAL DESCRIPTION • DTMF signal input with confidence tone The TEA1065 is a bipolar integrated circuit which performs all speech and line interface functions that are required in fully electronic telephone sets with adjustable DC mask. The circuit performs electronic switching between dialling and speech internally. • Mute input for pulse or DTMF dialling • Power-down input for pulse dial or register recall • Digital pulse input to drive an external switch transistor • Receiving amplifier for magnetic, dynamic or piezoelectric earpieces ORDERING INFORMATION PACKAGE EXTENDED TYPE NUMBER PINS PIN POSITION MATERIAL CODE TEA1065 24 DIL plastic SOT101L TEA1065T 24 SO24 plastic SOT137A Notes 1. SOT101-1; 1998 Jun 18. 2. SOT137-1; 1998 Jun 18. QUICK REFERENCE DATA SYMBOL PARAMETER VLN line voltage Iline normal operation line current range ICC internal supply consumption CONDITIONS Iline = 15 mA TYP. MAX. UNIT 4.25 4.45 4.65 V 10 − 150 mA − 1.14 1.5 mA − 73 105 µA IP = 1.2 mA 2.7 − − V IP = 1.55 mA 2.5 − − V microphone amplifier 30 − 46 dB earpiece amplifier 20 − 45 dB −5.5 −5.9 −6.3 dB −25 − +75 °C power-down input LOW power-down input HIGH VCC MIN. supply voltage for peripherals Iline = 15 mA; MUTE input HIGH GV ∆GV voltage gain range line loss compensation gain control range Tamb March 1994 operating ambient temperature range 2 Philips Semiconductors Product specification Versatile telephone transmission circuit with dialler interface TEA1065 handbook, full pagewidth 17 IR + 6 − + 5 − 4 − TEA1065 MIC+ MIC− DTMF MUTE VCC PD + 8 2 + 7 1 − − + − 19 dB 24 3 + QR+ QR− GAS1 LN SLPE GAS2 20 21 18 BANDGAP REFERENCE SUPPLY AND REFERENCE 11 13 CONTROL CURRENT CURRENT REFERENCE 16 VEE 22 REG 23 AGC + − 9 STAB Fig.1 Block diagram. March 1994 GAR 3 LINE CURRENT CONTROL 10 DPI 14 VSI 12 VBG REFI DOC 15 CURL MBA557 Philips Semiconductors Product specification Versatile telephone transmission circuit with dialler interface TEA1065 PINNING SYMBOL PIN DESCRIPTION LN 1 positive line terminal GAS1 2 gain adjustment; sending amplifier GAS2 3 gain adjustment; sending amplifier QR− 4 inverting output; receiving amplifier QR+ 5 non-inverting output; receiving amplifier GAR 6 gain adjustment; receiving amplifier MIC− 7 MIC+ STAB handbook, halfpage LN 1 24 SLPE GAS1 2 23 AGC GAS2 3 22 REG inverting microphone input QR− 4 21 VCC 8 non-inverting microphone input QR+ 5 20 MUTE 9 current stabilizer GAR 6 DPI 10 digital pulse input VBG 11 bandgap output reference DOC 12 drive current output REFI 13 reference voltage input VSI 14 voltage sense input CURL 15 current limitation input VBG 11 14 VSI VEE 16 negative line terminal DOC 12 13 REFI IR 17 receiving amplifier input PD 18 power-down input DTMF 19 dual-tone multifrequency input MUTE 20 MUTE input VCC 21 positive supply decoupling REG 22 voltage regulator decoupling AGC 23 automatic gain control input SLPE 24 slope (DC resistance) adjustment March 1994 19 DTMF TEA1065 MIC− 7 18 PD MIC+ 8 17 IR STAB 9 16 VEE DPI 10 15 CURL MBA551 Fig.2 Pinning diagram. 4 Philips Semiconductors Product specification Versatile telephone transmission circuit with dialler interface TEA1065 This line current value will be reached when the voltage on pin VSI (almost equal to the voltage on pin SLPE) exceeds the voltage on pin REFI (equal to the voltage on pin VBG divided by the resistor tap R13, R14). For other values of R13 and R14, the Iknee current is given by the following formula: FUNCTIONAL DESCRIPTION Supply: VCC, LN, SLPE, REG and STAB The circuit and its peripherals are usually supplied from the telephone line. The circuit develops its own supply voltage at VCC (pin 21) and regulates its voltage drop between LN and SLPE (pins 1 and 24). The internal supply requires a decoupling capacitor between VCC and VEE (pin 16); the internal voltage regulator has to be decoupled by a capacitor from REG (pin 22) to VEE. The internal current stabilizer is set by a 3.6 kΩ resistor connected between STAB (pin 9) and VEE. The TEA1065 can be set either in a DC voltage regulator mode or in a DC current regulator mode. The DC mask can be selected by connecting the appropriate external components to the dedicated pins (VSI, REFI, DOC, VBG). When the DC current regulator mode is not required it can be cancelled by connecting pin VSI to VEE; pins REFI, VBG and DOC are left open-circuit. Iknee = ICC + IP + (VBG/R9) × {R14/(R14 + R13)} − (R15/R9) × IO(VSI) ICC is the current required by the circuit itself (typ. 1.14 mA). IP is the current required by the peripheral circuits connected between VCC and VEE. IO(VSI) is the output current from pin VSI (typ. 2.5 µA). The DC slope of the Vline/Iline curve is, in this mode, determined by R9 (R9 = R9a + R9b) in series with the rds of the external line current control transistor (see Fig.4; rds = ∂VGS/∂ID at VGS = VDS). Current regulator mode The current regulator mode is achieved when the line current is greater than Iknee. In this mode, the slope of the Vline/Iline curve is approximately 1300 Ω with R9 = 20 Ω, R16 = 1 MΩ, R13 = R14 = 30 kΩ. For other values of these resistances, the slope value can be approximated by the following formula: Voltage regulator mode The voltage regulator mode is achieved when the line current is less than the current Iknee as illustrated in Fig.3. With R13 = R14 = 30 kΩ, the current Iknee = 30 mA (Ip = 0 mA). R9 × {1 + R16 × (1/R13 + 1/R14)} MBA567 handbook, full pagewidth line current Iknee 0 0 voltage regulator mode current regulator mode Fig.3 Voltage and current regulator mode. March 1994 5 set voltage Philips Semiconductors Product specification Versatile telephone transmission circuit with dialler interface Iline in the current regulator mode). Under normal conditions ISLPE >> ICC + 0.3 mA + Ip and for the voltage regulator mode (Iline < Iknee), the static behaviour of the circuit is equal to a 4.18 V voltage regulator diode with an internal resistance of R9 in series with the VGSon of the external line current control transistor. For the current regulator mode (Iline > Iknee), the static behaviour of the circuit is equal to a 4.18 V voltage regulator diode with an internal resistance of R9 in series with the VGSon of the external line current control transistor and also in series with a DC voltage source R16 × IDOC (the preferred value of R16 is 1 MΩ at this value the current IDOC is negligible compared to Iline). The DC current flowing into the set is determined by the exchange supply voltage (Vexch), the DC resistance of the subscriber line (Rline) and the DC voltage on the subscriber set (see Fig.4). If the line current exceeds ICC + 0.3 mA, required by the circuit itself (ICC ≈ 1.14 mA), plus the current Ip required by the peripheral circuits connected to VCC then the voltage regulator will divert the excess current via LN. VLN = Vref + ISLPE × R9 = Vref + (Iline − ICC − 0.3 × 10−3 − Ip) × R9 where: Vref is an internally generated temperature compensated reference voltage of 4.18 V and R9 is an external resistor connected between SLPE and VEE. In the audio frequency range the dynamic impedance between LN and VEE is equal to R1 (see Fig.8). The internal reference voltage Vref can be adjusted by means of an external resistor RVA. This resistor, connected between LN and REG, will decrease the internal reference voltage. When RVA is connected between REG and SLPE the internal reference voltage will increase. The maximum allowed line current is given in Figs 5 and 6, where the current is shown as a function of the required reference voltage, ambient temperature and applied package. The preferred value of R9 is 20 Ω. Changing R9 will influence the microphone gain, gain control characteristics, sidetone and the maximum output swing on LN. In this instance, the voltage on the line (excluding the diode rectifier bridge; see Fig.4) is: Vline = VLN + VGS + R16 × IDOC where: VGS is the voltage drop between the gate and source terminal of the external line current control transistor and IDOC is the current sunk by pin DOC (IDOC = 0 in the voltage regulator mode and increases with handbook, full pagewidth Rline Vline Iline R1 IDOC ISLPE + 0.5 mA R16 Rexch TEA1065 ICC DOC LN 12 1 TEA1065 DC 0.3 mA AC Vexch Ip VCC 21 22 9 24 16 REG STAB SLPE VEE C3 R5 C1 peripheral circuits R9 MBA550 Fig.4 Supply arrangement. March 1994 6 Philips Semiconductors Product specification Versatile telephone transmission circuit with dialler interface TEA1065 The current Ip, available from VCC for supplying peripheral circuits, depends on the external components and on the line current. Fig.7 shows this current for VCC > 2.2 V and for VCC > 3 V, where 3 V is the minimum supply voltage for most CMOS circuits including a diode voltage drop for a back-up diode. If MUTE is LOW the available current is further reduced when the receiving amplifier is driven (earpiece amplifier supplied from VCC). MBA570 MBA571 handbook, halfpage handbook, halfpage ILN 170 ILN 170 (mA) 150 (mA) 150 130 130 (1) 110 (1) 110 (2) (2) 90 90 70 70 50 50 (3) (4) (5) 30 2 4 6 8 30 10 12 VLN-VSLPE (V) 2 4 6 Tamb Tamb 8 Ptot (1) 35 °C 1.2 (2) 45 °C 1.07 W Ptot W (3) 55 °C 0.93 W (1) 65 °C 1.2 W (4) 65 °C 0.8 (2) 75 °C 1.0 W (5) 75 °C 0.67 W Fig.5 TEA1065 safe operating area. March 1994 10 12 VLN-VSLPE (V) W Fig.6 TEA1065T safe operating area. 7 Philips Semiconductors Product specification Versatile telephone transmission circuit with dialler interface TEA1065 MBA569 3 handbook, halfpage IP (mA) (1) 2 (2) 1 (3) (4) 0 0 1 2 3 VCC (V) 4 Iline = 15 mA at VLN = 4.45 V R1 = 620 Ω R9 = 20 Ω Curve (1) and (3) are valid when the receiving amplifier is not driven or when MUTE = HIGH, curves (2) and (4) are valid when MUTE = LOW and the receiving amplifier is driven, Vo(rms) = 150 mV, RL = 150 Ω (asymmetrical). (1) = 2.2 mA; (2) = 1.77 mA; (3) = 0.78 mA and (4) = 0.36 mA. Fig.7 Maximum current Ip available from VCC for external (peripheral) circuitry with VCC > 2.2 V and VCC > 3 V. LN handbook, halfpage Leq Rp R1 Vref REG R9 20 Ω C3 4.7 µF SLPE VCC C1 MBA552 VEE Leq = C3 × R9 × Rp Rp = 17.5 kΩ Fig.8 Equivalent circuit impedance between LN and VEE. March 1994 8 Philips Semiconductors Product specification Versatile telephone transmission circuit with dialler interface TEA1065 The gain of the microphone amplifier is proportional to external resistor R7, connected between GAS1 and GAS2, which can be adjusted between 30 dB and 46 dB to suit the sensitivity of the transducer. Microphone inputs MIC+ and MIC− and gain adjustment connections GAS1 and GAS2 The TEA1065 has symmetrical microphone inputs, its input impedance is 40.8 kΩ (2 × 20.4 kΩ) and its voltage gain is typ. 38 dB with R7 = 68 kΩ. Either dynamic, magnetic or piezoelectric microphones can be used, or an electret microphone with a built-in FET buffer. Arrangements for the microphones types are illustrated in Fig.9. An external 100 pF capacitor (C6) is required between GAS1 and SLPE to ensure stability. A larger value of C6 may be chosen to obtain a first-order low-pass filter. The “cut-off” frequency corresponds with the time constant R7 × C6. handbook, full pagewidth VCC MIC+ 21 MIC− 8 MIC+ 8 7 (1) MIC− MIC+ 7 MIC− 8 7 16 VEE MBA553 (a) (a) magnetic or dynamic microphone, the resistor (1) may be connected to reduce the terminating impedance, or for sensitive types a resistive attenuator can be used to prevent overloading the microphone inputs; (b) (c) (b) electret microphone; (c) piezoelectric microphone. Fig.9 Microphone arrangements. March 1994 9 Philips Semiconductors Product specification Versatile telephone transmission circuit with dialler interface TEA1065 QR− (inverting). These outputs may be used for single-ended or differential drive, depending on the type and sensitivity of the earpiece used (see Fig.10). Gain from IR to QR+ is typically 31 dB with R4 = 100 kΩ, which is sufficient for low-impedance magnetic or dynamic earpieces which are suitable for single-ended drive. By using both outputs (differential drive) the gain is increased by 6 dB. Differential drive can be used when earpiece impedance exceeds 450 Ω as with high impedance dynamic, magnetic or piezoelectric earpieces. MUTE input When MUTE = HIGH the DTMF input is enabled and the microphone and receiving amplifier inputs are inhibited. When MUTE = LOW or open-circuit the DTMF input is inhibited and the microphone and receiving amplifier inputs are enabled. Switching the MUTE input will cause negligible clicks at the earpiece outputs and on the line. An electrostatic discharge protection diode is connected between pin MUTE and pin VCC (pins 20 and 21). The output voltage of the receiving amplifier is specified for continuous-wave drive. The maximum output voltage will be higher under speech conditions where the ratio of peak and RMS value is higher. Dual-tone multifrequency input DTMF When the DTMF input is enabled, dialling tones may be sent onto the line. The voltage gain from DTMF to LN is typ. 12.5 dB less than the gain of the microphone amplifier and varies with R7 in the same way as the gain of the microphone amplifier. This means that the tone level at the DTMF input has to be adjusted after setting the gain of the microphone amplifier. When R7 = 68 kΩ the gain is typically 25.5 dB. The signalling tones can be heard in the earpiece at a low level (confidence tone). The gain of the receiving amplifier can be adjusted over a range of −11 dB to +8 dB to suit the sensitivity of the transducer that is used. The gain is proportional to external resistor R4 connected between GAR and QR+. Two external capacitors, C4 = 100 pF and C7 = 1 nF, are necessary to ensure stability. A larger value of C4 may be chosen to obtain a first-order low-pass filter. The “cut-off” frequency corresponds with the time constant R4 × C4. Receiving amplifiers: IR, QR+, QR− and GAR The receiving amplifier has one input IR and two complementary outputs, QR+ (non-inverting) and handbook, full pagewidth 5 4 16 QR+ 5 QR+ 5 QR+ (1) 5 QR+ (2) QR− VEE 4 QR− 4 QR− 4 QR− MBA554 (a) (b) (c) (d) Fig.10 Alternative receiver arrangements: (a) dynamic earpiece with an impedance less than 450 Ω; (b) dynamic earpiece with an impedance more than 450 Ω; (c) magnetic earpiece with an impedance more than 450 Ω, resistor (1) may be connected to prevent distortion (inductive load); (d) piezoelectric earpiece, resistor (2) is required to increase the phase margin (stability with capacitive load). March 1994 10 Philips Semiconductors Product specification Versatile telephone transmission circuit with dialler interface TEA1065 Automatic gain control Automatic compensation of line loss is obtained by connecting a resistor (R6) between AGC and VEE. The automatic gain control varies the gain of the microphone amplifier and receiving amplifier in accordance with the DC line current (see Fig.12). The control range is 5.9 dB; this corresponds to a line length of 3.5 km of twisted pair cable (see Fig.11). The DTMF gain is not affected by this feature. If automatic line loss compensation is not required the AGC pin can be left open-circuit, the amplifiers then give their maximum gain. 34.8 Ω handbook, full pagewidth 75 µH 75 µH 34.8 Ω 24.3 nF 13 nF 24.3 nF 34.8 Ω 75 µH 75 µH 34.8 Ω MBA572 Fig.11 Typical 0.5 km line cell model used for automatic gain control optimization. handbook, full pagewidth MBA549 1 ∆Gv (dB) R6 = ∞ 0 −1 −3 −5 −7 R6 = 0 20 86.6 kΩ 40 118 kΩ 147 kΩ 60 187 kΩ 80 Iline (mA) Fig.12 Variation of gain as a function of line current with R6 as a parameter; R9 = 20 Ω. March 1994 11 Philips Semiconductors Product specification Versatile telephone transmission circuit with dialler interface activated. The voltage applied on pin REFI represents a fraction of the bandgap reference voltage given by pin VBG (resistor tap R13 and R14) in order to determine Iknee. Power-down input PD During pulse dialling or register recall (timed-loop-break) the telephone line is interrupted, consequently it provides no supply for the transmission circuit and the peripherals connected to VCC. These gaps have to be bridged by the charge in the smoothing capacitor C1. The requirement on this capacitor is relaxed by applying a HIGH level to the PD input during the loop-break. This reduces the internal supply current from typ. 1.14 mA to 73 µA. Drive current output DOC Pin DOC drives the external line current control transistor in order to achieve line interruption during pulse dialling (or register recall) and also the DC slope when Iline > Iknee. The current sunk by pin DOC is determined by the voltage on pin VSI in comparison with the voltage on pin VBG divided by the resistor tap R13 and R14. When pin DPI is activated, pin DOC changes to a low voltage (by trying to sink typ. 900 µA to VEE) to switch off the external line current control transistor. A HIGH level at PD also disconnects the capacitor at REG which results in the voltage stabilizer having no switch-on delay after line interruptions. This results in no contribution of the IC to the current waveform during pulse dialling or register recall. When this facility is not required PD may be left open-circuit or connected to VEE. An electrostatic discharge protection diode is connected between pin PD and VCC. Bandgap reference output VBG This output provides a voltage reference to set the knee line current with the following formula: Digital pulse input DPI Iknee = ICC + IP + (VBG/R9) × {R14/(R14 + R13)} − (R15/R9) × 2.5 × 10−6 A HIGH level at DPI creates a current which flows from pin DOC to VEE in order to interrupt the line current by the external line current control transistor (see Fig.18; MOSFET BUK554). A LOW level (or pin left open-circuit) disables this current to provide the normal DC regulation (voltage or current). A simple application without regulation of current in pulse dialling mode is given in Fig.18. In order to improve stability, a capacitive load is not allowed on this output. Current limit input CURL This input is applied to the base of an internal NPN transistor which has its collector connected to pin DOC and its emitter to VEE (see Fig.13). The transistor limits the line current just after hook-off or during line transients to a value given by the following formula: When DPI is activated (HIGH level), the external line current control transistor is switched off resulting in no current in the TEA1065. The voltage on pin SLPE becomes zero and capacitor C15 discharges cancelling the current regulation when DPI becomes inactive (LOW level). Ihook-off = I(R1) + VBE/R9b VBE is the base-emitter voltage of the transistor (typ. 700 mV at 25 °C). I(R1) is the current flowing through R1 to charge C1 just after hook-off. To provide a constant regulation (in speech mode and pulse mode), an external transistor is required to keep C15 charged during DPI active (see Fig.19 in which the Field Effect Transistor BSJ177 is directly driven by the DPI signal). An electrostatic discharge protection diode is connected between pin DPI and pin VCC. DOC handbook, halfpage IC (collector current) CURL Voltage sense input and reference voltage input VSI and REFI The voltage on pin VSI represents the DC voltage of pin SLPE. The RC filter (R15 × C15) is also intended to disable the DC regulation when C15 is shunted or not yet charged (especially directly after hook-off). The time constant R15 × C15 determines approximately the time when no regulation (except CURL pin limitation) is March 1994 TEA1065 VEE MBA556 Fig.13 Internal current limiting transistor. 12 Philips Semiconductors Product specification Versatile telephone transmission circuit with dialler interface The maximum hook-off current then becomes: TEA1065 also depends on the accuracy of the match between Zbal and the impedance of the average line. Ihook-off = VZ/R1 + VBE × (R9a + R9b + R1)/(R1 × R9b) Example where VZ is the Zener voltage of diode D5 (see Fig.18). With k = 1, R1 = 619 Ω, R9 = 20 Ω and an average line impedance represented by 270 Ω + (120 nF // 1100 Ω), the calculation results in: Side-tone suppression Suppression of the transmitted signal in the earpiece is obtained by the anti-sidetone network comprising R1//Zline, R2, R3, R9 and Zbal (see Fig.18). Maximum compensation is obtained when the following conditions are fulfilled: • R2 = 130 a) R9 × R2 = R1 × (R3 + R8) b) k = R3 × (R8 + R9)/(R2 × R9) c) Zbal = k × Zline The anti-sidetone network for the TEA1060 family, shown in Fig.15, attenuates the signal received from the line by 32 dB before it enters the receiving amplifier. The attenuation is almost constant over the whole audio-frequency range. • R3 = 3650 Ω • R8 = 715 Ω The scale factor k is chosen to meet the compatibility with a standard capacitor from the E6 or E12 range for Zbal. Note In practice Zline varies considerably with the line length and line type. Therefore, the value chosen for Zbal should be for an average line length giving satisfactory sidetone suppression with long and short times. The suppression handbook, full pagewidth kΩ More information on the balancing of the anti-sidetone bridges can be obtained in our publication “Versatile speech transmission ICs for electronic telephone sets”, order number 9398 341 10011. Iline MBA568 Ihook-off 0 0 hook-off speech mode pulse dialling mode time Fig.14 Example of line current shape in pulse dialling mode (see also Fig.18). March 1994 13 Philips Semiconductors Product specification Versatile telephone transmission circuit with dialler interface TEA1065 LN handbook, full pagewidth Zline R1 R2 IR im VEE Rt R3 R9 R8 Zbal SLPE MBA555 Fig.15 Equivalent circuit of TEA1060 family anti-sidetone bridge. LIMITING VALUES In accordance with the absolute maximum system (IEC 134) SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT VLN positive line voltage continuous − 12 V VDOC positive DOC voltage continuous − 12 V VLN repetitive line voltage during switch-on or line interruption − 13.2 V ILN line current (see also Fig.5 and 6) − 150 mA VI input voltage on pins other than LN, DOC, VSI, REFI and CURL VEE − 0.7 VCC + 0.7 V Ptot total power dissipation Tstg storage temperature range −40 + 125 °C Tamb operating ambient temperature range −25 +75 °C Tj junction temperature − +125 °C see Figs 5 and 6 THERMAL RESISTANCE SYMBOL Rth j-a Rth j-a PARAMETER TYP. from junction to ambient in free air; TEA1065 from junction to ambient in free air; TEA1065T (1) MAX. UNIT − 50 K/W − 75 K/W Note 1. TEA1065T is mounted on glassy epoxy board 28.5 × 19.1 × 1.5 mm HANDLING Every pin withstands the ESD test in accordance with MIL-STD-883C class 2, method 3015 (HBM 1500 Ω, 100 pF, 3 positive pulses and 3 negative pulses on each pin as a function of pin VEE. March 1994 14 Philips Semiconductors Product specification Versatile telephone transmission circuit with dialler interface TEA1065 CHARACTERISTICS ILN = 10 to 150 mA; VEE = 0 V; f = 800 Hz; Tamb = 25 °C; R9 = 20 Ω; unless otherwise specified SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT Supply LN and VCC (pins 1 and 21) VLN voltage drop over circuit Iline = 5 mA 3.95 4.25 4.55 V Iline = 15 mA 4.25 4.45 4.65 V Iline = 100 mA 5.4 6.1 6.7 V Iline = 140 mA − − 7.5 V −3 −1 +1 mV/K RVA = R1-22 = 68 kΩ 3.6 3.9 4.15 V ∆VLN/∆T variation with temperature Iline = 15 mA VLN voltage drop over circuit Iline = 15 mA ICC supply current RVA = R22-24 = 39 kΩ 4.7 5.0 5.3 V PD = LOW; VCC = 2.8 V − 1.14 1.5 mA PD = HIGH; VCC = 2.8 V − 73 105 µA 18.5 20.4 24.3 kΩ Iline = 15 mA; R7 = 68 kΩ 37 38 39 dB −0.5 ±0.2 +0.5 dB − ±0.5 − dB Microphone inputs MIC+ and MIC− (pins 8 and 7) Z I input impedance Gv voltage gain ∆Gvf variation with frequency Iline = 15 mA; referred to 800 Hz f = 300 to 3400 Hz variation with temperature Iline = 50 mA; referred to 25 °C Tamb = −25 to 75 °C; ∆GvT without R6 Dual-tone multi-frequency input DTMF (pin 19) ZI input impedance 16.8 20.7 24.6 kΩ Gv voltage gain Iline = 15 mA; R7 = 68 kΩ 24.5 25.5 26.5 dB ∆Gvf variation with frequency Iline = 15 mA −0.5 ±0.2 +0.5 dB referred to 800 Hz f = 300 to 3400 Hz ∆GvT variation with temperature Iline = 50 mA; − ±0.5 − dB referred to 25 °C Tamb = −25 to +75 °C −8 − +8 dB Gain adjustment GAS1 and GAS2 (pin 2 and 3) ∆Gv gain variation with R7 connected between pins 2 and 3; transmitting amplifier March 1994 15 Philips Semiconductors Product specification Versatile telephone transmission circuit with dialler interface SYMBOL PARAMETER TEA1065 CONDITIONS MIN. TYP. MAX. UNIT Transmitting amplifier output LN (pin 1) VLN(rms) Vno(rms) output voltage (RMS value) Iline = 15 mA dtot = 2% 1.9 2.3 − V dtot = 10% − 2.6 − V noise output voltage (RMS Iline = 15 mA; − −68 − dBmp value) R7 = 68 kΩ; 17 21 25 kΩ − 4 − Ω single-ended; RT = 300 Ω 30 31 32 dB differential; RT = 600 Ω 36 37 38 dB f = 300 to 3400 Hz −0.5 ±0.2 +0.5 dB − ±0.2 − dB single-ended; RT = 150 Ω 0.3 0.38 − V differential; RT = 450 Ω 0.56 0.72 − V differential; CT = 60 nF; 0.87 1.07 − V 1.02 1.22 − V single-ended; RT = 300 Ω − 50 − µV differential; RT = 600 Ω − 100 − µV pin 7 and 8 open-circuit psophometrically weighted (P53 curve); control transistor included (MOS BUK554 type see Fig.18) Receiving amplifier input IR (pin 17) ZI input impedance Receiving amplifier outputs QR+ and QR− (pin 5 and 4) ZO output impedance Gv voltage gain Iline = 15 mA; R4 = 100 kΩ ∆Gvf variation with frequency ∆GvT variation with temperature referred to 25 °C without R6; Iline = 50 mA; output voltage (RMS value) Iline = 15 mA; THD = 2%; referred to 800 Hz VO(rms) Tamb = −25 to +75 °C sinewave drive; R4 = 100 kΩ (1500 Ω series resistor); f = 3400 Hz Iline = 30 mA; differential; CT = 60 nF; (1500 Ω series resistor); f = 3400 Hz VO(rms) March 1994 noise output voltage (RMS Iline = 15 mA; value) R4 = 100 kΩ 16 Philips Semiconductors Product specification Versatile telephone transmission circuit with dialler interface SYMBOL PARAMETER TEA1065 CONDITIONS MIN. TYP. MAX. UNIT Gain adjustment GAR (pin 6) ∆Gv receiving amplifier, gain −11 − +8 dB adjustment range Mute input MUTE (pin 20) VIH input voltage HIGH 1.5 − VCC V VIL input voltage LOW − − 0.3 V IMUTE input current − 8 15 µA ∆Gv change of microphone amplifier MUTE = HIGH − −70 − dB voltage gain from DTMF input MUTE = HIGH; −19 −17 −15 dB to QR+ or QR− R4 = 100 kΩ V gain Gv single-ended; RT = 300 Ω Power-down input PD (pin 18) VIH input voltage HIGH 1.5 - VCC VIL input voltage LOW - - 0.3 V IPD input current - 2.5 5.0 µA −5.5 −5.9 −6.3 dB − 28 − mA − 50 − mA − -1.5 − dB − 0.7 − V 60 120 − − − 2 mA − 1.22 − V −100 - +50 µA − 12 − Ω Automatic gain control input AGC (pin 23) ∆Gv controlling the gain from IR to R6 = 118 kΩ QR+, QR− and the gain from MIC+, MIC− to LN; gain control range with respect to Iline = 15 mA Iline highest line current for maximum gain Iline lowest line current for minimum gain ∆Gv change of gain between Iline = 15 and 35.5 mA Current limiting input CURL (pin 15) VBE HFE IC(max) base-emitter voltage drop of see Fig.13; internal transistor IC = 50 µA = IDOC current gain of internal see Fig.13; transistor IC = 50 µA = IDOC maximum collector current of see Fig.13 internal transistor Bandgap reference voltage output VBG (pin 12) VBG reference voltage IBG output drive capability ZO output impedance March 1994 note 1 17 Philips Semiconductors Product specification Versatile telephone transmission circuit with dialler interface SYMBOL PARAMETER TEA1065 CONDITIONS MIN. TYP. MAX. UNIT Voltage sense input VSI (pin 14) IO output current pin VSI connected to VEE − −2.5 − µA − − 2.0 mA 120 300 − µA 200 900 − µA V Reference input REFI (pin 13) IO output current Drive current output DOC (pin 11) IO output current REFI connected to VEE; VSI not connected; DPI = LOW REFI not connected; VSI connected to VEE; DPI = HIGH Digital pulse input DPI (pin 10) VIH input voltage HIGH 1.5 − VCC VIL input voltage LOW − − 0.3 V IDPI input current − 2.5 5 µA Note 1. No capacitive load on the VBG output. Positive current is defined as conventional current flow into a device. Negative current is defined as conventional current flow out of a device. March 1994 18 Philips Semiconductors Product specification Versatile telephone transmission circuit with dialler interface TEA1065 Iline R1 handbook, full pagewidth 620 Ω 21 17 8 Vi 7 19 C1 100 µF VCC 13 12 REFI 1 LN DOC 11 VBG QR− IR MIC+ QR+ MIC− CURL TEA1065 DTMF GAR 4 100 µF 5 RL 600 Ω 15 R4 100 kΩ Vo C4 100 pF 6 C7 1 nF 20 18 10 µF Vi 14 MUTE GAS1 DPI PD VSI VEE 16 REG 22 C3 4.7 µF AGC STAB 23 9 R6 118 kΩ R5 3.6 kΩ GAS2 SLPE 5 to 140 mA 2 10 3 R7 68 kΩ C6 100 pF 24 R9 20 Ω MBA558 Voltage gain is defined as Gv = 20 Log Vo/Vi. For measuring the gain from MIC+ and MIC− the MUTE input should be LOW or open-circuit, for measuring the DTMF input MUTE should be HIGH. Inputs not under test should be open-circuit except VSI that should be connected to VEE. Fig.16 Test circuit for defining voltage gain of MIC+, MIC− and DTMF inputs. March 1994 19 Philips Semiconductors Product specification Versatile telephone transmission circuit with dialler interface TEA1065 Iline R1 handbook, full pagewidth 620 Ω 21 17 VCC 13 12 REFI 1 LN DOC 11 VBG QR− IR Vo 4 100 µF ZL 8 7 19 C1 100 µF QR+ MIC− CURL TEA1065 DTMF GAR RL 600 Ω 5 15 R4 100 kΩ C4 100 pF 6 C7 1 nF 20 10 µF Vi MIC+ 18 14 MUTE GAS1 DPI PD VSI VEE 16 REG 22 C3 4.7 µF AGC STAB 23 9 R6 118 kΩ R5 3.6 kΩ GAS2 SLPE 5 to 140 mA 2 10 3 R7 68 kΩ C6 100 pF 24 R9 20 Ω MBA559 Voltage gain is defined as Gv = 20 Log V o/Vi. Fig.17 Test circuit for defining voltage gain of the receiving amplifier. March 1994 20 This text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader.This text is here in _white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader.This text is here inThis text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader. white to force landscape pages to be ... R1 + 620 Ω R2 130 kΩ BAS11 (4×) D1 1 12 C5 17 D2 DOC C1 100 µF 21 LN VCC IR DTMF 100 nF 4 telephone line D4 D3 QR− MUTE R11 R3 3.65 kΩ 5 R4 100 kΩ C7 C4 100 pF 6 QR+ PD TEA1065 GAR DPI MIC+ VEE MIC− AGC 19 from dial and control circuits 20 18 − 10 1 nF 21 8 D5 BZX79c BV2 7 SLPE GAS1 24 C6 R8 GAS2 2 3 VSI REFI 14 R9a 15 Ω Zbal 15 kΩ VBG CURL STAB 11 15 9 23 R6 REG 22 R13 30 kΩ R7 100 pF 68 kΩ R15 715 Ω 13 16 Philips Semiconductors MOSN1 BUK554 Versatile telephone transmission circuit with dialler interface handbook, full pagewidth March 1994 R16 1 MΩ C15 6.8 µF R14 30 kΩ R5 3.6 kΩ C3 4.7 µF Fig.18 Typical application of the TEA1065, with a piezoelectric earpiece and DTMF dialling. TEA1065 MBA561 Product specification R9b 5Ω This text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader.This text is here in _white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader.This text is here inThis text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader. white to force landscape pages to be ... R1 + 620 Ω R2 130 kΩ BAS11 (4×) D1 1 12 C5 17 D2 DOC 21 LN C1 100 µF VCC IR 100 nF 4 telephone line D4 D3 DTMF QR− R11 R3 3.65 kΩ MUTE 5 C4 100 pF R4 100 kΩ C7 6 QR+ PD TEA1065 GAR DPI MIC+ VEE MIC− AGC 19 from dial and control circuits 20 18 10 − 1 nF 22 8 D5 BZX79c BV2 7 SLPE GAS1 24 C6 R8 GAS2 2 VSI 3 REFI 14 R9a 15 Ω 15 kΩ C15 6.8 µF Zbal CURL STAB 11 15 9 R6 REG 22 R14 30 kΩ R5 3.6 kΩ C3 4.7 µF JFP1 BSJ177 DTMF dialling requires a different protection arrangement. Fig.19 Typical application of the TEA1065, with a piezoelectric earpiece and pulse dialling. TEA1065 MBA560 Product specification R9b 5Ω VBG 23 R13 30 kΩ R7 100 pF 68 kΩ R15 715 Ω 13 16 Philips Semiconductors MOSN1 BUK554 Versatile telephone transmission circuit with dialler interface handbook, full pagewidth March 1994 R16 1 MΩ Philips Semiconductors Product specification Versatile telephone transmission circuit with dialler interface TEA1065 PACKAGE OUTLINES seating plane DIP24: plastic dual in-line package; 24 leads (600 mil) SOT101-1 ME D A2 L A A1 c e Z b1 w M (e 1) b MH 13 24 pin 1 index E 1 12 0 5 10 mm scale DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT A max. A1 min. A2 max. b b1 c D (1) E (1) e e1 L ME MH w Z (1) max. mm 5.1 0.51 4.0 1.7 1.3 0.53 0.38 0.32 0.23 32.0 31.4 14.1 13.7 2.54 15.24 3.9 3.4 15.80 15.24 17.15 15.90 0.25 2.2 inches 0.20 0.020 0.16 0.066 0.051 0.021 0.015 0.013 0.009 1.26 1.24 0.56 0.54 0.10 0.60 0.15 0.13 0.62 0.60 0.68 0.63 0.01 0.087 Note 1. Plastic or metal protrusions of 0.25 mm maximum per side are not included. REFERENCES OUTLINE VERSION IEC JEDEC SOT101-1 051G02 MO-015AD March 1994 EIAJ EUROPEAN PROJECTION ISSUE DATE 92-11-17 95-01-23 23 Philips Semiconductors Product specification Versatile telephone transmission circuit with dialler interface TEA1065 SO24: plastic small outline package; 24 leads; body width 7.5 mm SOT137-1 D E A X c HE y v M A Z 13 24 Q A2 A (A 3) A1 pin 1 index θ Lp L 1 12 e detail X w M bp 0 5 10 mm scale DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (1) e HE L Lp Q v w y mm 2.65 0.30 0.10 2.45 2.25 0.25 0.49 0.36 0.32 0.23 15.6 15.2 7.6 7.4 1.27 10.65 10.00 1.4 1.1 0.4 1.1 1.0 0.25 0.25 0.1 0.9 0.4 inches 0.10 0.012 0.096 0.004 0.089 0.01 0.019 0.013 0.014 0.009 0.61 0.60 0.30 0.29 0.050 0.419 0.043 0.055 0.394 0.016 0.043 0.039 0.01 0.01 0.004 0.035 0.016 Z (1) θ 8o 0o Note 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. REFERENCES OUTLINE VERSION IEC JEDEC SOT137-1 075E05 MS-013AD March 1994 EIAJ EUROPEAN PROJECTION ISSUE DATE 95-01-24 97-05-22 24 Philips Semiconductors Product specification Versatile telephone transmission circuit with dialler interface Several techniques exist for reflowing; for example, thermal conduction by heated belt. Dwell times vary between 50 and 300 seconds depending on heating method. Typical reflow temperatures range from 215 to 250 °C. SOLDERING Introduction There is no soldering method that is ideal for all IC packages. Wave soldering is often preferred when through-hole and surface mounted components are mixed on one printed-circuit board. However, wave soldering is not always suitable for surface mounted ICs, or for printed-circuits with high population densities. In these situations reflow soldering is often used. Preheating is necessary to dry the paste and evaporate the binding agent. Preheating duration: 45 minutes at 45 °C. WAVE SOLDERING This text gives a very brief insight to a complex technology. A more in-depth account of soldering ICs can be found in our “Data Handbook IC26; Integrated Circuit Packages” (order code 9398 652 90011). Wave soldering techniques can be used for all SO packages if the following conditions are observed: • A double-wave (a turbulent wave with high upward pressure followed by a smooth laminar wave) soldering technique should be used. DIP • The longitudinal axis of the package footprint must be parallel to the solder flow. SOLDERING BY DIPPING OR BY WAVE The maximum permissible temperature of the solder is 260 °C; solder at this temperature must not be in contact with the joint for more than 5 seconds. The total contact time of successive solder waves must not exceed 5 seconds. • The package footprint must incorporate solder thieves at the downstream end. During placement and before soldering, the package must be fixed with a droplet of adhesive. The adhesive can be applied by screen printing, pin transfer or syringe dispensing. The package can be soldered after the adhesive is cured. The device may be mounted up to the seating plane, but the temperature of the plastic body must not exceed the specified maximum storage temperature (Tstg max). If the printed-circuit board has been pre-heated, forced cooling may be necessary immediately after soldering to keep the temperature within the permissible limit. Maximum permissible solder temperature is 260 °C, and maximum duration of package immersion in solder is 10 seconds, if cooled to less than 150 °C within 6 seconds. Typical dwell time is 4 seconds at 250 °C. REPAIRING SOLDERED JOINTS A mildly-activated flux will eliminate the need for removal of corrosive residues in most applications. Apply a low voltage soldering iron (less than 24 V) to the lead(s) of the package, below the seating plane or not more than 2 mm above it. If the temperature of the soldering iron bit is less than 300 °C it may remain in contact for up to 10 seconds. If the bit temperature is between 300 and 400 °C, contact may be up to 5 seconds. REPAIRING SOLDERED JOINTS Fix the component by first soldering two diagonallyopposite end leads. Use only a low voltage soldering iron (less than 24 V) applied to the flat part of the lead. Contact time must be limited to 10 seconds at up to 300 °C. When using a dedicated tool, all other leads can be soldered in one operation within 2 to 5 seconds between 270 and 320 °C. SO REFLOW SOLDERING Reflow soldering techniques are suitable for all SO packages. Reflow soldering requires solder paste (a suspension of fine solder particles, flux and binding agent) to be applied to the printed-circuit board by screen printing, stencilling or pressure-syringe dispensing before package placement. March 1994 TEA1065 25 Philips Semiconductors Product specification Versatile telephone transmission circuit with dialler interface TEA1065 DEFINITIONS Data sheet status Objective specification This data sheet contains target or goal specifications for product development. Preliminary specification This data sheet contains preliminary data; supplementary data may be published later. Product specification This data sheet contains final product specifications. Limiting values Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Where application information is given, it is advisory and does not form part of the specification. LIFE SUPPORT APPLICATIONS These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale. March 1994 26 Philips Semiconductors Product specification Versatile telephone transmission circuit with dialler interface NOTES March 1994 27 TEA1065 Philips Semiconductors – a worldwide company Argentina: see South America Australia: 34 Waterloo Road, NORTH RYDE, NSW 2113, Tel. +61 2 9805 4455, Fax. +61 2 9805 4466 Austria: Computerstr. 6, A-1101 WIEN, P.O. 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No. 5, 80640 GÜLTEPE/ISTANBUL, Tel. +90 212 279 2770, Fax. +90 212 282 6707 Ukraine: PHILIPS UKRAINE, 4 Patrice Lumumba str., Building B, Floor 7, 252042 KIEV, Tel. +380 44 264 2776, Fax. +380 44 268 0461 United Kingdom: Philips Semiconductors Ltd., 276 Bath Road, Hayes, MIDDLESEX UB3 5BX, Tel. +44 181 730 5000, Fax. +44 181 754 8421 United States: 811 East Arques Avenue, SUNNYVALE, CA 94088-3409, Tel. +1 800 234 7381 Uruguay: see South America Vietnam: see Singapore Yugoslavia: PHILIPS, Trg N. Pasica 5/v, 11000 BEOGRAD, Tel. +381 11 625 344, Fax.+381 11 635 777 For all other countries apply to: Philips Semiconductors, International Marketing & Sales Communications, Building BE-p, P.O. Box 218, 5600 MD EINDHOVEN, The Netherlands, Fax. +31 40 27 24825 Internet: http://www.semiconductors.philips.com © Philips Electronics N.V. 1998 SCA60 All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights. Printed in The Netherlands 415102/00/02d/pp28 Date of release: March 1994 Document order number: 9397 750 nnnnn