NSC MM74HC194

MM54HC194/MM74HC194
4-Bit Bidirectional Universal Shift Register
General Description
This 4-bit high speed bidirectional shift register utilizes advanced silicon-gate CMOS technology to achieve the low
power consumption and high noise immunity of standard
CMOS integrated circuits, along with the ability to drive 10
LS-TTL loads. This device operates at speeds similar to the
equivalent low power Schottky part.
This bidirectional shift register is designed to incorporate
virtually all of the features a system designer may want in a
shift register. It features parallel inputs, parallel outputs,
right shift and left shift serial inputs, operating mode control
inputs, and a direct overriding clear line. The register has
four distinct modes of operation: PARALLEL (broadside)
LOAD; SHIFT RIGHT (in the direction QA toward QD);
SHIFT LEFT; INHIBIT CLOCK (do nothing).
Synchronous parallel loading is accomplished by applying
the four bits of data and taking both mode control inputs, S0
and S1, high. The data are loaded into their respective flip
flops and appear at the outputs after the positive transition
of the CLOCK input. During loading, serial data flow is inhibited. Shift right is accomplished synchronously with the rising edge of the clock pulse when S0 is high and S1 is low.
Connection Diagram
Serial data for this mode is entered at the SHIFT RIGHT
data input. When S0 is low and S1 is high, data shifts left
synchronously and new data is entered at the SHIFT LEFT
serial input. Clocking of the flip flops is inhibited when both
mode control inputs are low. The mode control inputs
should be changed only when the CLOCK input is high.
The 54HC/74HC logic family is functionally as well as pinout compatible with the standard 54LS/74LS logic family.
All inputs are protected from damage due to static discharge by internal diode clamps to VCC and ground.
Features
Y
Y
Y
Y
Y
Y
Typical operating frequency: 45 MHz
Typical propagation delay: ns (clock to Q)
Wide operating supply voltage range: 2 – 6V
Low input current: 1 mA maximum
Low quiescent supply current: 160 mA maximum
(74HC Series)
Fanout of 10 LS-TTL loads
Dual-In Line Package
TL/F/5323 – 1
Order Number MM54HC194 or MM74HC194
Function Table
Inputs
Mode
Clear
L
H
H
H
H
H
H
H
S1 S2
X X
X X
H H
L H
L H
H L
H L
L L
Outputs
Serial
Clock
X
L
u
u
u
u
u
X
H e high level (steady state)
Parallel
Q
QB QC QD
Left Right A B C D A
X
X
X
X
X
H
L
X
C1995 National Semiconductor Corporation
X
X
X
H
L
X
X
X
X
X
a
X
X
X
X
X
TL/F/5323
X
X
b
X
X
X
X
X
X
X
c
X
X
X
X
X
X
X
d
X
X
X
X
X
L
QA0
a
H
L
QBn
QBn
QA0
L
QB0
b
QAn
QAn
QCn
QCn
QB0
L
QC0
c
QBn
QBn
QDn
QDn
QC0
L
QD0
d
QCn
QCn
H
L
QD0
L e low level (steady state)
X e irrelevant (any input, including transitions)
u e transition from low to high level
a, b, c, d e the level of steady-state input at inputs A, B, C, or D,
respectively.
QA0, QB0, QC0, QD0 e the level of QA, QB, QC, or QD, respectively,
before the indicated steady-state input conditions were established.
QAn, QBn, QCn, QDn e the level of QA, QB, QC, respectively, before
transition of the clock.
the most-recent
u
RRD-B30M115/Printed in U. S. A.
MM54HC194/MM74HC194 4-Bit Bidirectional Universal Shift Register
November 1995
Absolute Maximum Ratings (Notes 1 & 2)
Operating Conditions
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
Supply Voltage (VCC)
Supply Voltage (VCC)
DC Input Voltage (VIN)
DC Output Voltage (VOUT)
Clamp Diode Current (IIK, IOK)
DC Output Current, per pin (IOUT)
DC VCC or GND Current, per pin (ICC)
Storage Temperature Range (TSTG)
Power Dissipation (PD)
(Note 3)
S.O. Package only
Lead Temperature (TL)
DC Input or Output Voltage
(VIN, VOUT)
b 0.5 to a 7.0V
b 1.5 to VCC a 1.5V
Operating Temp. Range (TA)
MM74HC
MM54HC
b 0.5 to VCC a 0.5V
g 20 mA
Min
2
Max
6
0
VCC
Units
V
V
b 40
b 55
a 85
a 125
§C
§C
1000
500
400
ns
ns
ns
Input Rise or Fall Times
VCC e 2.0V
(tr, tf)
VCC e 4.5V
VCC e 6.0V
g 25 mA
g 50 mA
b 65§ C to a 150§ C
600 mW
500 mW
(Soldering 10 seconds)
260§ C
DC Electrical Characteristics (Note 4)
Symbol
Parameter
Conditions
TA e 25§ C
VCC
74HC
TA eb40 to 85§ C
Typ
54HC
TA eb55 to 125§ C
Units
Guaranteed Limits
VIH
Minimum High Level
Input Voltage
2.0V
4.5V
6.0V
1.5
3.15
4.2
1.5
3.15
4.2
1.5
3.15
4.2
V
V
V
VIL
Maximum Low Level
Input Voltage**
2.0V
4.5V
6.0V
0.5
1.35
1.8
0.5
1.35
1.8
0.5
1.35
1.8
V
V
V
VOH
Minimum High Level
Output Voltage
VIN e VIH or VIL
lIOUTl s20 mA
2.0V
4.5V
6.0V
2.0
4.5
6.0
1.9
4.4
5.9
1.9
4.4
5.9
1.9
4.4
5.9
V
V
V
4.5V
6.0V
4.2
5.7
3.98
5.48
3.84
5.34
3.7
5.2
V
V
2.0V
4.5V
6.0V
0
0
0
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
V
V
V
VIN e VIH or VIL
lIOUTl s4.0 mA
lIOUTl s5.2 mA
4.5V
6.0V
0.2
0.2
0.26
0.26
0.33
0.33
0.4
0.4
V
V
VIN e VIH or VIL
lIOUTl s4.0 mA
lIOUTl s5.2 mA
VOL
Maximum Low Level
Output Voltage
VIN e VIH or VIL
lIOUTl s20 mA
IIN
Maximum Input
Current
VIN e VCC or GND
6.0V
g 0.1
g 1.0
g 1.0
mA
ICC
Maximum Quiescent
Supply Current
VIN e VCC or GND
IOUT e 0 mA
6.0V
8.0
80
160
mA
Note 1: Absolute Maximum Ratings are those values beyond which damage to the device may occur.
Note 2: Unless otherwise specified all voltages are referenced to ground.
Note 3: Power Dissipation temperature derating Ð plastic ‘‘N’’ package: b 12 mW/§ C from 65§ C to 85§ C; ceramic ‘‘J’’ package: b 12 mW/§ C from 100§ C to 125§ C.
Note 4: For a power supply of 5V g 10% the worst case output voltages (VOH, and VOL) occur for HC at 4.5V. Thus the 4.5V values should be used when designing
with this supply. Worst case VIH and VIL occur at VCC e 5.5V and 4.5V respectively. (The VIH value at 5.5V is 3.85V.) The worst case leakage current (IIN, ICC, and
IOZ) occur for CMOS at the higher voltage and so the 6.0V values should be used.
**VIL limits are currently tested at 20% of VCC. The above VIL specification (30% of VCC) will be implemented no later than Q1, CY’89.
2
AC Electrical Characteristics VCC e 5V, TA e 25§ C, CL e 15 pF, tr e tf e 6 ns
Symbol
Parameter
Conditions
Typ
Guaranteed
Limit
Units
fMAX
Maximum Operating
Frequency
50
35
MHz
tPHL, tPLH
Maximum Propagation
Delay, Clock to Q
17
24
ns
tPHL
Maximum Propagation
Delay, Reset to Q
19
25
ns
tREM
Minimum Removal Time,
Reset Inactive to Clock
5
ns
tS
Minimum Setup Time
(A, B, C, D to Clock)
20
ns
tS
Minimum Setup Time
Mode Controls to Clock
20
ns
tW
Minimum Pulse Width
Clock or Reset
9
16
ns
tH
Minimum Hold Time
any Input
b3
0
ns
AC Electrical Characteristics CL e 50 pF, tr e tf e 6 ns (unless otherwise specified)
Symbol
Parameter
Conditions
VCC
TA e 25§ C
Typ
fMAX
74HC
TA eb40 to 85§ C
54HC
TA eb55 to 125§ C
Units
Guaranteed Limits
Maximum Operating
Frequency
2.0V
4.5V
6.0V
10
45
50
6
30
35
5
24
28
4
20
24
MHz
MHz
tPHL, tPLH
Maximum Propagation
Delay, Clock to Q
2.0V
4.5V
6.0V
70
15
12
145
29
25
183
37
31
216
45
37
ns
ns
ns
tPHL
Maximum Propagation
Delay, Reset to Q
2.0V
4.5V
6.0V
80
15
12
150
30
26
189
37
31
216
45
37
ns
ns
ns
tTHL, tTLH
Maximum Output Rise
and Fall Time
2.0V
4.5V
6.0V
30
8
7
75
15
13
95
19
16
110
22
19
ns
ns
ns
tREM
Minimum Removal Time
Reset Inactive to Clock
2.0V
4.5V
6.0V
5
5
5
5
5
5
5
5
5
ns
ns
ns
tS
Minimum Set Up Time
(A, B, C, or D to Clock)
2.0V
4.5V
6.0V
100
20
17
125
25
21
150
30
25
ns
ns
ns
tS
Minimum Set Time
Mode Controls to Clock
2.0V
4.5V
6.0V
100
20
17
125
25
21
150
30
25
ns
ns
ns
tH
Minimum Hold Time
any Input
2.0V
4.5V
6.0V
b 10
b3
b3
0
0
0
0
0
0
0
0
0
ns
ns
ns
tW
Minimum Pulse Width
Clock or Reset
2.0V
4.5V
6.0V
30
89
8
80
16
14
100
20
18
120
24
20
ns
ns
ns
tr, tf
Maximum Input Rise and
Fall Time
2.0V
4.5V
6.0V
1000
500
400
1000
500
400
1000
500
400
ns
ns
ns
CPD
Power Dissipation
Capacitance (Note 5)
77
CIN
Maximum Input
Capacitance
5
pF
10
10
10
pF
Note 5: CPD determines the no load dynamic power consumption, PD e CPD VCC2 f a ICC VCC, and the no load dynamic current consumption, IS e CPD VCC f a ICC.
3
Logic and Timing Diagrams
TL/F/5323 – 2
TL/F/5323 – 3
4
5
MM54HC194/MM74HC194 4-Bit Bidirectional Universal Shift Register
Physical Dimensions inches (millimeters)
Ceramic Dual-In-Line Package (J)
Order Number MM54HC194J or MM74HC194J
NS Package Number J16A
Molded Dual-In-Line Package (N)
Order Number MM74HC194N
NS Package Number N16E
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