NCV4275 Advance Information 5 V Low−Drop Voltage Regulator This industry standard linear regulator has the capability to drive loads up to 450 mA at 5 V. It is available in DPAK, D2PAK, and TO-220 options. This device is pin-for-pin compatible with Infineon part number TLE4275. http://onsemi.com Features • • • • • • 5 V, ±2%, 450 mA Output Voltage Very Low Current Consumption Active RESET Reset Low Down to VQ = 1 V 500 mV (max) Dropout Voltage Fault Protection ♦ +45 V Peak Transient Voltage ♦ -42 V Reverse Voltage ♦ Short Circuit ♦ Thermal Overload NCV Prefix for Automotive and Other Applications Requiring Site and Change Control • I 1 5 D2PAK 5-PIN DP SUFFIX CASE 936A DPAK 5-PIN DT SUFFIX CASE TBD Pin 1. I 2. RO 3. GND 4. D 5. Q Q Error Amplifier Bandgap Reference Current Limit and Saturation Sense 5 5 TO-220 FIVE LEAD TQ SUFFIX CASE 314D Thermal Shutdown Reset Generator D 1 1 + - TO-220 FIVE LEAD TQVA SUFFIX CASE 314N ORDERING INFORMATION Device GND RO Figure 1. Block Diagram This document contains information on a product under development. ON Semiconductor reserves the right to change or discontinue this product without notice. This document, and the information contained herein, is CONFIDENTIAL AND PROPRIETARY and the property of Semiconductor Components Industries, LLC., dba ON Semiconductor. It shall not be used, published, disclosed or disseminated outside of the Company, in whole or in part, without the written permission of ON Semiconductor. Reverse engineering of any or all of the information contained herein is strictly prohibited. March, 2003 - Rev. 3 Shipping NCV4275DT DPAK* xxx Units/Rail NCV4275DTRK DPAK* xxxx Tape & Reel NCV4275TQ5 D2PAK* 50 Units/Rail NCV4275TQVA5 D2PAK* 750 Tape & Reel NCV4275DP TO-220* STRAIGHT 50 Units/Rail NCV4275DPR5 TO-220* VERTICAL 50 Units/Rail *Five pin/lead. DEVICE MARKING INFORMATION See general marking information in the device marking section on page 6 of this data sheet. 2003, SCILLC. All Rights Reserved. Semiconductor Components Industries, LLC, 2003 Package 1 Publication Order Number: NCV4275/D NCV4275 MAXIMUM RATINGS*† Rating Min Max Unit -42 45 V - TBD V Output (Q) -1.0 16 V Reset Output (RO) -0.3 25 V Reset Output (RO) -5.0 5.0 mA Reset Delay (D) -0.3 7.0 V Reset Delay (D) -2.0 2.0 mA Operating Range (I) 5.5 42 V ESD Susceptibility (Human Body Model) 2.0 - kV Junction Temperature -40 150 °C Storage Temperature -55 150 °C Input [I (DC)] Input [I (Peak Transient Voltage)] Package Thermal Resistance, DPAK, 5-Pin : Junction-to-Case, RθJC Junction-to-Ambient, RθJA - TBD TBD °C/W °C/W Package Thermal Resistance, D2PAK, 5-Pin : Junction-to-Case, RθJC Junction-to-Ambient, RθJA - TBD TBD °C/W °C/W Package Thermal Resistance, TO-220, 5-Lead: Junction-to-Case, RθJC Junction-to-Ambient, RθJA - TBD TBD °C/W °C/W Reflow (SMD styles only) Note 1 - °C Wave Solder (through hole styles only) Note 2 - 240 Peak (Note 3) 260 Peak Lead Temperature Soldering °C 1. 60 seconds max above 183°C. 2. 10 seconds max. 3. -5 °C/+0°C allowable conditions. *The maximum package power dissipation must be observed. †During the voltage range which exceeds the maximum tested voltage of I, operation is assured, but not specified. Wider limits may apply. Thermal dissipation must be observed closely. http://onsemi.com 2 NCV4275 ELECTRICAL CHARACTERISTICS (I = 13.5 V; -40°C < TJ < 150°C; unless otherwise noted) Characteristic Test Conditions Min Typ Max Unit Output Voltage 5.0 mA < IQ < 400 mA, 6.0 V < VI < 28 V 4.9 5.0 5.1 V Output Voltage 5.0 mA < IQ < 200 mA, 6.0 V < VI < 40 V 4.9 5.0 5.1 V - 450 700 - mA Output Output Current Limitation (Note 4) Quiescent Current, Iq = II - IQ IQ = 1.0 mA, TJ = 25°C - 150 200 µA Quiescent Current, Iq = II - IQ IQ = 1.0 mA, TJ = 85°C - 150 220 µA Quiescent Current, Iq = II - IQ IQ = 250 mA - 5.0 10 mA Quiescent Current, Iq = II - IQ IQ = 400 mA - 12 22 mA Dropout Voltage (Note 4) IQ = 300 mA, Vdr = VI - VQ - 250 500 mV Load Regulation IQ = 5.0 mA to 400 mA - 15 30 mV Line Regulation ∆V = 8.0 V to 32 V, IQ = 5.0 mA -15 5.0 15 mV Power Supply Ripple Rejection fr = 100 Hz, Vr = 0.5 Vpp Temperature Output Voltage Drift - 60 - dB - - 0.5 - mV/k - 4.5 4.65 4.8 V Reset Timing D and Output RO Reset Switching Threshold Reset Output Low Voltage Rext > 5.0 k, VQ > 1.0 V - 0.2 0.4 V Reset Output Leakage Current VROH = 5.0 V - 0 10 µA Reset Charging Current VD = 1.0 V Upper Timing Threshold Lower Timing Threshold 3.0 5.5 9.0 µA - 1.5 1.8 2.2 V - 0.2 0.4 0.7 V Reset Delay Time CD = 47 nF 10 16 22 ms Reset Reaction Time CD = 47 nF - 0.5 2.0 µs 4. Measured when the output voltage VQ has dropped 100 mV from the nominal value obtained at VI = 13.5 V. PIN DESCRIPTION ÑÑÑÑ ÑÑÑÑÑÑ ÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑ ÑÑÑÑÑÑÑÑÑÑ ÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑ ÑÑÑÑ ÑÑÑÑÑÑ ÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑ ÑÑÑÑ ÑÑÑÑÑÑ ÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑ ÑÑÑÑ ÑÑÑÑÑÑ ÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑ ÑÑÑÑÑÑÑÑÑÑ ÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑ Pin No. Symbol Description 1 I 2 RO 3 GND 4 D Reset Delay; Timing capacitor to GND for RESET Delay function. 5 Q Output; ±2.0%, 450 mA output. Use 22 µF, ESR < 5.0 Ω to ground. Input; Battery Supply Input Voltage. Reset Output; Open Collector Active Reset (accurate to I > 1.0 V). Ground; Pin 3 internally connected to heatsink. http://onsemi.com 3 NCV4275 APPLICATION INFORMATION VI II CI1 1000 µF I 1 CI2 100 nF ID 5 IQ Q NCV4275 D 4 2 3 CD 47 nF VQ CQ 22 µF Rext 5.0 k IRO RO VRO GND Figure 2. Test Circuit Circuit Description The error amplifier compares a temperature stable reference voltage to a voltage that is proportional to the output voltage (Q) (generated from a resistor divider) and drives the base of a series transistor via a buffer. Saturation control as a function of the load current prevents any oversaturation of the output power device preventing excessive substrate current (quiescent current). where VIN(max) is the maximum input voltage, VOUT(min) is the minimum output voltage, IOUT(max) is the maximum output current for the application, IQ is the quiescent current the regulator consumes at IOUT(max). Once the value of PD(max) is known, the maximum permissible value of RΘJA can be calculated: Stability Considerations The input capacitors (CI1 and CI2) are necessary for line influences. Using a resistor of approximately 1 Ω in series with CI2 can solve potential oscillations due to stray inductance and capacitance. The output or compensation capacitor helps determine three main characteristics of a linear regulator: start-up delay, load transient response and loop stability. The capacitor value and type should be based on cost, availability, size and temperature constraints. A tantalum or aluminum electrolytic capacitor is best, since a film or ceramic capacitor with almost zero ESR can cause instability. The aluminum electrolytic capacitor is the least expensive solution, but, if the circuit operates at low temperatures (-25°C to -40°C), both the value and ESR of the capacitor will vary considerably. The capacitor manufacturers data sheet usually provides this information. The value for the output capacitor COUT shown in Figure 2 should work for most applications, however it is not necessarily the optimized solution. Stability is guaranteed for CQ > 22 µF and an ESR ≤ 5 Ω. T RJA 150°C A PD The value of RΘJA can then be compared with those in the package section of the data sheet. Those packages with RΘJA’s less than the calculated value in Equation 2 will keep the die temperature below 150°C. In some cases, none of the packages will be sufficient to dissipate the heat generated by the IC, and an external heatsink will be required. IOUT IIN VIN SMART REGULATOR VOUT } Control Features Iq Figure 3. Single Output Regulator with Key Performance Parameters Labeled Calculating Power Dissipation in a Single Output Linear Regulator The maximum power dissipation for a single output regulator (Figure 3) is: PD(max) [VIN(max) VOUT(min)] IOUT(max) (2) (1) VIN(max)Iq http://onsemi.com 4 NCV4275 Heat Sinks A heat sink effectively increases the surface area of the package to improve the flow of heat away from the IC and into the surrounding air. Each material in the heat flow path between the IC and the outside environment will have a thermal resistance. Like series electrical resistances, these resistances are summed to determine the value of RΘJA: RJA RJC RCS RSA where RΘJC is the junction-to-case thermal resistance, RΘCS is the case-to-heatsink thermal resistance, RΘSA is the heatsink-to-ambient thermal resistance. RΘJC appears in the package section of the data sheet. Like RΘJA, it too is a function of package type. RΘCS and RΘSA are functions of the package type, heatsink and the interface between them. These values appear in heat sink data sheets of heat sink manufacturers. (3) VI t < Reset Reaction Time VQ VQ,rt t Reset Charge Current dVD CD dt VD Upper Timing Threshold Lower Timing Threshold t Reset Delay Time Reset Reaction Time VRO t Power-on-Reset Thermal Shutdown Voltage Dip at Input Undervoltage Secondary Spike Figure 4. Reset Timing http://onsemi.com 5 Overload at Output NCV4275 MARKING DIAGRAMS DPAK DT SUFFIX CASE TBD D2PAK DP SUFFIX CASE 936A XXXXXXX AWLYYWW XXXXXXX AWLYYWW 1 TO-220 TQ SUFFIX CASE 314D TO-220 TQVA SUFFIX CASE 314N XX XXXXXXXXX AWLYWW XX XXXXXXXXX AWLYWW 1 1 XXX... A WL, L YY, Y WW, W = Specific Device Code = Assembly Location = Wafer Lot = Year = Work Week PACKAGE DIMENSIONS DPAK, 5-PIN DT SUFFIX CASE TBD ISSUE TBD http://onsemi.com 6 1 NCV4275 PACKAGE DIMENSIONS D 2PAK, 5-Pin DP SUFFIX CASE 936A-02 ISSUE B -TOPTIONAL CHAMFER A TERMINAL 6 E U S K B NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. TAB CONTOUR OPTIONAL WITHIN DIMENSIONS A AND K. 4. DIMENSIONS U AND V ESTABLISH A MINIMUM MOUNTING SURFACE FOR TERMINAL 6. 5. DIMENSIONS A AND B DO NOT INCLUDE MOLD FLASH OR GATE PROTRUSIONS. MOLD FLASH AND GATE PROTRUSIONS NOT TO EXCEED 0.025 (0.635) MAXIMUM. V H 1 2 3 4 5 M D 0.010 (0.254) M L P N T G DIM A B C D E G H K L M N P R S U V R C INCHES MIN MAX 0.386 0.403 0.356 0.368 0.170 0.180 0.026 0.036 0.045 0.055 0.067 BSC 0.539 0.579 0.050 REF 0.000 0.010 0.088 0.102 0.018 0.026 0.058 0.078 5 REF 0.116 REF 0.200 MIN 0.250 MIN MILLIMETERS MIN MAX 9.804 10.236 9.042 9.347 4.318 4.572 0.660 0.914 1.143 1.397 1.702 BSC 13.691 14.707 1.270 REF 0.000 0.254 2.235 2.591 0.457 0.660 1.473 1.981 5 REF 2.946 REF 5.080 MIN 6.350 MIN TO-220 FIVE LEAD T SUFFIX CASE 314D-04 ISSUE E -T-Q- SEATING PLANE C B E A U L J H G D DIM A B C D E G H J K L Q U 1234 5 K 5 PL 0.356 (0.014) M T Q NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. DIMENSION D DOES NOT INCLUDE INTERCONNECT BAR (DAMBAR) PROTRUSION. DIMENSION D INCLUDING PROTRUSION SHALL NOT EXCEED 10.92 (0.043) MAXIMUM. M http://onsemi.com 7 INCHES MIN MAX 0.572 0.613 0.390 0.415 0.170 0.180 0.025 0.038 0.048 0.055 0.067 BSC 0.087 0.112 0.015 0.025 0.990 1.045 0.320 0.365 0.140 0.153 0.105 0.117 MILLIMETERS MIN MAX 14.529 15.570 9.906 10.541 4.318 4.572 0.635 0.965 1.219 1.397 1.702 BSC 2.210 2.845 0.381 0.635 25.146 26.543 8.128 9.271 3.556 3.886 2.667 2.972 NCV4275 PACKAGE DIMENSIONS TO-220 FIVE LEAD TFVA SUFFIX CASE 314N-01 ISSUE O -TC B H -Q- SEATING PLANE E N W A U L 1 2 3 4 F K 5 M G D J S 5 PL 0.356 (0.014) M T Q M R NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. DIMENSION D DOES NOT INCLUDE INTERCONNECT BAR (DAMBAR) PROTRUSION. DIMENSION D INCLUDING PROTRUSION SHALL NOT EXCEED 10.92 (0.043) MAXIMUM. 4. LEADS MAINTAIN A RIGHT ANGLE WITH RESPECT TO THE PACKAGE BODY TO WITHIN 0.015 ". DIM A B C D E F G H J K L M N Q R S U W INCHES MIN MAX 0.604 0.614 0.395 0.405 0.175 0.185 0.027 0.037 0.100 0.110 0.712 0.727 0.067 BSC 0.020 0.030 0.014 0.022 0.889 0.904 0.324 0.339 0.115 0.130 0.115 0.125 0.120 0.130 0.292 0.342 0.133 0.183 0.480 0.495 5° MILLIMETERS MIN MAX 15.34 15.60 10.03 10.29 4.44 4.70 0.69 0.94 2.54 2.79 18.08 18.47 1.70 BSC 0.51 0.76 0.36 0.56 22.58 22.96 8.23 8.61 2.92 3.30 2.92 3.17 3.05 3.30 7.42 8.69 3.38 4.65 12.19 12.57 5° ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. 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