NTR3A30PZ Power MOSFET −20 V, −2.9 A, Single P−Channel 2.4 x 2.9 x 1.0 mm SOT−23 Package Features • Low RDS(on) Solution in 2.4 mm x 2.9 mm Package • ESD Diode−Protected Gate • These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS Compliant http://onsemi.com V(BR)DSS RDS(on) Max Applications 38 mW @ −4.5 V • High Side Load Switch • Battery Switch • Optimized for Power Management Applications for Portable −20 V 73 mW @ −1.8 V MAXIMUM RATINGS (TJ = 25°C unless otherwise stated) Drain−to−Source Voltage Gate−to−Source Voltage Drain Current (Note 1) Drain Current (Note 1) Power Dissipation (Note 1) P−Channel MOSFET Symbol Value Unit VDSS −20 V VGS ±8 V ID −2.9 A Steady State TA = 25°C TA = 85°C −2.1 t≤5s TA = 25°C −4.7 Steady State TA = 25°C PD t≤5s Pulsed Drain Current A Operating Junction and Storage Temperature TJ, TSTG −55 to 150 °C ESD HBM, JESD22−A114 VESD 2000 V Source Current (Body Diode) (Note 2) IS −0.48 A Lead Temperature for Soldering Purposes (1/8 in from case for 10 s) TL 260 °C Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. THERMAL RESISTANCE RATINGS Parameter Symbol Max Unit Junction−to−Ambient – Steady State (Note 1) RqJA 260 °C/W Junction−to−Ambient – t ≤ 5 s (Note 1) RqJA 100 S 2 MARKING DIAGRAM & PIN ASSIGNMENT Drain 3 SOT−23 CASE 318 STYLE 21 TRH M G G 1 Gate 2 Source TRH = Specific Device Code M = Date Code* G = Pb−Free Package (Note: Microdot may be in either location) *Date Code orientation may vary depending upon manufacturing location. ORDERING INFORMATION Device 1. Surface−mounted on FR4 board using 1 in sq. pad size (Cu area = 1.127 in sq. [1 oz] including traces). 2. Pulse Test: pulse width ≤ 300 ms, duty cycle ≤ 2%. 3 1 1.25 −8.8 D G W 0.48 IDM tp = 10 ms −2.9 A 50 mW @ −2.5 V Products, such as Smart Phones, Media Tablets, PMP, DSC, GPS, and Others Parameter ID MAX NTR3A30PZT1G Package Shipping† SOT−23 (Pb−Free) 3000 / Tape & Reel †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specification Brochure, BRD8011/D. © Semiconductor Components Industries, LLC, 2013 April, 2013 − Rev. 0 1 Publication Order Number: NTR3A30PZ/D NTR3A30PZ ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise specified) Parameter Symbol Test Condition Min Drain−to−Source Breakdown Voltage V(BR)DSS VGS = 0 V, ID = 250 mA −20 Drain−to−Source Breakdown Voltage Temperature Coefficient V(BR)DSS/TJ Typ Max Unit OFF CHARACTERISTICS 10.5 ID = −250 mA, ref to 25°C Zero Gate Voltage Drain Current IDSS VGS = 0 V, VDS = −20 V Gate−to−Source Leakage Current IGSS VDS = 0 V, VGS = ±5 V VGS(TH) VGS = VDS, ID = −250 mA V TJ = 25°C mV/°C −1 mA ±10 mA −1.0 V ON CHARACTERISTICS (Note 3) Gate Threshold Voltage Negative Threshold Temperature Coefficient VGS(TH)/TJ Drain−to−Source On Resistance RDS(on) Forward Transconductance gFS −0.4 −0.65 10.5 mV/°C VGS = −4.5 V ID = −3 A 31 38 VGS = −2.5 V ID = −2.5 A 36 50 VGS = −1.8 V ID = −1.5 A 51 73 VDS = −5 V, ID = −3 A mW 30 S 1651 pF CHARGES AND CAPACITANCES Input Capacitance Ciss Output Capacitance Coss Reverse Transfer Capacitance Crss 129 Total Gate Charge QG(TOT) 17.6 Threshold Gate Charge QG(TH) Gate−to−Source Charge QGS Gate−to−Drain Charge QGD 4.9 td(on) 100 VGS = 0 V, f = 1.0 MHz, VDS = −15 V VGS = −4.5 V, VDS = −15 V, ID = −3 A 148 nC 0.7 2.4 SWITCHING CHARACTERISTICS (Note 4) Turn−On Delay Time Rise Time Turn−Off Delay Time Fall Time tr td(off) VGS = −4.5 V, VDS = −15 V, ID = −3 A, RG = 6.0 W tf ns 208 1043 552 DRAIN−SOURCE DIODE CHARACTERISTICS Forward Diode Voltage VSD VGS = 0 V, IS = −0.4 A 3. Pulse Test: pulse width ≤ 300 ms, duty cycle ≤ 2%. 4. Switching characteristics are independent of operating junction temperatures. http://onsemi.com 2 TJ = 25°C 0.65 TJ = 125°C 0.47 1.0 V NTR3A30PZ TYPICAL CHARACTERISTICS 20 −6 V 18 20 −2.5 V −ID, DRAIN CURRENT (A) −ID, DRAIN CURRENT (A) 14 12 −1.6 V 10 8 6 VGS = −1.4 V 4 0.5 1.0 1.5 2.0 2.5 3.5 3.0 4.0 4.5 12 10 8 6 TJ = −55°C 0.5 1.0 1.5 2.0 2.5 Figure 2. Transfer Characteristics TJ = 25°C ID = −3.0 A 0.09 0.08 0.07 0.06 0.05 0.04 1.5 2.0 2.5 3.0 3.5 4.0 −VGS, GATE VOLTAGE (V) 4.5 0.166 0.156 0.146 0.136 0.126 0.116 0.106 0.096 0.086 0.076 0.066 0.056 0.046 0.036 0.026 TJ = 25°C VGS = −1.8 V VGS = −4.5 V VGS = −2.5 V 1 2 4 3 5 6 −ID, DRAIN CURRENT (A) Figure 3. On−Resistance vs. Gate−to−Source Voltage Figure 4. On−Resistance vs. Drain Current and Gate Voltage 100,000 1.4 TJ = 150°C VGS = −4.5 V ID = −3.0 A −IDSS, LEAKAGE (nA) RDS(on), NORMALIZED DRAIN−TO− SOURCE RESISTANCE TJ = 125°C 4 Figure 1. On−Region Characteristics 0.10 1.3 TJ = 25°C −VGS, GATE−TO−SOURCE VOLTAGE (V) 0.11 1.0 14 −VDS, DRAIN−TO−SOURCE VOLTAGE (V) 0.12 0.03 0.02 16 2 0 RDS(on), DRAIN−TO−SOURCE RESISTANCE (W) 0 VDS ≤ −5 V 18 −1.8 V 16 2 0 RDS(on), DRAIN−TO−SOURCE RESISTANCE (W) −3 V 1.2 TJ = 125°C 10,000 1.1 1.0 0.9 1000 0.8 0.7 −50 −25 0 25 50 75 100 125 150 100 2 4 6 8 10 12 14 16 18 TJ, JUNCTION TEMPERATURE (°C) −VDS, DRAIN−TO−SOURCE VOLTAGE (V) Figure 5. On−Resistance Variation with Temperature Figure 6. Drain−to−Source Leakage Current vs. Voltage http://onsemi.com 3 20 NTR3A30PZ 2000 1800 CISS 1600 1400 1200 VGS = 0 V TJ = 25°C f = 1 MHz 1000 800 600 400 COSS 200 C RSS 0 0 2 4 6 8 10 12 14 18 16 20 5 15 4 VDS QGS 2 QGD 0 0 2 4 6 VDS = −15 V TJ = 25°C ID = −3.0 A 1 6 8 10 12 14 16 3 0 18 QG, TOTAL GATE CHARGE (nC) Figure 8. Gate−to−Source and Drain−to−Source Voltage vs. Total Charge 10 −IS, SOURCE CURRENT (A) 10,000 t, TIME (ns) 12 9 Figure 7. Capacitance Variation td(off) 1000 tf tr td(on) 100 VGS = −4.5 V VDD = −15 V ID = −3.0 A 1 10 1 TJ = 25°C TJ = 125°C 0.1 100 TJ = −55°C 0.2 0.4 0.6 0.8 1.0 1.2 RG, GATE RESISTANCE (W) −VSD, SOURCE−TO−DRAIN VOLTAGE (V) Figure 9. Resistive Switching Time Variation vs. Gate Resistance Figure 10. Diode Forward Voltage vs. Current 0.9 100 0.8 −ID, DRAIN CURRENT (A) ID = −250 mA 0.7 −VGS(th) (V) VGS 3 −VDS, DRAIN−TO−SOURCE VOLTAGE (V) 10 18 QT −VDS, DRAIN−TO−SOURCE VOLTAGE (V) C, CAPACITANCE (pF) 2400 2200 −VGS, GATE−TO−SOURCE VOLTAGE (V) TYPICAL CHARACTERISTICS 0.6 0.5 0.4 0.3 0.2 −50 −25 0 25 50 75 100 125 10 100 ms 1 ms 1 10 ms 0.1 0.01 150 0 ≤ VGS ≤ −8 V Single Pulse TC = 25°C RDS(on) Limit Thermal Limit Package Limit 0.1 1 DC 10 TJ, JUNCTION TEMPERATURE (°C) −VDS, DRAIN−TO−SOURCE VOLTAGE (V) Figure 11. Threshold Voltage Figure 12. Maximum Rated Forward Biased Safe Operating Area http://onsemi.com 4 100 NTR3A30PZ TYPICAL CHARACTERISTICS 1000 50% Duty Cycle R(t) (°C/W) 100 10 20% 10% 5% 2% 1% 1 0.1 Single Pulse 0.000001 0.00001 0.0001 0.001 0.01 0.1 PULSE TIME (sec) Figure 13. FET Thermal Response http://onsemi.com 5 1 10 100 1000 NTR3A30PZ PACKAGE DIMENSIONS SOT−23 (TO−236) CASE 318−08 ISSUE AP NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH THICKNESS. MINIMUM LEAD THICKNESS IS THE MINIMUM THICKNESS OF BASE MATERIAL. 4. DIMENSIONS D AND E DO NOT INCLUDE MOLD FLASH, PROTRUSIONS, OR GATE BURRS. D SEE VIEW C 3 HE E DIM A A1 b c D E e L L1 HE q c 1 2 e b 0.25 q A L A1 MIN 0.89 0.01 0.37 0.09 2.80 1.20 1.78 0.10 0.35 2.10 0° MILLIMETERS NOM MAX 1.00 1.11 0.06 0.10 0.44 0.50 0.13 0.18 2.90 3.04 1.30 1.40 1.90 2.04 0.20 0.30 0.54 0.69 2.40 2.64 −−− 10 ° MIN 0.035 0.001 0.015 0.003 0.110 0.047 0.070 0.004 0.014 0.083 0° INCHES NOM 0.040 0.002 0.018 0.005 0.114 0.051 0.075 0.008 0.021 0.094 −−− MAX 0.044 0.004 0.020 0.007 0.120 0.055 0.081 0.012 0.029 0.104 10° STYLE 21: PIN 1. GATE 2. SOURCE 3. DRAIN L1 VIEW C SOLDERING FOOTPRINT* 0.95 0.037 0.95 0.037 2.0 0.079 0.9 0.035 SCALE 10:1 0.8 0.031 mm Ǔ ǒinches *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. 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