P1707A October 2003 rev 1.0 Notebook LCD Panel EMI Reduction IC Features down stream clock and data dependent signals. The FCC approved method of EMI attenuation. P1707A allows significant system cost savings by reducing Generates a low EMI spread spectrum clock of the the number of circuit board layers ferrite beads, shielding input frequency. and other passive components that are traditionally Optimized for frequency range from 60 to 175MHz. required to pass EMI regulations. Internal loop filter minimizes external components and board space. The P1707A modulates the output of a single PLL in order Four selectable spread ranges. to “spread” the bandwidth of a synthesized clock, and more Low inherent cycle-to-cycle jitter. importantly, 3.3V operating voltage range. harmonics. This results in significantly lower system EMI TTL or CMOS compatible inputs and outputs. compared to the typical narrow band signal produced by Ultra-low power CMOS design. oscillators and most frequency generators. Lowering EMI 14.85 mA @3.3V, 140MHz by increasing a signal’s bandwidth is called ‘spread 16.69mA @3.3V, 162MHz spectrum clock generation’. decreases the peak amplitudes of its 17.78 mA @3.3V, 175MHz Supports notebook VGA and other LCD timing controller applications. Pinout compatible to ICS MK1707 and Cypress CY25561/CY25560. SSON/SBM pin for Spread Spectrum On/Off and Standby Mode controls. The P1707A uses the most efficient and optimized modulation profile approved by the FCC and is implemented in a proprietary all digital method. Applications Available in 8-pin SOIC and TSSOP. The P1707A is targeted towards notebook LCD displays, Product Description The P1707A is a versatile spread spectrum frequency modulator designed specifically for input clock frequencies. and other displays using an LVDS interface, PC peripheral devices, and embedded systems. The P1707A reduces electromagnetic interference (EMI) at the clock source, allowing system wide reduction of EMI of SR0 Block Diagram SR1 SSON VDD PLL Modulation CLKIN Frequency Divider Feedback Divider Phase Detector Loop Filter VCO Output Divider ModOUT VSS Alliance Semiconductor 2575, Augustine Drive • Santa Clara, CA • Tel: 408.855.4900 • Fax: 408.855.4999 • www.alsc.com Notice: The information in this document is subject to change without notice. P1707A October 2003 rev 1.0 Pin Configuration CLKIN 1 8 NC VDD 2 7 SR0 3 6 SR1 4 5 SSON/SBM P1707A VSS ModOUT Pin Description Pin# Pin Name Type Description 1 CLKIN I Connect to externally generated clock signal. To put the part into standby mode, disable the input clock signal to this pin and pull SSON/SBM (pin 5) low. Refer Standby Mode Selection Table. 2 VDD P Connect to +3.3V. 3 VSS P Ground Connection. Connect to system ground. 4 ModOUT O Spread spectrum clock output. 5 SSON/SBM I 6 SR1 I 7 SR0 I 8 NC - Spread Spectrum On/Off and standby mode control. Refer Standby Mode Selection Table. This pin has an internal pull-up resistor. Digital logic input used to select Spreading Range. Refer Spread Spectrum Selection Table. This pin has an internal pull-up resistor. Digital logic input used to select Spreading Range. Refer Spread Spectrum Selection Table. This pin has an internal pull-up resistor. No connect. Notebook LCD Panel EMI Reduction IC Notice: The information in this document is subject to change without notice. 2 of 10 P1707A October 2003 rev 1.0 Standby Mode Selection CLKIN SSON/SBM Disabled 0 Spread Spectrum N/A Disabled 1 Enabled Enabled ModOUT PLL Mode Disabled Disabled Standby N/A Disabled Free Running Free Running 0 Off Reference Disabled Buffer out 1 On Normal Normal Normal Spread Range Selection SR1 SR0 Spreading Range Modulation Rate 0 0 ± 1.50% (FIN/80) * 34.72 KHz 0 1 ± 2.50% (FIN/80) * 34.72 KHz 1 0 ± 0.50% (FIN/80) * 34.72 KHz 1 1 ± 1.00% (FIN/80) * 34.72 KHz Notebook LCD Panel EMI Reduction IC Notice: The information in this document is subject to change without notice. 3 of 10 P1707A October 2003 rev 1.0 Schematic for Notebook VGA Application 60MHz to 175MHz pixel clock input from VGA chip 1 P1707A NC CLKIN 8 Pin 8 can be tied either high or low, or it can be left unconnected. 2 VDD SR0 7 3 VSS SR1 6 Tie SR0 and SR1 high/low according to spread range desired. External resistors are not needed to pull these pins high. 4 ModOUT SSON 5 0.1µF FB VDD Pin 5 SSON should be left unconnected to turn on spread spectrum. Pull this pin low to turn spread spectrum OFF and enable stand-by mode. Note: To set the P1707A to standby mode, disable the input clock (pin 1 CLKIN) and pull SSON (pin 5) low. Refer Standby Mode Selection Table. Notebook LCD Panel EMI Reduction IC Notice: The information in this document is subject to change without notice. 4 of 10 P1707A October 2003 rev 1.0 Absolute Maximum Ratings Symbol VDD, VIN Parameter Voltage on any pin with respect to GND Rating Unit -0.5 to + 7.0 V TSTG Storage temperature -65 to +125 °C TA Operating temperature 0 to 70 °C Note: These are stress ratings only and functional operation is not implied. Exposure to absolute maximum ratings for extended periods may affect device reliability. DC Electrical Characteristics Symbol Parameter Min Typ Max Unit VIL Input low voltage GND – 0.3 - 0.8 V VIH Input high voltage 2.0 - VDD + 0.3 V IIL Input low current (pull-up resistors on inputs SR0, SR1 and SSON/SBM) - - -35 µA IIH Input high current - - 35 µA IXOL XOUT output low current @ 0.4V, VDD = 3.3V - 3 - mA IXOH XOUT output high current @ 2.5V, VDD = 3.3V - 3 - mA VOL Output low voltage VDD = 3.3V, IOL = 20mA - - 0.4 V VOH Output high voltage VDD = 3.3V, IOH = 20mA 2.5 - - V ICC Dynamic supply current normal mode 3.3V and 10pF loading 8.46 12 17.78 mA IDD Static supply current standby mode - 0.6 - mA VDD Operating voltage 2.7 3.3 3.7 V tON Power up time (first locked clock cycle after power up) - 0.18 - mS ZOUT Clock output impedance - 50 - Ω Notebook LCD Panel EMI Reduction IC Notice: The information in this document is subject to change without notice. 5 of 10 P1707A October 2003 rev 1.0 AC Electrical Characteristics Symbol Parameter Min Typ Max Unit fIN Input frequency 60 - 175 MHz fOUT Output frequency Output rise time Measured at 0.8V to 2.0V Output fall time Measured at 0.8V to 2.0V Jitter (cycle to cycle) 60 - 175 MHz 0.7 0.9 1.1 ns 0.6 0.8 1.0 ns - - 360 ps 45 50 55 % tLH* tHL* tJC tD Output duty cycle *tLH and tHL are measured into a capacitive load of 15pF Notebook LCD Panel EMI Reduction IC Notice: The information in this document is subject to change without notice. 6 of 10 P1707A October 2003 rev 1.0 Package Information Mechanical Package Outline 8-Pin SOIC H E D A2 A C θ e A1 B Symbol Dimensions in inches D L Dimensions in millimeters Min Max Min Max A 0.057 0.071 1.45 1.80 A1 0.004 0.010 0.10 0.25 A2 0.053 0.069 1.35 1.75 B 0.012 0.020 0.31 0.51 C 0.004 0.01 0.10 0.25 D 0.186 0.202 4.72 5.12 E 0.148 0.164 3.75 4.15 e 0.050 BSC 1.27 BSC H 0.224 0.248 5.70 6.30 L 0.012 0.028 0.30 0.70 θ 0° 8° 0° 8° Note: Controlling dimensions are millimeters SOIC – 0.074 grams unit weight Notebook LCD Panel EMI Reduction IC Notice: The information in this document is subject to change without notice. 7 of 10 P1707A October 2003 rev 1.0 Mechanical Package Outline 8-Pin TSSOP H E D A2 A C θ e A1 L B Dimensions in inches Symbol Min Max A Dimensions in millimeters Min Max 0.047 1.10 A1 0.002 0.006 0.05 0.15 A2 0.031 0.041 0.80 1.05 B 0.007 0.012 0.19 0.30 C 0.004 0.008 0.09 0.20 D 0.114 0.122 2.90 3.10 E 0.169 0.177 4.30 4.50 e 0.026 BSC 0.65 BSC H 0.244 0.260 6.20 6.60 L 0.018 0.030 0.45 0.75 θ 0° 8° 0° 8° Note: Controlling dimensions are millimeters TSSOP – 0.034 grams unit weight Notebook LCD Panel EMI Reduction IC Notice: The information in this document is subject to change without notice. 8 of 10 P1707A October 2003 rev 1.0 Ordering Codes Part Number Marking Package Type P1707A-08ST P1707A 8-pin SOIC, tube P1707A-08SR P1707A 8-pin SOIC, tape & reel P1707A-08TT P1707A 8-pin TSSOP, tube P1707A-08TR P1707A 8-pin TSSOP, tape and reel Temperature (°C) Qty per reel 0 to 70 2500 0 to 70 0 to 70 2500 0 to 70 Device Ordering Information P 1 7 0 7 A - 0 8 X X OR - SOT23/T/R TT – TSSOP, TUBE TR - TSSOP, T/R VT – TVSOP, TUBE VR – TVSOP, T/R ST – SOIC, TUBE SR - SOIC, T/R QR – QFN, T/R QT - QFN, TUBE BT - BGA, TUBE BR – BGA, T/R Pin Count DEVICE NUMBER Flow: P = Commercial Temperature Range (0°C to 70°C) I = Industrial Temperature Range (-25°C to 85°C) Notebook LCD Panel EMI Reduction IC Notice: The information in this document is subject to change without notice. 9 of 10 P1707A October 2003 rev 1.0 Alliance Semiconductor Corporation 2595, Augustine Drive, Santa Clara, CA 95054 Tel# 408-855-4900 Fax: 408-855-4999 www.alsc.com Copyright © Alliance Semiconductor All Rights Reserved Preliminary Information Part Number: P1707A Document Version: v1.0 © Copyright 2003 Alliance Semiconductor Corporation. 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Alliance does not authorize its products for use as critical components in life-supporting systems where a malfunction or failure may reasonably be expected to result in significant injury to the user, and the inclusion of Alliance products in such life-supporting systems implies that the manufacturer assumes all risk of such use and agrees to indemnify Alliance against all claims arising from such use. Notebook LCD Panel EMI Reduction IC Notice: The information in this document is subject to change without notice. 10 of 10