PI74LVTCH244 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 3.3V 8-Bit Buffers/Line Drivers with 3-State Outputs Product Features Product Description • Advanced low power CMOS design for 2.7V to 3.6V Vcc operation Pericom Semiconductor’s PI74LVTC series of logic circuits are produced using the Company’s advanced CMOS technology, achieving industry leading speed. • Supports 5V input/output tolerance in mixed signal mode operation The PI74LVTCH244 is a non-inverting 8-bit buffer and line driver designed for low-voltage 2.7V to 3.6V VCC operation, with the capability of interfacing to the 5V system environment. With its balanced drive characteristics, this high-speed, low power device provides low ground bounce and transmission line impedance matching. This makes it ideal for driving on board buses and transmission lines. The device can be used as two 4-bit buffers with separate output enable (OE) inputs. • Function compatible with LVT family of products • Balanced ±24mA output drive • Typical VOLP (Output Ground Bounce) <0.8V at VCC=3.3V, TA=25°C • Ioff and Power Up/Down 3-State support live insertion • Latch-up performance exceeds 200mA Per JESD78 • Bus Hold on data inputs eliminates the need for external pull-up/down resistors The PI74LVTCH244 has "Bus Hold" which retains the data input's last valid logic state whenever the data input goes to high-impedance, preventing "floating" inputs and eliminating the need for pulup/down resistors. • ESD protection exceeds JESD 22 - 2000V Human-Body Model (A114-B) - 200V Machine Model (A115-A) • Packages(Pb-free Available): - 20-pin 209-mil wide plastic SSOP (H20) - 20-pin 173-mil wide plastic TSSOP (L20) - 20-pin 300-mil wide plastic SOIC (S20) When Vcc is between 0 to 1.5V during power up or power down, the outputs of the device are in the high-impedance state. To ensure the high-impedance state above 1.5V, OE should be tied to Vcc through a pullup resistor; the minimum value of the resistor is determined by the current sinking capability of the driver. The device fully supports live-insertion with its Ioff and power-up/ down 3-state. The Ioff circuitry disables the outputs when the power is off, preventing the backflow of damaging current through the device. Power-up/down 3-state places the outputs in the high-impedance state during power up or power down, preventing driver conflict. Logic Block Diagram 1OE 1A1 1A2 1A3 1A4 1 2OE 2 18 4 16 6 14 8 12 1Y1 2A1 1Y2 2A2 1Y3 2A3 1Y4 2A4 1 19 11 9 13 7 15 5 17 3 2Y1 2Y2 2Y3 2Y4 PS8692 07/01/03 PI74LVTCH244 8-Bit Buffers/Line Drivers with 3-State Outputs 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 Maximum Ratings (Above which the useful life may be impaired. For user guidelines, not tested.) Product Pin Description Supply voltage range, VCC .............................. –0.5V to +6.5V Input voltage range, VI(1) ................................. –0.5V to +6.5V Voltage range applied to any output in the high-impedance or power-off state, VO(1) ........ –0.5V to +6.5V Voltage range applied to any output in the active state, VO(1), (2) .................................. –0.5V to VCC +0.5V Input clamp current, IIK (VI <0) ..................................... –50mA Output clamp current, IOK (VO <0) ............................... –50mA Continous Output Current IO ....................................... ±50mA Continous Current through each VCC or GND pin ............... ±100mA Package thermal impedance, θJA(2): package H ............ 81°C/W package L ............ 84°C/W package S ............ 84°C/W Storage Temperature range, Tstg ..................... –65°C to 150°C Pin Name De s cription xOE 3- State Output Enable Inputs (Active LOW) xAx Inputs xYx 3- State Outputs GND Ground VC C Power Product Pin Configuration Notes: Stresses greater than those listed under MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. 1. Input negative-voltage and output voltage ratings may be exceeded if the input and output clamp current ratings are observed. 2. This value is limited to 6.5V maximum. 3. The package thermal impedance is calculated in accordance with JESD 51. 1OE 1 20 VCC 1A1 2 19 2OE 2Y4 3 18 1Y1 1A2 4 17 2A4 2Y3 5 16 1Y2 1A3 6 15 2A3 2Y2 7 14 1Y3 1A4 8 13 2A2 2Y1 9 12 1Y4 GND 10 11 2A1 20-Pin H, L, S Truth Table(4) Inputs Outputs xOE xAx xYx L H H L L L H X Z Notes: 4. H = High Signal Level L = Low Signal Level X = Don’t Care or Irrelevant Z = High Impedance 2 PS8692 07/01/03 PI74LVTCH244 3.3V 8-Bit Buffers/Line Drivers with 3-State Outputs 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 Recommended Operating Conditions(5) VCC Supply Voltage M in. M a x. Operating 2.7 3.6 2.0 VIH High- level Input Voltage VCC = 2.7V to 3.6V VIL Low- level Input Voltage VCC = 2.7V to 3.6V VI Input Voltage VO Output Voltage IOH High- level output current IOL Low- level output current 0.8 0 5.5 High or Low State 0 VCC 3- State 0 5.5 VCC = 2.7V –12 VCC = 3.0V to 3.6V – 24 VCC = 2.7V 12 VCC = 3.0V to 3.6V 24 ∆t/∆V Input transition rise or fall rate 10 ∆t/∆VCC Power- up ramp rate 150 TA – 40 Operating free- air temperature Units V mA ns/V µs/V 85 °C Notes: 5.All unused inputs must be held at VCC or GND to ensure proper device operation. 3 PS8692 07/01/03 PI74LVTCH244 8-Bit Buffers/Line Drivers with 3-State Outputs 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 DC Electrical Characteristics (Over the Operating Range, TA = –40°C +85°C) Parame te rs VIK VOH De s cription Clamp Diode Voltage Output High Voltage Te s t Conditions VCC = 2.7V II = –18mA VCC = 2.7V to 3.6V IOH = –100µA VCC –0.2V VCC = 2.7V IOH = –12mA 2.2 IOH = –12mA 2.4 IOH = –24mA 2.2 VCC = 3V VOL Output Low Voltage II Input Leakage Current Data Inputs M a x. V IOL = 100µA 0 .2 VCC = 2.7V IOL = 12mA 0.4 IOL = 12mA 0.4 IOL = 24mA 0.55 VCC = 0V to 3.6V Units –1.2V VCC = 2.7V to 3.6V VCC = 3V Control Inputs M in. VI = 0V to5.5V ±5 VI = 5.5V VCC = 3.6V VI = VCC ±5 VI = GND II(HOLD) Data Input Hold Current VCC = 3V VCC = 3.6V(6) VI = 0.8V 75 VI = 2V –7 5 VI = 0 to 3.6V ± 500 IOFF Power Off Output Leakage Current VCC = 0V VI or VO = 0V to 5.5V ±5 IOZ 3- State Output Leakage Current VCC = 2.7V to 3.6V VO = 0V to 5.5V ±5 IOZPU Power- Up 3- State Current VCC = 0V to 1.5V VO = 0.5V to 5.5V, OE = don't care ±5 IOZPD Power- Down 3- State Current VCC = 1.5V to 0V VO = 0.5V to 5.5V, OE = don't care ±5 Quiescent Power Supply Current VCC = 2.7V to 3.6V Increase in ICC VCC = 3V to 3.6V ICC ∆ICC VI = VCC or GND 3.6V ≤ VI ≤ 5.5V IO = 0 One input at VCC - 0.6V(7) Other inputs at VCC or GND µA 100 200 Notes: 6. This is the maximum bus-hold dynamic current. It is the minimum overdrive current required to switch the input from one state to another. 7. This is the increase in supply current for each input that is at the specified TTL voltage level rather than VCC or GND. 4 PS8692 07/01/03 PI74LVTCH244 3.3V 8-Bit Buffers/Line Drivers with 3-State Outputs 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 Capacitance Parame te rs De s cription Typ.(8) Te s t Conditions CIN Input Capacitance VCC = 3.3V, VI = VCC or GND 3.0 COUT Output Capacitance VCC = 3.3V, VO = VCC or GND 6.2 Power Dissipation Capacitance (9) VCC = 3.3V, VI = 0V or VCC, f =10 MHz 28 C PD Units pF Notes: 8. All typical values are measured at VCC = 3.3V, TA = 25°C. 9. CPD is defined as the value of the internal equivalent capacitance withic is derived from dynamic operating current consumption (ICCD) at no output loading and operating at 50% duty cycle, CPD is related to ICCD dynamic operating current by the expression: ICCD = (CPD)(VCC)(fIN)+(ICCstatic). Switching Characteristics Over Operating Range Parame te rs tPLH tPHL tPZH tPZL tPHZ tPLZ tSK(O) De s cription From (Input) To (Output) Propagation Delay A Y Output Enable Time OE Y Output Disable Time OE VCC = 3.3V ±0.3V VCC = 2.7V CL = 50pF, RL = 500Ohm CL = 50pF, RL = 500Ohm Y Output to Output Skew(10) M in. M a x. M in. M a x. 1.0 5.2 1. 0 5.8 1.0 5.2 1. 0 5.8 1.0 5.8 1.0 6.8 1.0 5.8 1. 0 6.8 1.0 4.6 1. 0 4.8 1.0 4.6 1. 0 4.8 Units ns 0.5 Notes: 10.Skew between any two outputs, switching in the same direction. 5 PS8692 07/01/03 PI74LVTCH244 8-Bit Buffers/Line Drivers with 3-State Outputs 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 PARAMETER MEASUREMENT INFORMATION VCC = 2.7V and 3.3V ±0.3V 6V S1 500ohm From Output Under Test CL = 50pF Open GND 500ohm (See Note A) Te s t S1 tPLH/tPHL tPLZ/tPZL tPHZ/tPZH Open 6V GND Load Circuit tW 2.7V 1.5V Input 1.5V 0V Voltage Waveforms Pulse Duration Output Control (Low Level Enabling) 2.7V Input 1.5V 0V tPHL VOH Output 1.5V 1.5V Output Waveform 2 S1 at GND (see Note B) 1.5V VOL Voltage Waveforms Propagation Delay Times 1.5V tPZL Output Waveform 1 S1 at 6V (see Note B) t PZH 1.5V tPLH 2.7V 0V tPLZ 3V 1.5V VOL +0.3V VOL tPHZ 1.5V VOH –0.3V VOH 0V Voltage Waveforms Enable and Disable Times Figure 1. Load Circuit and Voltage Waveforms Notes: A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. C. All input impulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50ohm, tR ≤ 2.5ns, tF ≤ 2.5ns. D. The outputs are measured one at a time with one transition per measurement. 6 PS8692 07/01/03 PI74LVTCH244 3.3V 8-Bit Buffers/Line Drivers with 3-State Outputs 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 Packaging Mechanical: 20-pin SSOP (H) 20 .197 .220 5.00 5.60 1 .004 .009 .272 .295 6.90 7.50 0.55 .022 0.95 .037 .078 2.00 Max .291 .322 7.40 8.20 SEATING PLANE .002 Min 0.050 .0098 Max. 0.25 .0256 BSC 0.65 0.09 0.25 X.XX DENOTES DIMENSIONS X.XX IN MILLIMETERS Packaging Mechanical: 20-pin TSSOP (L) 20 .169 .177 4.3 4.5 1 .252 .260 6.4 6.6 .0256 BSC 0.65 .004 0.09 .008 0.20 .047 1.20 Max .007 .012 0.19 0.30 0.45 0.75 SEATING PLANE .018 .030 .238 .269 6.1 6.7 .002 0.05 .006 0.15 X.XX X.XX 7 DENOTES CONTROLLING DIMENSIONS IN MILLIMETERS PS8692 07/01/03 PI74LVTCH244 8-Bit Buffers/Line Drivers with 3-State Outputs 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 20-pin SOIC (S) Package 20 .2914 .2992 7.40 7.60 .010 .029 0.254 x 45˚ 0.737 1 .496 12.60 .511 12.99 .020 0.508 REF .030 0.762 .013 .020 0.33 0.51 0.23 0.32 0.41 .016 1.27 .050 .0926 .1043 2.35 2.65 SEATING PLANE .050 BSC 1.27 .0091 .0125 0-8˚ .0040 .0118 .394 .419 10.00 10.65 0.10 0.30 X.XX DENOTES CONTROLLING X.XX DIMENSIONS IN MILLIMETERS Ordering Information Orde ring Data De s cription PI74LVTCH244H 20- pin, 209- mil wide plastic SSOP PI74LVTCH244L 20- pin, 173- mil wide plastic TSSOP PI74LVTCH244S 20- pin, 300- mil wide plastic SOIC Notes: 1. Thermal characteristics can be found on the company web site at http://www.pericom.com/packaging/mechanicals.php Pericom Semiconductor Corporation 2380 Bering Drive • San Jose, CA 95131 • 1-800-435-2336 • Fax (408) 435-1100 • http://www.pericom.com 8 PS8692 07/01/03