SD56150 RF POWER TRANSISTORS The LdmoST FAMILY PRELIMINARY DATA N-CHANNEL ENHANCEMENT-MODE LATERAL MOSFETs • EXCELLENT THERMAL STABILITY • COMMON SOURCE CONFIGURATION, PUSHPULL • POUT = 150 W WITH 13 dB gain @ 860 MHz /32V M252 epoxy sealed • BeO FREE PACKAGE • INTERNAL INPUT MATCHING ORDER CODE SD56150 DESCRIPTION The SD56150 is a common source N-Channel enhancement-mode lateral Field-Effect RF power transistor designed for broadband commercial and industrial applications at frequencies up to 1.0 GHz. The SD56150 is designed for high gain and broadband performance operating in common source mode at 32 V. Its internal matching makes it ideal for TV broadcast applications requiring high linearity. BRANDING SD56150 PIN CONNECTION 1 2 3 5 4 1. Drain 2. Drain 3. Source 4. Gate 5. Gate ABSOLUTE MAXIMUM RATINGS (TCASE = 25 °C) Symbol Parameter Value Unit V(BR)DSS Drain-Source Voltage 65 V VGS Gate-Source Voltage ± 20 V Drain Current 17 A Power Dissipation (@ Tc = 70 °C) 236 W Max. Operating Junction Temperature 200 °C -65 to +150 °C 0.55 °C/W ID PDISS Tj TSTG Storage Temperature THERMAL DATA Rth(j-c) Junction -Case Thermal Resistance November, 27 2002 1/8 SD56150 ELECTRICAL SPECIFICATION (TCASE = 25 °C) STATIC (Per Section) Symbol Test Conditions Min. Typ. Max. Unit V(BR)DSS VGS = 0 V IDS = 10 mA IDSS VGS = 0 V VDS = 28 V 1 µA IGSS VGS = 20 V VDS = 0 V 1 µA VGS(Q) VDS = 28 V ID = 100 mA 5.0 V VDS(ON) VGS = 10 V ID = 3 A 0.8 V 4 mho 65 V 2.0 0.5 GFS VDS = 10 V ID = 3 A CISS* VGS = 0 V VDS = 28 V f = 1 MHz 255 pF COSS VGS = 0 V VDS = 28 V f = 1 MHz 50 pF CRSS VGS = 0 V VDS = 28 V f = 1 MHz 2.9 pF 2.5 * Includes Internal Input Moscap. DYNAMIC Symbol Test Conditions POUT VDD = 32 V IDQ = 500 mA GPS VDD = 32 V IDQ = 500 mA ηD VDD = 32 V Load mismatch Min. Typ. Max. 150 POUT = 150 W f = 860 MHz 13 16.5 dB IDQ = 500 mA POUT = 150 W f = 860 MHz 50 60 % VDD = 32 V IDQ = 500 mA ALL PHASE ANGLES POUT = 150 W f = 860 MHz W 10:1 IMPEDANCE DATA D ZDL Typical Input Impedance Typical Drain Load Impedance G Zin S FREQ. ZIN (Ω) ZDL(Ω) 860 MHz 4.7 - j 5.5 3.6 + j 6.5 880 MHz 4.3 - j 6.9 3.9 + j 7.4 900 MHz 4.5 - j 8.8 4.4 + j 7.8 Measured drain to drain and gate to gate respectively. 2/8 Unit f = 860 MHz VSWR SD56150 TYPICAL PERFORMANCE Capacitance vs. Drain Voltage Gate Source Voltage vs. Case Temperature 1.0 4 1000 C is s 1.0 2 Id = 6 A Id = 5 A 1.0 0 Vgs (Normalised) C (pF) 100 C os s 10 Id = 4 A Id = 3 A 0.9 8 Id = 2 A 0.9 6 C rs s Id = 1 A 0.9 4 Id = 0 .5 A Vds = 10 V f = 1 MHz 1 0.9 2 0 5 10 15 20 25 30 35 40 -2 5 0 25 50 75 1 00 T c (°C ) Vdd (V) Drain Current vs. Gate-Source Voltage 4 .5 4 3 .5 Id (A) 3 2 .5 2 1 .5 1 0 .5 Vds = 1 0 V 0 0 1 2 3 4 5 6 Vg s (V ) 3/8 SD56150 TYPICAL PERFORMANCE Output Power vs. Input Power Power Gain vs. Output Power 180 20 160 19 Id q = 2 x6 0 0 mA 18 140 Id q = 2 x2 5 0 m A 17 120 Id q = 2 x2 0 0 mA Id q = 2 x4 0 0 mA 100 Gp (dB) Pout (W) 16 80 Id q = 2 x2 5 0 mA 15 14 60 13 40 12 20 Vd d = 3 2 V f = 8 6 0 M Hz 11 Vd d = 3 2 V f = 8 6 0 M Hz 0 10 0 1 2 3 4 5 0 50 Pin (W ) 100 150 2 00 Po u t (W ) Output Power vs. Supply Voltage Efficiency vs. Output Power 80 200 70 180 Pin = 5 W 160 60 140 50 Pin = 3.2 W Pout (W) ηd (%) 120 40 Id q = 2 x2 5 0 mA 100 80 30 Pin = 1.6 W 60 20 40 10 f = 8 60 MHz Id q = 2 x 2 5 0 m A 20 Vd d = 3 2 V f = 8 6 0 MHz 0 0 0 50 100 150 200 0 10 20 Pout (W ) 30 40 Vdd (V) Efficiency vs. Supply Voltage Intermodulation Distorsion vs. Output Power 0 70 Pin = 5 W 60 -1 0 Pin = 3 . 2 W 50 -2 0 ηd (%) 40 IMD3 (dB) Pin = 1 . 6 W 30 Id q = 2 x2 5 0 m A Id q = 2 x6 0 0 m A Id q = 2 x2 0 0 m A -3 0 -4 0 20 Id q = 2 x4 0 0 m A -5 0 10 f1 = 8 5 9 .9 MHz f2 = 8 6 0 .0 MHz Vd d = 3 2 V f = 8 6 0 M Hz Id q = 2 x 2 5 0 m A -6 0 0 0 10 20 Vd d (V ) 4/8 30 40 0 50 10 0 Po u t (W ) 150 20 0 SD56150 TEST CIRCUIT SCHEMATIC NOTES: 1. GAP BETWEEN GROUND & TRANSMISSION LINE = 0.056 [1.42] +0.002 [0.05] -0.000 [0.00] TYP. 2. C3 AND C4 ADJACENT TO EACH OTHER REF. 7248365A TEST CIRCUIT COMPONENT PART LIST C1,C2, C10, C11 C3 C4, C8 C5 C6 C7 C9 C12, C15, C18, C22 C13, C16, C20, C24 C14, C17, C21, C25 C19, C23 R1, R2, R3, R4 R5, R6 L1, L2 FB1, FB2 B2, B1 PCB DESCRIPTION 51 pF ATC 100B SURFACE MOUNT CERAMIC CHIP CAPACITOR 9.1 pF ATC 100B SURFACE MOUNT CERAMIC CHIP CAPACITOR 0.6 - 4.5 pF GIGATRIM VARIABLE CAPACITOR 10 pF ATC 100B SURFACE MOUNT CERAMIC CHIP CAPACITOR 4.7 pF ATC 100A SURFACE MOUNT CERAMIC CHIP CAPACITOR 13 pF ATC 100B SURFACE MOUNT CERAMIC CHIP CAPACITOR 6.2 pF ATC 100B SURFACE MOUNT CERAMIC CHIP CAPACITOR 91 pF ATC 100B SURFACE MOUNT CERAMIC CHIP CAPACITOR 10 µF 50V ALUMINUM ELECTROLYTIC RADIAL LEAD CAPACITOR 0.1 µF 500V SURFACE MOUNT CERAMIC CHIP CAPACITOR 100 µF 63V ALUMINUM ELECTROLYTIC RADIAL LEAD CAPACITOR 200 OHM 1/4 W SURFACE MOUNT CHIP RESISTOR 1.8 OHM 1/4 W SURFACE MOUNT CHIP RESISTOR CHIP INDUCTOR 10 nH SURFACE MOUNT COIL SURFACE MOUNT EMI SHIELD BEAD BALUN, 25 OHM, SEMI-RIDGE OD 0.141 2.365 LG COAXIAL CABLE OR EQUIVALENT WOVEN GLASS REINFORCED / CERAMIC FILLED 0.030” THK εr = 3.48, 2 Oz ED CU BOTH SIDES 5/8 SD56150 TEST FIXTURE 4 inches TEST CIRCUIT PHOTOMASTER 6.4 inches 6/8 SD56150 M252 (.400 x .860 4L BAL N/HERM W/FLG) MECHANICAL DATA mm DIM. A MIN. TYP. 8.13 B Inch MAX MIN. 8.64 .320 10.80 TYP. MAX .340 .425 C 3.00 3.30 .118 .130 D 9.65 9.91 .380 .390 E 2.16 2.92 .085 .115 F 21.97 22.23 .865 .875 G 27.94 1.100 H 33.91 34.16 1.335 1.345 I 0.10 0.15 .004 .006 J 1.52 1.78 .060 .070 K 2.36 2.74 .093 .108 L 4.57 5.33 .180 .210 M 9.96 10.34 .392 .407 N 21.64 22.05 .852 .868 Controlling dimension: Inches 1022783C 7/8 SD56150 Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. 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