SM5852FS Digital Dynamic Bass Boost LSI NIPPON PRECISION CIRCUITS INC. OVERVIEW PINOUT FEATURES ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ 2-channel processing Improved DDBB mode channel separation 6 input-level dependent dynamic gain characteristics Serial input/output interface 2s complement, MSB first, 16-bit 384fs system clock 23 × 23-bit multiplier/30-bit high-precision accumulator TTL-compatible input/output 3.2 to 5.5 V operating voltage range 16-pin SOP Molybdenum-gate CMOS LRCI 1 16 DB/DS BCKI 2 15 MOD2 14 MOD1 13 OPT DI 3 CLK 4 VSS 5 SM5852FS The SM5852FS is a digital signal processor IC that performs DDBB (digital dynamic bass boost) processing for use in digital audio reproduction equipment. It is designed for use with a 44.1 kHz sampling frequency. 12 VDD RSTN 6 11 LRCO TESTN 7 10 BCKO MUTEN 8 9 DOUT PACKAGE DIMENSIONS 16-pin SOP (Unit: mm) ORDERING INFOMATION 10.16±0.3 10.5 MAX 6.8±0.3 8.0±0.3 16pin SOP 8.0±0.3 SM5852FS 0 to 15 2.0±0.2 0.1±0.1 Package 5.5±0.3 0.17±0.05 Device 0.635±0.15 1.27±0.15 0.4±0.15 NIPPON PRECISION CIRCUITS—1 SM5852FS BLOCK DIAGRAM LRCI BCKI DI Input data Interface VDD DSP Block CLK RSTN Sequence Control TESTN MUTEN DB/DS OPT MOD1 VSS System Clock Output data Interface LRCO BCKO DOUT Mute Control Mode Control MOD2 NIPPON PRECISION CIRCUITS—2 SM5852FS PIN DESCRIPTION Number Name I/O1 1 LRCI Ip Input data sample rate (fs) clock input 2 BCKI Ip Bit clock input 3 DI Ip Serial data input 4 CLK I Clock input 5 VSS – Ground 6 RSTN Ip System reset initialization. Reset when LOW. 7 TESTN Ip Test mode input. Testing when LOW. 8 MUTEN Ip Mute input. Muting when LOW. 9 DOUT O Serial data output 10 BCKO O Bit clock output 11 LRCO O Output data sample rate (fs) clock output 12 VDD – 3.2 to 5.5 V supply 13 OPT Ip Not used. Tie HIGH for normal operation. Description Gain characteristics switch inputs. 14 15 16 MOD1 MOD2 DB/DS Ip Ip Ip MOD1 MOD2 DB/DS Gain mode LOW LOW LOW 18 dB LOW LOW HIGH 16 dB LOW HIGH LOW 14 dB LOW HIGH HIGH 12 dB HIGH LOW LOW 10 dB HIGH LOW HIGH 6 dB HIGH HIGH LOW Off HIGH HIGH HIGH Off 1. Ip = Input pin with pull-up resistor. Accordingly, they can be left open for HIGH-level input. NIPPON PRECISION CIRCUITS—3 SM5852FS SPECIFICATIONS Absolute Maximum Ratings VSS = 0 V Parameter Symbol Condition Rating Unit Supply voltage VDD −0.3 to 7.0 V Input voltage VIN VSS − 0.3 to VDD + 0.3 V Storage temperature Tstg −55 to 125 °C Power dissipation PD 250 mW Soldering temperature Tsld 255 °C Soldering time tsld 10 s Rating Unit Recommended Operating Conditions VSS = 0 V Parameter Symbol Condition Supply voltage VDD 3.2 to 5.5 V Operating temperature Topr −40 to 85 °C NIPPON PRECISION CIRCUITS—4 Audio SM5852FS DC Characteristics VDD = 4.5 to 5.5 V, VSS = 0 V, Ta = −40 to 85 °C for nomal-voltage operation Rating Parameter Current consumption1 Input voltage for all inputs2 Output voltage for all outputs3 Symbol Condition Unit min typ max – 16 23 mA VIH 2.4 – – V VIL – – 0.5 V 2.5 – – V IDD VDD = 5.0 V VOH IOH = −0.4 mA VOL IOL = 1.6 mA – – 0.4 V Input leakage current for all inputs2 ILH VIN = VDD – – 1.0 µA CLK input leakage current ILL VIN = 0 V – – 1.0 µA Input current for all inputs except CLK 2 IIL VIN = 0 V – – 20 µA 1. 2. 3. fCLK = 384fs = 16.9344 MHz, no output load, input data conformance with NPC test pattern LRCI, BCKI, DI,RSTN, TESTN, MUTEN, OPT, MOD1, MOD2, DB / DS, CKL LRCO, BCKO, DOUT VDD = 3.2 to 4.5 V, VSS = 0 V, Ta = −20 to 70 °C for low-voltage operation Rating Parameter Current consumption1 Input voltage for all inputs2 Output voltage for all outputs3 Symbol Condition Unit min typ max – 7 10 mA VIH 2.4 – – V VIL – – 0.5 V 2.5 – – V IDD VDD = 3.4 V VOH IOH = −0.2 mA VOL IOL = 0.8 mA – – 0.4 V Input leakage current for all inputs2 ILH VIN = VDD – – 1.0 µA CLK input leakage current ILL VIN = 0 V – – 1.0 µA Input current for all inputs except CLK 2 IIL VIN = 0 V – – 12 µA 1. 2. 3. fCLK = 384fs = 16.9344 MHz, no output load, input data conformance with NPC test pattern LRCI, BCKI, DI,RSTN, TESTN, MUTEN, OPT, MOD1, MOD2, DB / DS, CLK LRCO, BCKO, DOUT NIPPON PRECISION CIRCUITS—5 SM5852FS AC Characteristics VDD = 4.5 to 5.5 V, VSS = 0 V, Ta = −40 to 85 °C for nomal-voltage operation VDD = 3.2 to 4.5 V, VSS = 0 V, Ta = −20 to 70 °C for low-voltage operation CLK (384fs) Rating Parameter Symbol Condition Unit min typ max Clock pulsewidth tCW 24 – 500 ns Clock cycle time tCY 55 59 1000 ns tcy VIH CLK 1.5V tCW VIL tCW RSTN Rating Parameter Symbol Reset LOW-level pulsewidth tRST VDD VDD Condition Unit min typ max At power-ON 1 – – µs At all other times 50 – 1000 ns 3.2V 3.2V ttRST RST 1µsec 1µsec ttRST RST RSTN RSTN 1.5V 1.5V RSTN should be set LOW at power-ON and after reacquiring synchronization. Note that if RSTN is LOW for longer than 1 µs, a through-current flows in the internal dynamic circuits because the internal clock is stopped. The through-current has no rated value, so the reset pulse should be kept as short as possible at all times other than at power-ON. NIPPON PRECISION CIRCUITS—6 SM5852FS Serial input timing Rating Parameter Symbol Condition Unit min typ max BCKI pulsewidth tBCIW 100 – – ns BCKI cycle time tBCIY 200 – – ns DI setup time tDIS 75 – – ns DI hold time tDIH 75 – – ns LRCI setup time tLIS 75 – – ns LRCI hold time tLIH 75 – – ns BCKI 1.5V tBCIW tBCIW tBCIY DI 1.5V tDIS tDIH LRCI 1.5V tLIS tLIH DB/DS, OPT Rating Parameter Minimum pulsewidth Symbol tW Condition Unit min typ max 2/fs – – ns When DB/DS or OPT change state, the input level must be constant for a minimum of 2/fs (2 × LRCI cycle time). Input levels of duration less than 2/fs may be ignored. NIPPON PRECISION CIRCUITS—7 SM5852FS Serial output timing Rating Parameter Symbol Condition Unit min typ max BCKO pulsewidth tBCOW 15 pF load 180 1/96fs – ns BCKO cycle time tBCOY 15 pF load 400 1/48fs – ns tDHL 15 pF load −20 – 60 ns tDLH 15 pF load −20 – 60 ns DOUT, LRCO output delay time BCKO 1.5V tBCOW tBCOW tBCOY DOUT LRCO 1.5V tDHL tDLH NIPPON PRECISION CIRCUITS—8 SM5852FS Low-pass Gain Characteristics 20 18dB 16dB 14dB 12dB 10 0 −10 GAIN (dB) −20 −30 −40 OFF 6dB 10dB −50 −60 −70 −80 1.0 2.0 5.0 10 20 50 100 200 500 1k 2k 5k 10k 20k Frequency (Hz) DDBB Mode Filter Characteristics 0 -10 18dB 16dB 14dB 12dB Ooutput (dB) -20 -30 10dB 6dB OFF -40 -50 -60 -70 -80 -90 -90 -80 -70 -60 -50 -40 -30 -20 -10 0 Input (dB) NIPPON PRECISION CIRCUITS—9 SM5852FS FUNCTIONAL DESCRIPTION DDBB (Digital Dynamic Bass Boost) DB/DS Switching Shock Noise The DDBB function emphasizes the low-frequency components of the input signal by picking out the low-frequency components and passing them through a DDBB 3rd-order IIR low-pass filter and then changing the gain for the low-frequency components. The soft muting function is also activated to eliminate switching shock noise when DB/DS changes state. When DB/DS changes state, the attenuation changes to −∞ dB, the internal circuit settings are activated and then soft muting is released. Therefore, a maximum time of approximately 46.4 ms is required to change the compression mode. Of course, if the attenuation is already −∞ dB after soft muting using MUTEN, then no time is required to change compression mode. Two independent DDBB filters are used, one for each the left and right channels, to maintain full channel separation. The DDBB boost is determined by DB/DS, MOD1 and MOD2. MOD1 MOD2 DB/DS Gain mode LOW LOW LOW 18 dB LOW LOW HIGH 16 dB LOW HIGH LOW 14 dB LOW HIGH HIGH 12 dB HIGH LOW LOW 10 dB HIGH LOW HIGH 6 dB HIGH HIGH LOW Off HIGH HIGH HIGH Off Soft Muting Reset Initialization RSTN should be set LOW at power-ON and after reacquiring synchronization. Note that if RSTN is LOW for longer than 1 µs, a through-current flows in the LSI’s internal dynamic circuits because the internal clock is stopped. The through-current has no rated value, so the reset pulse should be kept as short as possible at all times other than at power-ON. When RSTN goes from LOW to HIGH, initialization hold is released and the initialization routine first resets the internal data over an interval of 4fs. During the initialization routine, the output data is forcibly muted so that there is no output signal. Soft muting is active when MUTEN is LOW. When MUTEN is LOW, the attenuation changes smoothly from 0 to −∞ dB in 1024/fs, or approximately 23.2 ms. When MUTEN goes HIGH, soft muting is released and the attenuation changes smoothly from −∞ to 0 dB, again taking approximately 23.2 ms. Also, if a MUTEN transition occurs while the attenuation is changing, the attenuation then changes smoothly in the direction specified by the new level of MUTEN. NIPPON PRECISION CIRCUITS—10 SM5852FS INPUT/OUTPUT TIMING Input Timing LRCO BCKO MSB Lch LSB Rch MSB LSB DOUT There must be a minimum of 16 BCKI clock cycles to read in a single word of data. Data on DI is input in sync with the falling edge of BCKI in 16-bit serial, MSB first, 2s complement format. Output Timing LRCO BCKO DOUT ,, MSB Lch ,, ,, LSB MSB Rch ,, ,, LSB Shaded areas represent intervals of invalid data. NIPPON PRECISION CIRCUITS—11 SM5852FS APPLICATON CIRCUIT X'tal(16.9344 MHz) XTI XTAI LRCI CKO DB/DS LRCK XTO MOD2 BCKI SONY CXD1125 1130 1135 MOD1 C210 DI OPT SM5852FS DATA SM5841 CLK RSTN LRCO LRCI TESTN BCKO BCKI MUTEN DOUT DIN PSSL SLOB Microcontroller NIPPON PRECISION CIRCUITS INC. reserves the right to make changes to the products described in this data sheet in order to improve the design or performance and to supply the best possible products. Nippon Precision Circuits Inc. assumes no responsibility for the use of any circuits shown in this data sheet, conveys no license under any patent or other rights, and makes no claim that the circuits are free from patent infringement. Applications for any devices shown in this data sheet are for illustration only and Nippon Precision Circuits Inc. makes no claim or warranty that such applications will be suitable for the use specified without further testing or modification. The products described in this data sheet are not intended to use for the apparatus which influence human lives due to the failure or malfunction of the products. Customers are requested to comply with applicable laws and regulations in effect now and hereinafter, including compliance with export controls on the distribution or dissemination of the products. Customers shall not export, directly or indirectly, any products without first obtaining required licenses and approvals from appropriate government agencies. NIPPON PRECISION CIRCUITS INC. NIPPON PRECISION CIRCUITS INC. 4-3, Fukuzumi 2 chome Koto-ku, Tokyo 135-8430, Japan Telephone: 03-3642-6661 Facsimile: 03-3642-6698 NC9623BE 1998.08 NIPPON PRECISION CIRCUITS—12