SSM9435GH,J
P-channel Enhancement-mode Power MOSFET
Low gate-charge
D
Simple drive requirement
Fast switching
G
Pb-free; RoHS compliant.
BV DSS
-30V
R DS(ON)
50mΩ
ID
-20A
S
DESCRIPTION
G D
S
The SSM9435H is in a TO-252 package, which is widely used for
commercial and industrial surface mount applications, and is well suited
for low voltage applications such as DC/DC converters. The through-hole
version, the SSM9435J in TO-251, is available for low-footprint vertical
mounting. These devices are manufactured with an advanced process,
providing improved on-resistance and switching performance.
G
D
S
TO-252 (H)
TO-251 (J)
ABSOLUTE MAXIMUM RATINGS
Parameter
Symbol
Rating
Units
VDS
Drain-Source Voltage
-30
V
VGS
Gate-Source Voltage
± 20
V
ID @ TC=25°C
Continuous Drain Current
-20
A
ID @ TC=100°C
Continuous Drain Current
-13
A
1
IDM
Pulsed Drain Current
-72
A
PD @ TC=25°C
Total Power Dissipation
31
W
Linear Derating Factor
0.25
W/°C
TSTG
Storage Temperature Range
-55 to 150
°C
TJ
Operating Junction Temperature Range
-55 to 150
°C
THERMAL DATA
Symbol
Parameter
Value
Unit
Rthj-c
Thermal Resistance Junction-case
Max.
4
°C/W
Rthj-a
Thermal Resistance Junction-ambient
Max.
110
°C/W
2/16/2005 Rev.2.1
www.SiliconStandard.com
1 of 5
SSM9435GH,J
Electrical Characteristics @ T j=25°C (unless otherwise specified)
Symbol
Parameter
Test Conditions
Min.
Typ.
Max. Units
-30
-
-
V
BVDSS
Drain-Source Breakdown Voltage
∆ BV DSS/ ∆ Tj
Breakdown Voltage Temperature Coefficient Reference to 25°C, ID=-1mA
-
-0.1
-
V/°C
RDS(ON)
Static Drain-Source On-Resistance2
VGS=-10V, ID=-10A
-
-
50
mΩ
VGS=-4.5V, ID=-5A
-
-
90
mΩ
VDS=VGS, ID=-250uA
-1
-
-3
V
VDS=-10V, ID=-10A
-
9.6
-
S
VDS=-30V, VGS=0V
-
-
-1
uA
Drain-Source Leakage Current (Tj=150 C)
VDS=-24V, VGS=0V
-
-
-25
uA
Gate-Source Leakage
VGS=± 20V
-
-
±100
nA
ID=-10A
-
10
16
nC
VGS(th)
Gate Threshold Voltage
gfs
Forward Transconductance
o
IDSS
Drain-Source Leakage Current (Tj=25 C)
o
IGSS
2
VGS=0V, ID=-250uA
Qg
Total Gate Charge
Qgs
Gate-Source Charge
VDS=-24V
-
3
-
nC
Qgd
Gate-Drain ("Miller") Charge
VGS=-4.5V
-
0.8
-
nC
VDS=-15V
-
9.6
-
ns
2
td(on)
Turn-on Delay Time
tr
Rise Time
ID=-10A
-
18
-
ns
td(off)
Turn-off Delay Time
RG=3.3Ω , VGS=-10V
-
19
-
ns
tf
Fall Time
RD=1.5Ω
-
14
-
ns
Ciss
Input Capacitance
VGS=0V
-
463
740
pF
Coss
Output Capacitance
VDS=-25V
-
187
-
pF
Crss
Reverse Transfer Capacitance
f=1.0MHz
-
140
-
pF
Min.
Typ.
IS=-10A, VGS=0V
-
-
-1.2
V
IS=-10A, VGS=0V,
-
34
-
ns
dI/dt=-100A/µs
-
30
-
nC
Source-Drain Diode
Symbol
VSD
Parameter
2
Forward On Voltage
2
trr
Reverse Recovery Time
Qrr
Reverse Recovery Charge
Test Conditions
Max. Units
Notes:
1.Pulse width limited by maximum junction temperature.
2.Pulse width <300us , duty cycle <2%.
2/16/2005 Rev.2.1
www.SiliconStandard.com
2 of 5
SSM9435GH,J
80
70
o
-10V
T C =25 C
-10V
50
-8.0V
-ID , Drain Current (A)
-8.0V
60
-ID , Drain Current (A)
o
T C =150 C
60
-6.0V
40
-4.5V
20
V G =-4.0V
40
-6.0V
30
-4.5V
20
V G =-4.0V
10
0
0
0
2
4
6
8
0
10
-V DS , Drain-to-Source Voltage (V)
Fig 1. Typical Output Characteristics
4
6
8
Fig 2. Typical Output Characteristics
90
1.6
I D =-10A
T c =25°C
I D =-10A
V G =-10V
1.4
Normalized R DS(ON)
80
RDS(ON) (mΩ )
2
-V DS , Drain-to-Source Voltage (V)
70
60
50
1.2
1.0
0.8
40
0.6
30
2
4
6
8
10
-50
12
0
50
100
150
o
T j , Junction Temperature ( C)
-V GS , Gate-to-Source Voltage (V)
Fig 3. On-Resistance vs. Gate Voltage
Fig 4. Normalized On-Resistance
vs. Junction Temperature
10
3
8
2
T j =150 o C
-VGS(th) (V)
-IS(A)
6
T j =25 o C
4
1
2
0
0
0
2/16/2005 Rev.2.1
0.2
0.4
0.6
0.8
1
1.2
1.4
-50
0
50
100
150
-V SD , Source-to-Drain Voltage (V)
T j , Junction Temperature ( o C)
Fig5. Forward Characteristic of
Reverse Diode
Fig 6. Gate Threshold Voltage vs.
Junction Temperature
www.SiliconStandard.com
3 of 5
SSM9435GH,J
f=1.0MHz
1000
I D =-10A
V DS =-24V
10
C iss
8
C (pF)
-VGS , Gate to Source Voltage (V)
12
6
4
C oss
2
C rss
0
100
0
5
10
15
20
25
30
1
5
Q G , Total Gate Charge (nC)
9
13
17
21
25
29
-V DS , Drain-to-Source Voltage (V)
Fig 7. Gate Charge Characteristics
Fig 8. Typical Capacitance Characteristics
100
1
1ms
10
-ID(A)
10ms
100ms
1s
DC
1
T c =25 o C
Single Pulse
0.1
Normalized Thermal Response (Rthjc)
DUTY=0.5
0.2
0.1
0.1
0.05
PDM
0.02
t
0.01
T
Single Pulse
Duty factor = t/T
Peak T j = PDM x Rthjc + TC
0.01
0.1
1
10
100
0.00001
0.0001
-V DS , Drain-to-Source Voltage (V)
Fig 9. Maximum Safe Operating Area
0.001
0.01
0.1
1
t , Pulse Width (s)
Fig 10. Effective Transient Thermal Impedance
VG
VDS
90%
QG
-4.5V
QGS QGD
10%
VGS
td(on) tr
td(off) tf
Fig 11. Switching Time Waveform
2/16/2005 Rev.2.1
Charge
Q
Fig 12. Gate Charge Waveform
www.SiliconStandard.com
4 of 5
SSM9435GH,J
Information furnished by Silicon Standard Corporation is believed to be accurate and reliable. However, Silicon Standard Corporation makes no
guarantee or warranty, express or implied, as to the reliability, accuracy, timeliness or completeness of such information and assumes no
responsibility for its use, or for infringement of any patent or other intellectual property rights of third parties that may result from its
use. Silicon Standard reserves the right to make changes as it deems necessary to any products described herein for any reason, including
without limitation enhancement in reliability, functionality or design. No license is granted, whether expressly or by implication, in relation to
the use of any products described herein or to the use of any information provided herein, under any patent or other intellectual property rights of
Silicon Standard Corporation or any third parties.
2/16/2005 Rev.2.1
www.SiliconStandard.com
5 of 5