STP3HNK90Z STF3HNK90Z N-channel 900V - 0.35Ω - 3A - TO-220 - TO-220FP Zener-protected SuperMESH™ Power MOSFET General features Type VDSS (@Tjmax) RDS(on) ID STP3HNK90Z 900 V < 0.42 Ω 3A STP3HNK90Z 900 V < 0.42 Ω 3A 3 ■ Extremely high dv/dt capability ■ 100% avalanche tested ■ Gate charge minimized ■ Very low intrinsic capacitances ■ Very good manufacturing repeatibility 1 TO-220 2 TO-220FP Description The SuperMESH™ series is obtained through an extreme optimization of ST’s well established strip-based PowerMESH™ layout. In addition to pushing on-resistance significantly down, special care is taken to ensure a very good dv/dt capability for the most demanding applications. Such series complements ST full range of high voltage MOSFETs including revolutionary MDmesh™ products. Internal schematic diagram Applications ■ Switching application Order codes Part number Marking Package Packaging STP3HNK90Z P3HNK90Z TO-220 Tube STF3HNK90Z F3HNK90Z TO-220FP Tube August 2006 Rev 3 1/15 www.st.com 15 Contents STP3HNK90Z - STF3HNK90Z Contents 1 Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 1.1 2 Protection features of gate-to-source zener diodes . . . . . . . . . . . . . . . . . . 4 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 2.1 Electrical characteristics (curves) ............................ 7 3 Test circuit 4 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 5 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 2/15 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 STP3HNK90Z - STF3HNK90Z 1 Electrical ratings Electrical ratings Table 1. Absolute maximum ratings Symbol Parameter Value STP3HNK90Z VDS VDGR VGS Unit STF3HNK90Z Drain-source voltage (VGS = 0) 800 V Drain-gate voltage (RGS = 20KΩ) 800 V Gate-source voltage ± 30 V ID Drain current (continuous) at TC = 25°C 3 3 (1) A ID Drain current (continuous) at TC=100°C 1.89 1.89 (1) A IDM(2) Drain current (pulsed) 12 12 (1) A PTOT Total dissipation at TC = 25°C 90 25 W 0.72 0.2 W/°C Derating factor VESD(G-S) Gate source ESD(HBM-C=100pF, R=1.5ΚΩ) dv/dt (3) VISO TJ Tstg Peak diode recovery voltage slope Insulation withstand voltage (DC) 3000 V 4.5 V/ns - Operating junction temperature Storage temperature 2500 V -55 to 150 °C Value Unit 1. Limited only by maximum temperature allowed 2. Pulse width limited by safe operating area 3. ISD ≤3A, di/dt ≤200A/µs, VDD ≤V(BR)DSS, Tj ≤TJMAX. Table 2. Symbol Rthj-case Thermal data Parameter Thermal resistance junction-case Max TO-220 TO-220FP 1.38 5 °C/W Rthj-a Thermal resistance junction-ambient Max 62.5 °C/W Tl Maximum lead temperature for soldering purpose 300 °C 3/15 Electrical ratings Table 3. STP3HNK90Z - STF3HNK90Z Avalanche characteristics Symbol IAR Avalanche current, repetitive or not-repetitive (pulse width limited by Tj Max) EAS Single pulse avalanche energy (starting Tj=25°C, Id=Iar, Vdd=50V) Table 4. Symbol BVGSO 1.1 Parameter Value Unit 3 A 200 mJ Gate-source zener diode Parameter Test conditions Gate-source breakdown voltage Igs=± 1mA (Open Drain) Min. Typ. 30 Max. Unit V Protection features of gate-to-source zener diodes The built-in back-to-back Zener diodes have specifically been designed to enhance not only the device’s ESD capability, but also to make them safely absorb possible voltage transients that may occasionally be applied from gate to source. In this respect the Zener voltage is appropriate to achieve an efficient and cost-effective intervention to protect the device’s integrity. These integrated Zener diodes thus avoid the usage of external components. 4/15 STP3HNK90Z - STF3HNK90Z 2 Electrical characteristics Electrical characteristics (TCASE=25°C unless otherwise specified) Table 5. Symbol On/off states Parameter Test conditions Drain-source breakdown voltage ID = 1mA, VGS= 0 IDSS Zero gate voltage drain current (VGS = 0) VDS = Max rating, VDS = Max rating, Tc = 125°C IGSS Gate body leakage current VGS = ± 30V (VGS = 0) V(BR)DSS VGS(th) Gate threshold voltage VDS = VGS, ID = 50µA RDS(on) Static drain-source on resistance VGS = 10V, ID = 1.5 A Table 6. Symbol Typ. Max. Unit 900 3 V 1 50 µA µA ±10 µA 3.75 4.5 V 3.5 4.2 Ω Typ. Max. Unit Dynamic Parameter Test conditions gfs (1) Forward transconductance VDS =15V, ID = 1.5A Ciss Coss Crss Input capacitance Output capacitance Reverse transfer capacitance VDS =25V, f=1 MHz, VGS=0 Equivalent output capacitance td(on) tr td(off) tf Qg Qgs Qgd Cosseq(2). Min. Min. 19 S 690 71 14.4 pF pF pF VGS=0, VDS =0V to 720V 88 pF Turn-on delay time Rise time Off-voltage rise time Fall time VDD=450 V, ID= 1.5 A, RG=4.7Ω, VGS=10V (see Figure 18) 23 28 42 27 ns ns ns ns Total gate charge Gate-source charge Gate-drain charge VDD=720V, ID = 3A VGS =10V 26 5.7 13.9 35 nC nC nC 1. Pulsed: pulse duration=300µs, duty cycle 1.5% 2. Coss eq. is defined as a constant equivalent capacitance giving the same charging time as Coss when VDS increases from 0 to 80% VDSS 5/15 Electrical characteristics Table 7. Symbol ISD Source drain diode Parameter Min Typ. Max Unit Source-drain current 3 A Source-drain current (pulsed) 12 A (2) Forward on voltage ISD= 3 A, VGS=0 1.6 V Reverse recovery time Reverse recovery charge Reverse recovery current ISD=3 A, di/dt = 100A/µs, VDD=50V, Tj=25°C (see Figure 20) 494 2.4 9.8 ns µC A Reverse recovery time Reverse recovery charge Reverse recovery current ISD=3A, di/dt = 100A/µs, VDD=50V, Tj=150°C (see Figure 20) 628 3.2 10.2 ns µC A trr Qrr IRRM trr Qrr IRRM 1. Pulse width limited by safe operating area 2. Pulsed: pulse duration=300µs, duty cycle 1.5% 6/15 Test conditions (1) ISDM VSD STP3HNK90Z - STF3HNK90Z STP3HNK90Z - STF3HNK90Z Electrical characteristics 2.1 Electrical characteristics (curves) Figure 1. Safe operating area for TO-220 Figure 2. Thermal impedance for TO-220 Figure 3. Safe operating area for TO-220FP Figure 4. Thermal impedance for TO-220FP Figure 5. Output characterisics Figure 6. Transfer characteristics 7/15 Electrical characteristics STP3HNK90Z - STF3HNK90Z Figure 7. Transconductance Figure 9. Gate charge vs gate-source voltage Figure 10. Capacitance variations Figure 11. Normalized gate threshold voltage vs temperature 8/15 Figure 8. Static drain-source on resistance Figure 12. Normalized on resistance vs temperature STP3HNK90Z - STF3HNK90Z Figure 13. Source-drain diode forward characteristics Electrical characteristics Figure 14. Normalized BVDSS vs temperature Figure 15. Maximum avalanche energy vs temperature 9/15 Test circuit 3 STP3HNK90Z - STF3HNK90Z Test circuit Figure 16. Unclamped Inductive load test circuit Figure 17. Unclamped Inductive waveform Figure 18. Switching times test circuit for resistive load Figure 19. Gate charge test circuit Figure 20. Test circuit for inductive load switching and diode recovery times 10/15 STP3HNK90Z - STF3HNK90Z 4 Package mechanical data Package mechanical data In order to meet environmental requirements, ST offers these devices in ECOPACK® packages. These packages have a Lead-free second level interconnect . The category of second level interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com 11/15 Package mechanical data STP3HNK90Z - STF3HNK90Z TO-220 MECHANICAL DATA DIM. mm. MIN. inch MAX. MIN. TYP. MAX. A 4.40 4.60 0.173 0.181 b 0.61 0.88 0.024 0.034 b1 1.15 1.70 0.045 0.066 c 0.49 0.70 0.019 0.027 D 15.25 15.75 0.60 0.620 E 10 10.40 0.393 0.409 e 2.40 2.70 0.094 0.106 e1 4.95 5.15 0.194 0.202 F 1.23 1.32 0.048 0.052 H1 6.20 6.60 0.244 0.256 J1 2.40 2.72 0.094 0.107 0.551 L 13 14 0.511 L1 3.50 3.93 0.137 L20 16.40 L30 12/15 TYP 0.154 0.645 28.90 1.137 øP 3.75 3.85 0.147 0.151 Q 2.65 2.95 0.104 0.116 STP3HNK90Z - STF3HNK90Z Package mechanical data TO-220FP MECHANICAL DATA mm. DIM. MIN. A 4.4 inch TYP MAX. MIN. TYP. 4.6 0.173 0.181 MAX. 0.106 B 2.5 2.7 0.098 D 2.5 2.75 0.098 0.108 E 0.45 0.7 0.017 0.027 F 0.75 1 0.030 0.039 F1 1.15 1.7 0.045 0.067 F2 1.15 1.7 0.045 0.067 G 4.95 5.2 0.195 0.204 G1 2.4 2.7 0.094 0.106 H 10 10.4 0.393 0.409 L2 16 0.630 L3 28.6 30.6 1.126 1.204 L4 9.8 10.6 .0385 0.417 L5 2.9 3.6 0.114 0.141 L6 15.9 16.4 0.626 0.645 9 9.3 0.354 0.366 Ø 3 3.2 0.118 0.126 B D A E L7 L3 L6 F2 H G G1 F F1 L7 L2 L5 1 2 3 L4 13/15 Revision history 5 STP3HNK90Z - STF3HNK90Z Revision history Table 8. 14/15 Revision history Date Revision Changes 09-Sep-2004 2 Complete document 10-Aug-2006 3 New template, no content change STP3HNK90Z - STF3HNK90Z Please Read Carefully: Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. 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