STU3N45K3 N-channel 450 V - 3.3 Ω typ., 1.8 A Zener-protected SuperMESH3™ Power MOSFET in a IPAK package Datasheet - production data Features TAB Order code VDSS RDS(on) max ID Pw STU3N45K3 450 V <4Ω 1.8 A 27 W • 100% avalanche tested 3 2 1 • Extremely high dv/dt capability IPAK • Gate charge minimized • Very low intrinsic capacitance • Improved diode reverse recovery characteristics Figure 1. Internal schematic diagram • Zener protected Applications D(2, TAB) • Switching applications Description G(1) S(3) AM01476v1 This SuperMESH3™ Power MOSFET is the result of improvements applied to STMicroelectronics’ SuperMESH™ technology, combined with a new optimized vertical structure. This device boasts an extremely low onresistance, superior dynamic performance and high avalanche capability, rendering it suitable for the most demanding applications. Table 1.Device summary Order code Marking Package Packaging STU3N45K3 3N45K3 IPAK Tube June 2013 This is information on a product in full production. DocID17206 Rev 3 1/14 www.st.com Contents STU3N45K3 Contents 1 Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 2.1 Electrical characteristics (curves) ............................ 6 3 Test circuits 4 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 5 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 2/14 .............................................. 9 DocID17206 Rev 3 STU3N45K3 1 Electrical ratings Electrical ratings Table 2.Absolute maximum ratings Symbol Parameter Value Unit VDS Drain-source voltage (VGS = 0) 450 V VGS Gate- source voltage ± 30 V ID Drain current (continuous) at TC = 25 °C 1.8 A ID Drain current (continuous) at TC = 100 °C 1 A Drain current (pulsed) 7.2 A Total dissipation at TC = 25 °C 27 W Avalanche current, repetitive or not-repetitive 0.9 A Single pulse avalanche energy 60 mJ Peak diode recovery voltage slope 12 V/ns 1000 V -55 to 150 °C IDM (1) PTOT IAR (2) EAS (3) dv/dt (4) Vesd(g-s) G-S ESD (HBM C = 100 pF, R = 1.5 kΩ) Tstg Storage temperature 1. Pulse width limited by safe operating area. 2. Pulse width limited by Tj max. 3. Starting Tj = 25 °C, ID = IAR, VDD = 50 V. 4. ISD ≤ 1.8 A, di/dt ≤ 400 A/µs, VDS peak ≤ V(BR)DSS, VDD = 80% V(BR)DSS. Table 3.Thermal data Symbol Parameter Value Unit Rthj-case Thermal resistance junction-case max 4.63 °C/W Rthj-amb Thermal resistance junction-ambient max 100 °C/W Tl Maximum lead temperature for soldering purpose 300 °C DocID17206 Rev 3 3/14 14 Electrical characteristics 2 STU3N45K3 Electrical characteristics (TC = 25 °C unless otherwise specified) Table 4.On /off states Symbol V(BR)DSS Parameter Test conditions Drain-source breakdown voltage ID = 1 mA, VGS = 0 IDSS Zero gate voltage VDS = Max rating drain current (VGS = 0) VDS = Max rating, TC=125 °C IGSS Gate-body leakage current (VDS = 0) Min. Typ. Gate threshold voltage VDS = VGS, ID = 50 µA RDS(on Static drain-source on resistance Unit 450 V 1 50 µA µA ± 10 µA 3.75 4.5 V 3.3 4 Ω Min. Typ. Max. Unit - 164 - pF - 17 - pF VGS = ± 20 V VGS(th) Max. 3 VGS = 10 V, ID = 0.6 A Table 5.Dynamic Symbol Parameter Test conditions Ciss Input capacitance Coss Output capacitance Crss Reverse transfer capacitance - 3 - pF Co(tr)(1) Equivalent capacitance time related - 13 - pF Co(er)(2) Equivalent capacitance energy related - 18 - pF f = 1 MHz open drain - 8 - Ω VDD = 360 V, ID = 1.8 A, VGS = 10 V (see Figure 16) - 9.5 - nC - 2 - nC - 6 - nC RG Intrinsic gate resistance Qg Total gate charge Qgs Gate-source charge Qgd Gate-drain charge VDS = 50 V, f = 1 MHz, VGS = 0 VDS = 0 to 360 V, VGS = 0 1. Coss eq. time related is defined as a constant equivalent capacitance giving the same charging time as Coss when VDS increases from 0 to 80% VDSS 2. Coss eq. energy related is defined as a constant equivalent capacitance giving the same charging time as Coss when VDS increases from 0 to 80% VDSS 4/14 DocID17206 Rev 3 STU3N45K3 Electrical characteristics Table 6.Switching times Symbol td(on) tr Parameter Test conditions Turn-on delay time VDD = 225 V, ID = 0.9 A, RG = 4.7 Ω, VGS = 10 V (see Figure 15) Rise time td(off) tf Turn-off-delay time Fall time Min. Typ. Max Unit - 6.5 - ns - 5.4 - ns - 17 - ns - 22 - ns Min. Typ. Table 7.Source drain diode Symbol Parameter Test conditions Max. Unit Source-drain current - 0.6 A ISDM (1) Source-drain current (pulsed) - 2.4 A VSD (2) Forward on voltage - 1.5 V ISD trr ISD = 0.6 A, VGS = 0 Reverse recovery time Qrr Reverse recovery charge IRRM Reverse recovery current trr Reverse recovery time Qrr Reverse recovery charge IRRM Reverse recovery current ISD = 1.8 A, di/dt = 100 A/µs VDD = 60 V (see Figure 20) ISD = 1.8 A, di/dt = 100 A/µs VDD = 60 V, Tj = 150 °C (see Figure 20) - 175 ns - 550 nC - 6 A - 185 ns - 600 nC - 6.5 A Min Typ Max Unit 30 - - V 1. Pulse width limited by safe operating area. 2. Pulsed: Pulse duration = 300 µs, duty cycle 1.5%. Table 8.Gate-source Zener diode Symbol V(BR)GSO Parameter Test conditions Gate-source breakdown voltage IGS= ± 1 mA, ID=0 The built-in back-to-back Zener diodes have been specifically designed to enhance not only the device’s ESD capability, but also to make them capable of safely absorbing any voltage transients that may occasionally be applied from gate to source. In this respect, the Zener voltage is appropriate to achieve efficient and cost-effective protection of device integrity. The integrated Zener diodes thus eliminate the need for external components. DocID17206 Rev 3 5/14 14 Electrical characteristics 2.1 STU3N45K3 Electrical characteristics (curves) Figure 2. Safe operating area Figure 3. Thermal impedance AM09206v1 ID (A) Tj=150°C Tc=25°C Single pulse 10 100µs D S( o 1 n) O p Li er m at ite io d ni by n m this ax a R rea is 10µs 1ms 10ms 0.1 0.01 0.1 10 1 100 VDS(V) Figure 4. Output characteristics Figure 5. Transfer characteristics AM09207v1 ID (A) VGS=10V AM09208v1 ID (A) VDS=15V 3.5 2.5 3.0 7V 2.0 2.5 1.5 2.0 6V 1.5 1.0 1.0 0.5 0.5 5V 0 0 5 10 15 20 25 0 0 VDS(V) Figure 6. Gate charge vs gate-source voltage 2 3 4 5 6 7 8 9 VGS(V) Figure 7. Static drain-source on resistance AM09209v1 VGS (V) AM09210v1 RDS(on) (Ω) VDS VDD=360V ID=1.8A 12 350 300 10 250 4.2 4.0 VGS=10V 3.8 8 3.6 200 6 150 4 2 0 0 6/14 1 2 4 6 8 3.4 3.2 100 3.0 50 2.8 0 10 Qg(nC) DocID17206 Rev 3 2.6 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 ID(A) STU3N45K3 Electrical characteristics Figure 8. Capacitance variations Figure 9. Output capacitance stored energy AM10296v1 C (pF) AM10297v1 Eoss (µJ) 0.8 Ciss 0.7 100 0.6 0.5 0.4 10 0.3 Coss 0.2 Crss 1 0.1 1 100 10 0.1 0 0 VDS(V) Figure 10. Normalized gate threshold voltage vs temperature AM10298v1 VGS(th) (norm) 100 200 300 400 VDS(V) Figure 11. Normalized on-resistance vs temperature AM10299v1 RDS(on) (norm) ID=1.2A 1.10 ID=50µA 2.5 1.00 2.0 1.5 0.90 1.0 0.80 0.5 0.70 -75 -25 25 75 125 Figure 12. Source-drain diode forward characteristics AM10301v1 VSD (V) 0.0 -75 TJ(°C) -25 25 75 125 TJ(°C) Figure 13. Normalized BVDSS vs temperature AM10300v1 BVDSS (norm) TJ=-50°C 1.0 ID=1mA 1.10 0.9 TJ=25°C 0.8 0.7 1.05 1.00 TJ=150°C 0.6 0.95 0.5 0.4 0 0.4 0.8 1.2 1.6 ISD(A) 0.90 -75 DocID17206 Rev 3 -25 25 75 125 TJ(°C) 7/14 14 Electrical characteristics STU3N45K3 Figure 14. Maximum avalanche energy vs starting Tj AM10303v1 EAS (mJ) ID=1.8 A VDD=50 V 60 50 40 30 20 10 0 0 8/14 20 40 60 80 100 120 140 TJ(°C) DocID17206 Rev 3 STU3N45K3 3 Test circuits Test circuits Figure 15. Switching times test circuit for resistive load Figure 16. Gate charge test circuit VDD 12V 47kΩ 1kΩ 100nF 3.3 μF 2200 RL μF IG=CONST VDD VGS 100Ω Vi=20V=VGMAX VD RG 2200 μF D.U.T. D.U.T. VG 2.7kΩ PW 47kΩ 1kΩ PW AM01468v1 Figure 17. Test circuit for inductive load switching and diode recovery times A A AM01469v1 Figure 18. Unclamped inductive load test circuit L A D G D.U.T. FAST DIODE B B VD L=100μH S 3.3 μF B 25 Ω 1000 μF D VDD 2200 μF 3.3 μF VDD ID G RG S Vi D.U.T. Pw AM01470v1 AM01471v1 Figure 19. Unclamped inductive waveform Figure 20. Switching time waveform ton V(BR)DSS tdon VD toff tr tdoff tf 90% 90% IDM 10% ID VDD 10% 0 VDD VDS 90% VGS AM01472v1 0 DocID17206 Rev 3 10% AM01473v1 9/14 14 Package mechanical data 4 STU3N45K3 Package mechanical data In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are available at: www.st.com. ECOPACK® is an ST trademark. 10/14 DocID17206 Rev 3 STU3N45K3 Package mechanical data Table 9. IPAK (TO-251) mechanical data mm. DIM min. typ. max. A 2.20 2.40 A1 0.90 1.10 b 0.64 0.90 b2 b4 0.95 5.20 B5 5.40 0.30 c 0.45 0.60 c2 0.48 0.60 D 6.00 6.20 E 6.40 6.60 e e1 2.28 4.40 H 4.60 16.10 L 9.00 9.40 L1 0.80 1.20 L2 0.80 V1 10° DocID17206 Rev 3 1.00 11/14 14 Package mechanical data STU3N45K3 Figure 21. IPAK (TO-251) drawing 0068771_K 12/14 DocID17206 Rev 3 STU3N45K3 5 Revision history Revision history Table 10.Document revision history Date Revision 02-Mar-2010 1 First release. 23-Apr-2010 2 Changed root part number. 3 – Part numbers STN3N45K3 and STQ3N45K3-AP have been moved to two separate datasheets – Modified: Description and Figure 1 in cover page – Modified: Vesd(g-s) value – Updated: Section 4: Package mechanical data 24-Jun-2013 Changes DocID17206 Rev 3 13/14 14 STU3N45K3 Please Read Carefully: Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST’s terms and conditions of sale. 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