INTEGRATED CIRCUITS DATA SHEET TDA8050 QPSK transmitter Product specification Supersedes data of 1999 Jun 21 File under Integrated Circuits, IC02 1999 Dec 14 Philips Semiconductors Product specification QPSK transmitter TDA8050 FEATURES • PLL for RF frequency control • Programmable gain • Gain controlled output amplifier • PLL controlled carrier frequency • 3-wire bus and an output buffer. • 3-wire transmission bus Two PLLs are incorporated, the first PLL includes: • 5 V supply voltage. • Fixed main divider APPLICATIONS • Crystal oscillator and its programmable reference divider • QPSK modulation. • Phase/frequency detector combined with a fixed charge pump. GENERAL DESCRIPTION The second PLL includes: The Quadrature Phase Shift Keying (QPSK) transmitter is a monolithic bipolar IC dedicated for quadrature modulation of the I and Q signals. It includes: • 12-bit programmable divider • Divide-by-four preamplifier • Crystal oscillator and its programmable reference divider • Two double-balanced mixers • Phase/frequency detector combined with a ‘clever’ charge pump which drives the tuning amplifier, including 9 V output. • Symmetrical Voltage Controlled Oscillator (VCO) with 0 to 90 degree signal generation for modulation • Phase-Locked Loop (PLL) for IF frequency control • Conversion mixer QUICK REFERENCE DATA SYMBOL PARAMETER MIN. TYP. MAX. UNIT VCC supply voltage 4.75 5.00 5.25 V fc output centre frequency 5 − 40 MHz Vo(max) maximum output level − 55 − dBmV fxtal crystal frequency 1 − 4 MHz fref(MOD) reference frequency for modulator synthesizer − 250 − kHz fstep frequency step size for convertor synthesizer 50 − 500 kHz Tamb operating ambient temperature 0 − 70 °C ORDERING INFORMATION TYPE NUMBER TDA8050T 1999 Dec 14 PACKAGE NAME SO32 DESCRIPTION plastic small outline package; 32 leads; body width 7.5 mm 2 VERSION SOT287-1 This text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader.This text is here in _white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader.This text is here inThis text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader. white to force landscape pages to be ... 13 18 26 IF_FILT AGND1 9 RF_OUTC RF_OUT 24 25 RF_INC RF_IN SW_CAP 28 27 30 31 MODULATOR I_IN I_INC 5 CLK DATA EN 3 LOCK 29 4 × 6 1 7 3 × 2 OUTEN BUF_OUTC BUF_OUT × 8 90° 14 15 3-WIRE BUS TRANCEIVER 0° DAC 1/2 16 TDA8050 23 CHARGE PUMP 12 DIGITAL PHASE COMPARATOR FIXED MAIN DIVIDER PROGRAMMABLE MAIN DIVIDER PROGRAMMABLE REF DIVIDER PROGRAMMABLE REF DIVIDER 10 11 17 22 21 DIGITAL PHASE COMPARATOR 20 PROGRAMMABLE CHARGE PUMP 19 FCE181 CP_MOD TKAMOD OSC_IN TKBMOD TKBCONV TUNECONV CP_CONV TKACONV Product specification Fig.1 Block diagram. TDA8050 handbook, full pagewidth Q_INC 32 AGND2 CONVERTER Σ Q_IN AVCC2 Philips Semiconductors AVCC1 QPSK transmitter DGND BLOCK DIAGRAM 1999 Dec 14 IF_FILTC DVCC Philips Semiconductors Product specification QPSK transmitter TDA8050 PINNING SYMBOL PIN DESCRIPTION OUTEN 1 output enable BUF_OUT 2 output amplifier balanced output BUF_OUTC 3 output amplifier balanced output AGND2 4 converter analog ground 2 I_IN 5 I balanced input I_INC 6 I balanced input Q_IN 7 Q balanced input Q_INC 8 Q balanced input AGND1 9 modulator analog ground 1 TKAMOD 10 modulator VCO tank circuit input 2 TKBMOD 11 modulator VCO tank circuit input 1 I_IN 5 CP_MOD 12 modulator charge pump output for PLL loop filter I_INC 6 27 RF_OUTC Q_IN 7 26 AVCC1 DVCC 13 digital supply voltage CLK 14 3-wire bus serial control clock DATA 15 3-wire bus serial control data input EN 16 3-wire bus serial control enable TKAMOD 10 23 LOCK OSC_IN 17 crystal oscillator input TKBMOD 11 22 TKACONV DGND 18 digital ground CP_MOD 12 21 TKBCONV CP_CONV 19 converter charge pump output for PLL loop filter TUNECONV 20 tuning voltage output for converter VCO DATA 15 EN 16 TKBCONV 21 converter VCO tank circuit input 1 TKACONV 22 converter VCO tank circuit input 2 LOCK 23 lock detect signal IF_FILT 24 IF balanced output to filter IF_FILTC 25 IF balanced output to filter AVCC1 26 modulator analog supply voltage RF_OUTC 27 RF balanced output to filter RF_OUT 28 RF balanced output to filter AVCC2 29 converter analog supply voltage RF_IN 30 RF balanced input to programmable amplifier RF_INC 31 RF balanced input to programmable amplifier SW_CAP 32 switch capacitor 1999 Dec 14 handbook, halfpage OUTEN 1 32 SW_CAP BUF_OUT 2 31 RF_INC BUF_OUTC 3 30 RF_IN AGND2 4 29 AVCC2 28 RF_OUT Q_INC 8 25 IF_FILTC TDA8050 AGND1 9 24 IF_FILT DVCC 13 20 TUNECONV CLK 14 19 CP_CONV 18 DGND 17 OSC_IN FCE182 Fig.2 Pin configuration. 4 Philips Semiconductors Product specification QPSK transmitter TDA8050 FUNCTIONAL DESCRIPTION The frequency of the second local oscillator operates in the bandwidth 145 to 180 MHz and programmable due to a PLL implemented in the circuit. The I and Q are balanced analog signals at a level of 400 mV (p-p). These are mixed by two double balanced mixers with the output signal generated by a first local oscillator providing the modulated signal. The VCO of both first and second local oscillators requires an external LC tank circuit with two varicap diodes. The modulated signal is then filtered by an IF filter. This filtered signal together with a signal generated by a second local oscillator is converted by a balanced mixer to produce the QPSK signal. The data to the PLL is loaded in bursts framed by the signal EN. Programming rising clock edges and their appropriate data bits are ignored until EN goes active (LOW). The internal latches are updated with the latest programming data when EN returns inactive (HIGH). The last 14 bits are stored in the programming register. The QPSK signal is amplified by a gain controlled amplifier to a level suitable for transmission. The gain of the controlled amplifier is bus controlled and this amplifier can be disabled when not transmitting to provide signal attenuation. No check is made on the number of clock pulses received during the time programming is enabled. A wrong active clock edge will be generated causing a shift of data bits, if EN goes HIGH while CLK is still LOW. At power up, EN should be HIGH. The lock detector output LOCK is HIGH when both PLLs are in lock. The amplified signal is applied to an on-chip amplifier having two balanced outputs (open collector) linked to two chip resistors (values 150 Ω), and 9 V. The balanced outputs are designed to drive a 2 : 1 transformer (Siemens V944) with a 75 Ω load giving an output level of 55 dBmV. The output frequency range of the transmitter is 5 to 40 MHz. The main divider ratio and the reference divider ratios are provided via the serial bus. A control register controls the Digital-to-Analog Converter (DAC), the output amplifier and the charge pump currents (Tables 1, 2 and 3). The frequency of the first local oscillator operates at twice the frequency (i.e. 280 MHz) fixed by a Phase-Locked Loop (PLL) implemented in the circuit. LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 134). SYMBOL PARAMETER MIN. −0.3 MAX. UNIT VCC supply voltage tsc short-circuit time (every pin to VCC or GND) − 10 s Vmax voltage on all pins except BUF_OUT, BUF_OUTC and TUNECONV −0.3 VCC V Vo(tune) output tuning voltage −0.3 +30 V Vo(buf) output buffer voltage on pins BUF_OUT and BUF_OUTC − 10 V Ptot maximum power dissipation − 800 mW Tamb operating ambient temperature 0 70 °C Tstg storage temperature −40 +150 °C Tj(max) junction temperature − 150 °C 1999 Dec 14 5 +6.0 V Philips Semiconductors Product specification QPSK transmitter TDA8050 THERMAL CHARACTERISTICS SYMBOL PARAMETER CONDITIONS VALUE UNIT Rth(j-a) thermal resistance from junction to ambient in free air 63 K/W HANDLING Human Body Model (HBM): The IC pins withstand 2 kV except pins 27 and 28 (1750 V). Machine Model (MM): The IC pins withstand 100 V. CHARACTERISTICS Measured in application circuit (see Fig.9) with the following conditions: VCC = 5 V; Tamb = 25 °C; all AC units are RMS values; unless otherwise specified. SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT Supply VCCA(mod) modulator analog supply voltage 4.75 5 5.25 V ICCA(mod) modulator analog supply current − 41 − mA VCCA(conv) converter analog supply voltage 4.75 5 5.25 V ICCA(conv) converter analog supply current − 48 − mA ICC(buf) buffer output supply current − 44 − mA VCCD digital supply voltage 4.75 5 5.25 V ICCD digital supply current − 22 − mA VCC(tune) tuning supply voltage − − 9 V Quadrature modulator I and Q inputs VI(DC) input DC level over the complete range of temperature − 0.5VCC − V Vi(p-p) signal input level (balanced) (peak-to-peak value) indicative − 400 500 mV fi(max) I and Q maximum input frequency indicative − 10 − MHz Zi(dif) differential input impedance B(1dB) 1 dB amplifier bandwidth − 4.4 − kΩ indicative − 10 − MHz − − 140 MHz see Fig.3 − − ±1 dB − − ±2 deg − −28 − dBc − 1.8 − kΩ − − 280 MHz MODULATOR fc output centre frequency ∆A amplitude imbalance ∆Φ phase imbalance LO(sup) LO suppression Zo(dif) differential output impedance see Fig.3 MODULATOR VOLTAGE CONTROLLED OSCILLATOR fosc(mod) 1999 Dec 14 oscillation frequency VCO 6 Philips Semiconductors Product specification QPSK transmitter SYMBOL PARAMETER TDA8050 CONDITIONS MIN. TYP. MAX. UNIT Converter output Vo output level fi = 30 MHz; Vi(dif) = 100 mV at I and Q inputs 37.5 40 42.5 dBmV ∆Vo output flatness fi = 5 to 40 MHz; Vi(dif) = 100 mV at I and Q inputs − − 2 dB fc output centre frequency 5 − 40 MHz Zo(dif) differential output impedance − 150 − Ω IM3 3rd-order intermodulation distortion see Fig.4 − − −35 dBc H2 2nd-order harmonic of 5 to 40 MHz fi = 10 to 80 MHz; signal Vi(dif) = 100 mV at I and Q inputs − − −45 dBc H3 3rd-order harmonic of 5 to 40 MHz signal fi = 15 to 120 MHz; Vi(dif) = 100 mV at I and Q inputs − − −45 dBc So mixer spurious outputs of 5 to 40 MHz signal fi = 5 to 40 MHz; Vi(dif) = 100 mV at I and Q inputs − − −50 dBc Converter voltage controlled oscillator fosc(min) minimum oscillation frequency − − 145 MHz fosc(max) maximum oscillation frequency 180 − − MHz − 5.6 − kΩ − − 2 dB 32 − − dB − 55 − dBmV Programmable gain and output buffer; note 1 Zi(dif) differential input impedance ∆G output level step size ∆Bufo output level adjust range Vo output level ∆Vo output flatness fi = 5 to 40 MHz; Vi = 30 dBmV sine wave; DAC = 28 − − 2 dB VO(ENL) output controlled enable LOW output buffer on − − 0.8 V Vi = 30 dBmV sine wave; 40 MHz at pin RF_IN and RF_INC; DAC = 0 to 31 VO(ENH) output controlled enable HIGH output buffer off 2.4 − − V ISO disable isolation Vi(dif) = 100 mV; Vo = 55 dBmV; DAC = 28; fi = 40 MHz; OE = 0.5 −35 − − dBc G(max) maximum gain see Fig.5 − 22 − dB Vo(1dB) 1 dB compression point see Fig.5 60 − − dBmV H2 2nd-order harmonic of 5 to 40 MHz see Fig.6 signal fi = 10 to 40 MHz − − −45 dBc fi= 54 to 120 MHz − − −35 dBc 1999 Dec 14 7 Philips Semiconductors Product specification QPSK transmitter SYMBOL H3 TDA8050 PARAMETER 3rd-order harmonic of 5 to 40 MHz signal CONDITIONS MIN. TYP. MAX. UNIT Fig.6 fi = 15 to 40 MHz − − −45 dBc fi = 54 to 120 MHz − − −35 dBc at 10 kHz − −70 − dBc/Hz at 100 kHz − −90 − dBc/Hz Overall; note 1 Φosc phase noise note 2; So spurious signals of 5 to 40 MHz signal fi = 5 to 40 MHz; Vi(dif) = 100 mV at I and Q inputs; Vo = 30 to 55 dBmV − − −50 dBc ISOtot total isolation at I/Q mid-range see Fig.7 − − −65 dBc C/N carrier to noise ratio at final output at 2 MHz from carrier Vi(dif) = 100 mV Vo = 35 to 55 dBmV; fi = 26.5 MHz − 113 − dBc/Hz 4 MHz Crystal oscillator fxtal crystal frequency note 3 1 − Zi input impedance fxtal = 4 MHz 600 1200 − Ω VI(DC) DC input level − 2.9 − V kHz Modulator synthesizer fref(mod) reference frequency − 250 − RDR1 reference divider ratio programmable 4 − 16 ND1 fixed main divider ratio − 1120 − Icp charge-pump current − 0.30 − mA kHz fixed Converter synthesizer fstep frequency step size 50 − 500 RD2 fixed reference divider ratio − 2 − RDR2 reference divider ratio programmable 4 − 160 ND2 fixed main divider ratio − 4 − NDR2 programmable main divider ratio 290 − 3600 see Table 4 see Table 4 Three wire bus VIL LOW-level input voltage − − 0.8 V VIH HIGH-level input voltage 2.4 − − V Lock detect pin Vo(lock) output voltage (lock) − 5 − V Vo(unlock) output voltage (unlock) − 0.02 − V 1999 Dec 14 8 Philips Semiconductors Product specification QPSK transmitter SYMBOL TDA8050 PARAMETER CONDITIONS MIN. TYP. MAX. UNIT Serial control clock fclk clock frequency − 330 − kHz tsu input data to CLK set-up time see Fig.3 − 2 − µs th(CLK) input data to CLK hold time see Fig.3 − 1 − µs td(strt) delay to rising clock edge see Fig.3 − 3 − µs td(stp) delay from last clock edge see Fig.3 − 3 − µs Notes 1. All specification points of the output section and the overall circuit are measured after the 2 : 1 transformer (siemens V944) connected with a load of 75 Ω. 2. Overall phase noise converter: Icp = 0.36 mA; fref = 12.5 kHz; VI(diff) = 100 mV; VO(diff) = 100 mV; VO = 55 dBmV; DAC = 28; fi = 26.5 MHz. 3. Crystal oscillator; the crystal oscillator uses a 4, 2 or 1 MHz crystal in series with a capacitor. The crystal is serial resonant with load a capacitance of 18 to 20 pF. The connection to VCC is preferred but can also be to GND. Notes to the characteristics FCE183 handbook, full pagewidth IF_FILT imbalance LO(sup) measure 2 f i(Q) measure 1 f i(I) frequency The amplitude imbalance and the LO suppression are measured in the spectrum of the signal measured at the output IF_FILT and are defined in the following conditions: Measure 1: I input frequency = 500 kHz. I input level = 400 mV (p-p) sine wave. Unused input as 0 V differential. Measure 2: Q input frequency = 500 kHz. Q input level = 400 mV (p-p) sine wave. Unused input as 0 V differential. Fig.3 Imbalance and LO suppression. 1999 Dec 14 9 Philips Semiconductors Product specification QPSK transmitter TDA8050 handbook, full pagewidth I_IN 50 Ω I_INC 50 Ω 500 kHz 39.1 39.7 RF_OUTC Q_IN Q_INC 300 kHz 39.5 RF_OUT 39.9 40 40.1 40.3 40.5 40.7 f (MHz) FCE184 3rd-order intermodulation distortion; Two tones of 260 mV (p-p) at each I and Q input: –4 -----400 20 V ( av ) = ---------- × 10 = 128 mV ( RMS ) 2 2 sine waves with a total RMS values of 128 mV give: 2 2 × x = 128 128 x = ---------- = 90 mV (RMS) = 260 mV (p-p) and f1 = 300 kHz, 2 f2 = 500 kHz and fRF = 40 MHz. Fig.4 3rd-order intermodulation distortion in I and Q channels (IM3). 1999 Dec 14 10 Philips Semiconductors Product specification QPSK transmitter TDA8050 Siemens V944 handbook, full pagewidth Vo2 50 Ω RF_IN BUF_OUT 150 Ω 75 Ω 9V RF_INC BUF_OUTC 150 Ω gain (dB) Gmax Gmax − 1 Vo(−1 dB) Vo FCE185 DAC = 31. f = 26.5 MHz. Vi is variable to have a variable output voltage. Fig.5 Maximum gain and compression point. Siemens V944 handbook, full pagewidth RF_IN BUF_OUT 150 Ω BUF_OUTC 150 Ω 9V RF_INC 75 Ω FCE186 DAC = 28. fi = 5 to 40 MHz. Vi = 200 mV sine wave. Vo = 55 dBmV (RMS value). Fig.6 Harmonics of output section H2 and H3. 1999 Dec 14 11 Philips Semiconductors Product specification QPSK transmitter handbook, full pagewidth TDA8050 OUTEN = 0 V Siemens V944 Vo1 I_IN Vi(dif) = 100 mV BUF_OUT 150 Ω 9V I_INC BUF_OUTC 75 Ω 150 Ω Q_IN Vi(dif) = 100 mV Q_INC DAC = 28 OUTEN = 5 V Siemens V944 Vo2 I_IN BUF_OUT 150 Ω BUF_OUTC 150 Ω 0V 9V I_INC 75 Ω Q_IN 0V Q_INC DAC = 28 FCE187 ISOtot = Vo1 (dB) − Vo2 (dB). Fig.7 Isolation total. 1999 Dec 14 12 Philips Semiconductors Product specification QPSK transmitter TDA8050 APPLICATION INFORMATION t h(CLK) t su handbook, full pagewidth T cy CLK DATA EN t d(strt) t d(stp) MBL113 Fig.8 3-wire bus timing. Table 1 Data format; note 1 DATA D11 first in D10 D9 D8 Modulator reference divider ratio X X MP1(2) MP0(2) D7 D6 ADDRESS D5 D4 D3 D2 D1 D0 AD1 AD0 last in R3 R2 R1 R0 0 1 DAC2 DAC1 DAC0 1 0 P2 P1 P0 1 1 Converter reference divider ratio R7 R6 R5 R4 Control register X X X OEN(3) CR2(4) CR1 CR0(4) DAC4(5) DAC3 Main divider ratio P11 P10 P9 P8 P7 P6 P5 P4 P3 Notes 1. X = don’t care. 2. MP1 and MP0: modulator reference divider ratio (see Table 2). 3. When OEN (output enable) is at logic 0, output is disabled, at logic 1 output is enabled. 4. CR2 to CR0: converter synthesizer charge pump current (see Table 3). 5. When DAC4 to DAC0 is at logic 0 minimum gain is programmed, at logic 1 maximum gain is programmed. 1999 Dec 14 13 Philips Semiconductors Product specification QPSK transmitter Table 2 Table 3 TDA8050 Modulator reference divider ratio MP1 MP0 PROGRAMMED RATIO 1 1 4 1 0 8 0 1 16 Converter synthesizer charge pump current CR2 CR1 CR0 LOCK_CONV(1) 0 0 0 0 1.2 0 0 0 1 0.36 0 0 1 0 0.36 0 0 1 1 0.1 0 1 0 − 0.1 0 1 1 − 0.36 1 0 0 − 1.2 Icp (mA) Note 1. LOCK_CONV is an internal signal. When at logic 0 converter PLL is out-of-lock. When at logic 1 converter PLL is in-lock. Table 4 Converter synthesizer: fcomp = fosc/RD fosc\fcomp 12.5 kHz 25 kHz 50 kHz 125 kHz 1 MHz 80 40 20 8 4 MHz 320 160 80 32 Table 5 Converter synthesizer; ND = 4; flo = ND × NDR × fcomp = NDR × step flo\step 50 kHz 100 kHz 200 kHz 500 kHz 145 MHz 2900 1450 725 290 180 MHz 3600 1800 900 360 1999 Dec 14 14 Philips Semiconductors Product specification QPSK transmitter handbook, full pagewidth TDA8050 +5 V OUTEN 32 1 SW_CAP 100 pF Siemens V944 150 Ω BUF_OUT 31 2 RF_INC 100 nF +9 V 150 Ω BUF_OUTC 30 3 680 Ω RF_IN 100 nF AGND2 100 nF I_IN 4 29 5 28 AVCC2 47 pF +5 V 390 nH RF_OUT 100 nF 100 Ω 100 nF I_INC 27 6 390 nH 27 pF RF_OUTC 100 nF 100 nF Q_IN 7 26 8 25 AVCC1 +5 V 100 Ω 100 nF Q_INC IF_FILTC 68 nH TDA8050 AGND1 24 9 BB133 (2×) 10 kΩ 140 MHz 15 pF 22 kΩ 10 pF TKAMOD 22 nH TKBMOD 10 kΩ 23 10 LOCK BB132 10 kΩ (2×) 22 11 TKACONV 22 kΩ 370 pF 39 pF CP_MOD 12 21 13 20 22 kΩ 8.2 pF 56 nH 15 pF 330 pF 18 pF IF_FILT TKBCONV 39 pF 10 kΩ 22 kΩ 18 kΩ 8.2 nF DVCC 10 kΩ TUNECONV 330 pF CLK DATA EN 14 19 15 18 17 16 +9 V 100 nF DGND OSC_IN 4 MHz MBK982 Fig.9 Application diagram. 15 27 kΩ 10 nF CP_CONV 18 pF 1999 Dec 14 820 pF Philips Semiconductors Product specification QPSK transmitter TDA8050 INTERNAL PIN CONFIGURATION SYMBOL PIN DESCRIPTION DC VOLTAGE OUTEN 1 − SW_CAP 32 1.7 V 1 32 FCE004 BUF_OUT 2 BUF_OUTC 3 5.8 V 2 5.8 V 3 FCE005 AGND2 4 0 4 FCE023 I_IN 5 2.5 V I_INC 6 2.5 V 5 6 FCE006 1999 Dec 14 16 Philips Semiconductors Product specification QPSK transmitter SYMBOL TDA8050 PIN DESCRIPTION DC VOLTAGE Q_IN 7 2.5 V Q_INC 8 2.5 V 7 8 FCE007 AGND1 9 0V 9 FCE008 TKAMOD 10 3.1 V TKBMOD 11 3.1 V 10 CP_MOD FCE009 12 11 2.1 V 12 FCE010 DVCC 1999 Dec 14 13 supply voltage 5V 17 Philips Semiconductors Product specification QPSK transmitter SYMBOL CLK TDA8050 PIN DESCRIPTION DC VOLTAGE − 14 14 FCE011 DATA − 15 15 FCE012 EN − 16 16 FCE013 OSC_IN 17 2.9 V VCC 17 FCE014 DGND 18 0 18 FCE015 1999 Dec 14 18 Philips Semiconductors Product specification QPSK transmitter SYMBOL CP_CONV TDA8050 PIN DESCRIPTION DC VOLTAGE 19 2.1 V down VCC 19 up FCE016 TUNECONV 20 VVT 20 FCE017 TKBCONV 21 3.1 V TKACONV 22 3.1 V 21 LOCK FCE018 23 0V 5V 23 FCE019 1999 Dec 14 22 19 Philips Semiconductors Product specification QPSK transmitter SYMBOL TDA8050 PIN DESCRIPTION DC VOLTAGE IF_FILT 24 2.1 V IF_FILTC 25 2.1 V 25 24 FCE020 AVCC1 26 RF_OUTC 27 supply voltage 3.7 V 5V RF_OUT 28 3.7 V 28 27 FCE021 AVCC2 29 supply voltage 5V RF_IN 30 2.1 V RF_INC 31 2.1 V 30 31 FCE022 1999 Dec 14 20 Philips Semiconductors Product specification QPSK transmitter TDA8050 PACKAGE OUTLINE SO32: plastic small outline package; 32 leads; body width 7.5 mm SOT287-1 D E A X c y HE v M A Z 17 32 Q A2 A (A 3) A1 pin 1 index θ Lp L 16 1 0 detail X w M bp e 5 10 mm scale DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (1) e HE L Lp Q v w y Z (1) mm 2.65 0.3 0.1 2.45 2.25 0.25 0.49 0.36 0.27 0.18 20.7 20.3 7.6 7.4 1.27 10.65 10.00 1.4 1.1 0.4 1.2 1.0 0.25 0.25 0.1 0.95 0.55 inches 0.10 0.012 0.096 0.004 0.086 0.01 0.02 0.01 0.011 0.007 0.81 0.80 0.30 0.29 0.050 0.419 0.394 0.055 0.043 0.016 0.047 0.039 0.01 0.01 0.004 0.037 0.022 θ 8o 0o Note 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. OUTLINE VERSION REFERENCES IEC JEDEC EIAJ ISSUE DATE 95-01-25 97-05-22 SOT287-1 1999 Dec 14 EUROPEAN PROJECTION 21 Philips Semiconductors Product specification QPSK transmitter TDA8050 • Use a double-wave soldering method comprising a turbulent wave with high upward pressure followed by a smooth laminar wave. SOLDERING Introduction to soldering surface mount packages This text gives a very brief insight to a complex technology. A more in-depth account of soldering ICs can be found in our “Data Handbook IC26; Integrated Circuit Packages” (document order number 9398 652 90011). • For packages with leads on two sides and a pitch (e): – larger than or equal to 1.27 mm, the footprint longitudinal axis is preferred to be parallel to the transport direction of the printed-circuit board; There is no soldering method that is ideal for all surface mount IC packages. Wave soldering is not always suitable for surface mount ICs, or for printed-circuit boards with high population densities. In these situations reflow soldering is often used. – smaller than 1.27 mm, the footprint longitudinal axis must be parallel to the transport direction of the printed-circuit board. The footprint must incorporate solder thieves at the downstream end. • For packages with leads on four sides, the footprint must be placed at a 45° angle to the transport direction of the printed-circuit board. The footprint must incorporate solder thieves downstream and at the side corners. Reflow soldering Reflow soldering requires solder paste (a suspension of fine solder particles, flux and binding agent) to be applied to the printed-circuit board by screen printing, stencilling or pressure-syringe dispensing before package placement. During placement and before soldering, the package must be fixed with a droplet of adhesive. The adhesive can be applied by screen printing, pin transfer or syringe dispensing. The package can be soldered after the adhesive is cured. Several methods exist for reflowing; for example, infrared/convection heating in a conveyor type oven. Throughput times (preheating, soldering and cooling) vary between 100 and 200 seconds depending on heating method. Typical dwell time is 4 seconds at 250 °C. A mildly-activated flux will eliminate the need for removal of corrosive residues in most applications. Typical reflow peak temperatures range from 215 to 250 °C. The top-surface temperature of the packages should preferable be kept below 230 °C. Manual soldering Fix the component by first soldering two diagonally-opposite end leads. Use a low voltage (24 V or less) soldering iron applied to the flat part of the lead. Contact time must be limited to 10 seconds at up to 300 °C. Wave soldering Conventional single wave soldering is not recommended for surface mount devices (SMDs) or printed-circuit boards with a high component density, as solder bridging and non-wetting can present major problems. When using a dedicated tool, all other leads can be soldered in one operation within 2 to 5 seconds between 270 and 320 °C. To overcome these problems the double-wave soldering method was specifically developed. If wave soldering is used the following conditions must be observed for optimal results: 1999 Dec 14 22 Philips Semiconductors Product specification QPSK transmitter TDA8050 Suitability of surface mount IC packages for wave and reflow soldering methods SOLDERING METHOD PACKAGE REFLOW(1) WAVE BGA, SQFP not suitable HLQFP, HSQFP, HSOP, HTSSOP, SMS not PLCC(3), SO, SOJ suitable suitable(2) suitable suitable LQFP, QFP, TQFP SSOP, TSSOP, VSO suitable not recommended(3)(4) suitable not recommended(5) suitable Notes 1. All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the maximum temperature (with respect to time) and body size of the package, there is a risk that internal or external package cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). For details, refer to the Drypack information in the “Data Handbook IC26; Integrated Circuit Packages; Section: Packing Methods”. 2. These packages are not suitable for wave soldering as a solder joint between the printed-circuit board and heatsink (at bottom version) can not be achieved, and as solder may stick to the heatsink (on top version). 3. If wave soldering is considered, then the package must be placed at a 45° angle to the solder wave direction. The package footprint must incorporate solder thieves downstream and at the side corners. 4. Wave soldering is only suitable for LQFP, TQFP and QFP packages with a pitch (e) equal to or larger than 0.8 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.65 mm. 5. Wave soldering is only suitable for SSOP and TSSOP packages with a pitch (e) equal to or larger than 0.65 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm. DEFINITIONS Data sheet status Objective specification This data sheet contains target or goal specifications for product development. Preliminary specification This data sheet contains preliminary data; supplementary data may be published later. Product specification This data sheet contains final product specifications. Limiting values Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Where application information is given, it is advisory and does not form part of the specification. LIFE SUPPORT APPLICATIONS These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale. 1999 Dec 14 23 Philips Semiconductors – a worldwide company Argentina: see South America Australia: 3 Figtree Drive, HOMEBUSH, NSW 2140, Tel. +61 2 9704 8141, Fax. +61 2 9704 8139 Austria: Computerstr. 6, A-1101 WIEN, P.O. Box 213, Tel. +43 1 60 101 1248, Fax. +43 1 60 101 1210 Belarus: Hotel Minsk Business Center, Bld. 3, r. 1211, Volodarski Str. 6, 220050 MINSK, Tel. +375 172 20 0733, Fax. +375 172 20 0773 Belgium: see The Netherlands Brazil: see South America Bulgaria: Philips Bulgaria Ltd., Energoproject, 15th floor, 51 James Bourchier Blvd., 1407 SOFIA, Tel. +359 2 68 9211, Fax. +359 2 68 9102 Canada: PHILIPS SEMICONDUCTORS/COMPONENTS, Tel. +1 800 234 7381, Fax. +1 800 943 0087 China/Hong Kong: 501 Hong Kong Industrial Technology Centre, 72 Tat Chee Avenue, Kowloon Tong, HONG KONG, Tel. +852 2319 7888, Fax. +852 2319 7700 Colombia: see South America Czech Republic: see Austria Denmark: Sydhavnsgade 23, 1780 COPENHAGEN V, Tel. +45 33 29 3333, Fax. +45 33 29 3905 Finland: Sinikalliontie 3, FIN-02630 ESPOO, Tel. +358 9 615 800, Fax. +358 9 6158 0920 France: 51 Rue Carnot, BP317, 92156 SURESNES Cedex, Tel. +33 1 4099 6161, Fax. +33 1 4099 6427 Germany: Hammerbrookstraße 69, D-20097 HAMBURG, Tel. +49 40 2353 60, Fax. +49 40 2353 6300 Hungary: see Austria India: Philips INDIA Ltd, Band Box Building, 2nd floor, 254-D, Dr. Annie Besant Road, Worli, MUMBAI 400 025, Tel. +91 22 493 8541, Fax. +91 22 493 0966 Indonesia: PT Philips Development Corporation, Semiconductors Division, Gedung Philips, Jl. Buncit Raya Kav.99-100, JAKARTA 12510, Tel. +62 21 794 0040 ext. 2501, Fax. +62 21 794 0080 Ireland: Newstead, Clonskeagh, DUBLIN 14, Tel. +353 1 7640 000, Fax. +353 1 7640 200 Israel: RAPAC Electronics, 7 Kehilat Saloniki St, PO Box 18053, TEL AVIV 61180, Tel. +972 3 645 0444, Fax. +972 3 649 1007 Italy: PHILIPS SEMICONDUCTORS, Via Casati, 23 - 20052 MONZA (MI), Tel. +39 039 203 6838, Fax +39 039 203 6800 Japan: Philips Bldg 13-37, Kohnan 2-chome, Minato-ku, TOKYO 108-8507, Tel. +81 3 3740 5130, Fax. +81 3 3740 5057 Korea: Philips House, 260-199 Itaewon-dong, Yongsan-ku, SEOUL, Tel. +82 2 709 1412, Fax. +82 2 709 1415 Malaysia: No. 76 Jalan Universiti, 46200 PETALING JAYA, SELANGOR, Tel. +60 3 750 5214, Fax. +60 3 757 4880 Mexico: 5900 Gateway East, Suite 200, EL PASO, TEXAS 79905, Tel. +9-5 800 234 7381, Fax +9-5 800 943 0087 Middle East: see Italy Netherlands: Postbus 90050, 5600 PB EINDHOVEN, Bldg. VB, Tel. +31 40 27 82785, Fax. +31 40 27 88399 New Zealand: 2 Wagener Place, C.P.O. Box 1041, AUCKLAND, Tel. +64 9 849 4160, Fax. +64 9 849 7811 Norway: Box 1, Manglerud 0612, OSLO, Tel. +47 22 74 8000, Fax. +47 22 74 8341 Pakistan: see Singapore Philippines: Philips Semiconductors Philippines Inc., 106 Valero St. Salcedo Village, P.O. Box 2108 MCC, MAKATI, Metro MANILA, Tel. +63 2 816 6380, Fax. +63 2 817 3474 Poland: Al.Jerozolimskie 195 B, 02-222 WARSAW, Tel. +48 22 5710 000, Fax. +48 22 5710 001 Portugal: see Spain Romania: see Italy Russia: Philips Russia, Ul. Usatcheva 35A, 119048 MOSCOW, Tel. +7 095 755 6918, Fax. +7 095 755 6919 Singapore: Lorong 1, Toa Payoh, SINGAPORE 319762, Tel. +65 350 2538, Fax. +65 251 6500 Slovakia: see Austria Slovenia: see Italy South Africa: S.A. PHILIPS Pty Ltd., 195-215 Main Road Martindale, 2092 JOHANNESBURG, P.O. Box 58088 Newville 2114, Tel. +27 11 471 5401, Fax. +27 11 471 5398 South America: Al. Vicente Pinzon, 173, 6th floor, 04547-130 SÃO PAULO, SP, Brazil, Tel. +55 11 821 2333, Fax. +55 11 821 2382 Spain: Balmes 22, 08007 BARCELONA, Tel. +34 93 301 6312, Fax. +34 93 301 4107 Sweden: Kottbygatan 7, Akalla, S-16485 STOCKHOLM, Tel. +46 8 5985 2000, Fax. +46 8 5985 2745 Switzerland: Allmendstrasse 140, CH-8027 ZÜRICH, Tel. +41 1 488 2741 Fax. +41 1 488 3263 Taiwan: Philips Semiconductors, 6F, No. 96, Chien Kuo N. Rd., Sec. 1, TAIPEI, Taiwan Tel. +886 2 2134 2886, Fax. +886 2 2134 2874 Thailand: PHILIPS ELECTRONICS (THAILAND) Ltd., 209/2 Sanpavuth-Bangna Road Prakanong, BANGKOK 10260, Tel. +66 2 745 4090, Fax. +66 2 398 0793 Turkey: Yukari Dudullu, Org. San. Blg., 2.Cad. Nr. 28 81260 Umraniye, ISTANBUL, Tel. +90 216 522 1500, Fax. +90 216 522 1813 Ukraine: PHILIPS UKRAINE, 4 Patrice Lumumba str., Building B, Floor 7, 252042 KIEV, Tel. +380 44 264 2776, Fax. +380 44 268 0461 United Kingdom: Philips Semiconductors Ltd., 276 Bath Road, Hayes, MIDDLESEX UB3 5BX, Tel. +44 208 730 5000, Fax. +44 208 754 8421 United States: 811 East Arques Avenue, SUNNYVALE, CA 94088-3409, Tel. +1 800 234 7381, Fax. +1 800 943 0087 Uruguay: see South America Vietnam: see Singapore Yugoslavia: PHILIPS, Trg N. Pasica 5/v, 11000 BEOGRAD, Tel. +381 11 62 5344, Fax.+381 11 63 5777 For all other countries apply to: Philips Semiconductors, International Marketing & Sales Communications, Building BE-p, P.O. Box 218, 5600 MD EINDHOVEN, The Netherlands, Fax. +31 40 27 24825 Internet: http://www.semiconductors.philips.com SCA 68 © Philips Electronics N.V. 1999 All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights. Printed in The Netherlands 545004/25/04/pp24 Date of release: 1999 Dec 14 Document order number: 9397 750 06555