INTEGRATED CIRCUITS DATA SHEET UMA1022M Low cost dual frequency synthesizer for radio telephones Product specification Supersedes data of 1998 May 15 File under Integrated Circuits, IC17 1998 Dec 09 Philips Semiconductors Product specification Low cost dual frequency synthesizer for radio telephones UMA1022M The synthesizers operate at RF input frequencies up to 2.1 GHz and 550 MHz. All divider ratios are supplied via a 3-wire serial programming bus. The reference divider uses a common, fully programmable part and a separate subdivider section. In this way the comparison frequencies are related to each other allowing optimum isolation between charge pump pulses. FEATURES • Low phase noise • Low current from 3 V supply • Fully programmable dividers • 3-line serial interface bus • Input reference buffer configurable as an oscillator with external crystal resonator Separate power and ground pins are provided to the analog (charge pump, prescaler) and digital (CMOS) circuits. An independent supply for the crystal oscillator section allows maximum frequency stability. The ground leads should be externally short-circuited to prevent large currents flowing across the die and thus causing damage. VDD and VDDX must be at the same potential. VCCA and VCCB must be equal to each other and equal to or greater than VDD (e.g. VDD = 3 V and VCCA = 5.5 V for wider VCO control voltage range). • Wide compliance voltage charge pump outputs • Two power-down input control pins. APPLICATIONS • 900 MHz and 2 GHz digital radio telephones • Portable battery-powered radio equipment. The charge pump currents (phase detector gain) are fixed by internal resistances and controlled by the serial interface. Only passive loop filters are necessary; the charge pumps function within a wide voltage compliance range to improve the overall system performance. GENERAL DESCRIPTION The UMA1022M BICMOS device integrates prescalers, programmable dividers, a crystal oscillator/buffer and phase comparators to implement two phase-locked loops. The device is designed to operate from 3 NiCd or a single LiIon cell in pocket phones, or from an external 3 V supply. Suitable pin layout is chosen to minimize coupling and interference between signals entering or leaving the chip. QUICK REFERENCE DATA SYMBOL VDD PARAMETER digital supply voltage VCCA, VCCB analog supply voltages CONDITIONS MIN. TYP. MAX. UNIT VCCA = VCCB ≥ VDD 2.7 3.0 5.5 V VCCA = VCCB ≥ VDD 2.7 3.0 5.5 V 2.7 3.0 5.5 V XON = 0 − 14.65 − mA XON = 1 VDDX crystal reference supply voltage VDDX = VDD Itot all supply currents (IDD + ICCA + ICCB + IDDX) in active mode E = 1; VCCA = VCCB = 3.0 V; VDDX = VDD = 3.0 V − 15.9 − mA Itot(pd) total supply currents in power-down mode − 40 − µA fRF RF input frequency 300 − 2100 MHz fIF IF input frequency VCCA = VCCB ≤ 4.0 V 50 − 550 MHz 50 − 400 MHz fxtal crystal reference oscillator frequency 3 − 20 MHz fPCmax maximum loop comparison frequency − 2000 − kHz Tamb operating ambient temperature −30 − +85 °C 1998 Dec 09 2 Philips Semiconductors Product specification Low cost dual frequency synthesizer for radio telephones UMA1022M ORDERING INFORMATION PACKAGE TYPE NUMBER NAME UMA1022M DESCRIPTION SSOP20 VERSION plastic shrink small outline package; 20 leads; body width 4.4 mm SOT266-1 BLOCK DIAGRAM CPA handbook, full pagewidth VCCA 17 RFA 16 AGND 14 15 RF CHARGE PUMP UMA1022M XOUT VDDX XIN XOUT 13 12 RF PRESCALER AND DIVIDER RF PHASE DETECTOR RF DIVIDER LATCH 18 11 19 20 1 XIN XGND VDD ONA COMMON REFERENCE DIVIDER MUX REFERENCE SUBDIVIDER MUX REFERENCE DIVIDER LATCH SERIAL BUS 10 9 2 3 IF PHASE DETECTOR IF DIVIDER LATCH IF PRESCALER AND DIVIDER IF CHARGE PUMP 4 5 6 CPB VCCB IFB 7 8 MGE627 ONB Fig.1 Block diagram. 1998 Dec 09 3 DGND CLK DATA E Philips Semiconductors Product specification Low cost dual frequency synthesizer for radio telephones UMA1022M PINNING SYMBOL PIN DESCRIPTION XIN 1 inverting crystal reference input XGND 2 ground for crystal oscillator circuits XOUT 3 crystal oscillator buffer output CPB 4 IF synthesizer charge pump output VCCB 5 analog supply to IF synthesizer IFB 6 IF VCO main divider input ONB 7 IF power-on input; ONB = HIGH means IF synthesizer is active DGND 8 digital circuits ground E 9 programming bus enable input DATA 10 programming bus data input CLK 11 programming bus clock input VDD 12 digital circuits supply voltage ONA 13 RF power-on input; ONA = HIGH means RF synthesizer is active AGND 14 analog circuits ground RFA 15 RF VCO main divider input VCCA 16 analog supply to RF synthesizer CPA 17 RF synthesizer charge pump output XOUT 18 inverting oscillator buffer output VDDX 19 supply voltage to crystal oscillator circuits XIN 20 non-inverting crystal reference input 1998 Dec 09 handbook, halfpage XIN 1 20 XIN XGND 2 19 VDDX XOUT 3 18 XOUT CPB 4 17 CPA VCCB 5 IFB 6 15 RFA ONB 7 14 AGND DGND 8 13 ONA E 9 12 VDD UMA1022M 16 VCCA 11 CLK DATA 10 MGE626 Fig.2 Pin configuration. 4 Philips Semiconductors Product specification Low cost dual frequency synthesizer for radio telephones UMA1022M FUNCTIONAL DESCRIPTION Phase comparators Main dividers The phase detectors are driven by the output edges selected by the main and reference dividers. Each generates lead and lag signals to control the appropriate charge pump. The pumps output current pulses appear at pins CPA (RF synthesizer) and CPB (IF synthesizer). The current pulse duration is at least equal to the difference in time of arrival of the edges from the two dividers. If the main divider edge arrives first, CPA or CPB sink current. If the reference divider edge arrives first, CPA or CPB source current. For correct PLL operation the VCOs need to have a positive frequency/voltage control slope. The main dividers are clocked at pin RFA by the RF oscillator signal and at pin IFB by the IF oscillator signal. The inputs are AC coupled through external capacitors. Input impedances are high, dominated by parasitic package capacitances, so matching is off-chip. The sensitive dividers operate with signal levels from 35 to 225 mV (RMS), at frequencies up to 2.1 GHz (RF part) and up to 550 MHz (IF part). Both include programmable bipolar prescalers followed by CMOS counters. The RF main divider allows programmable ratios from 512 to 65535; the IF blocks accept values between 128 and 16383. The currents at CPA and CPB are programmed via the serial bus as multiples of an internally-set reference current. The passage into power-down mode is synchronized with respect to the phase detector to prevent output current pulses being interrupted. Additional circuitry is included to ensure that the gain of the phase comparators remains linear even for small phase errors. Crystal oscillator A fully differential low-noise amplifier/buffer is integrated providing outputs to drive other circuits, and to build a crystal oscillator; only needed are an external resonance circuit and tuning elements (temperature compensation). A bus controlled power-down mode disables the low-noise amplifier to reduce current if not needed. Serial programming bus A simple 3-line unidirectional serial bus is used to program the circuit. The 3 lines are DATA, clock (CLK) and enable (E). The data sent to the device is loaded in bursts framed by E. Programming clock edges and their appropriate data bits are ignored until E goes active LOW. The programmed information is loaded into the addressed latch when E returns HIGH. During normal operation, E should be kept HIGH. Only the last 19 bits serially clocked into the device are retained within the programming register. The normal differential input pins drive a clock buffer to provide edges to the programmable reference divider at frequencies up to 20 MHz. The inputs are AC coupled through external capacitors, and operate with signals down to 35 mV (RMS) and up to 0.5 V (RMS). Various crystal oscillator structures can be built using the amplifier. By coupling one output back to the appropriate input through the resonator, and decoupling the other input to ground, the second output becomes available to deliver the reference frequency to other circuits. Additional leading bits are ignored, and no check is made on the number of clock pulses. The NMOS-rich design uses virtually no current when the bus is inactive; power-up is initiated when enable is taken LOW, and power-down occurs a short time after enable returns HIGH. Bus activity is allowed when either synthesizer is active or in power-down (ONA and ONB inputs LOW) mode. Fully static CMOS registers retain programmed data whatever the power-down state, as long as the supply voltage is present. Reference dividers A first common divider circuit produces an output frequency for RF or IF synthesizer phase comparison, depending on the P/A bit. It drives a second independent divider, which delivers the reference edge to the IF or RF synthesizer phase comparator. When P/A is logic 1, the output of the subdivider is connected to the RF phase comparator, whereas the output of the common divider is connected to the IF phase detector. The phase comparators run at related frequencies with a controlled phase difference to avoid interference when in-lock. The common 10-bit section permits divide ratios from 8 to 1023; the second subdivider allows phase comparison frequency ratios between 1 and 16. Table 2 indicates how to program the corresponding bits to get the wanted ratio. 1998 Dec 09 5 Philips Semiconductors Product specification Low cost dual frequency synthesizer for radio telephones UMA1022M Data format Power-down mode The leading bits (dt15 to dt0) make up the data field, while the trailing three bits (ad2 to ad0) comprise an address field. The UMA1022M uses 4 of the 8 available addresses. The data format is shown in Table 1. The first bit entered is dt15, the last bit is ad0. For the divider ratios, the first bits entered (P0 and R0) are the Least Significant Bits (LSB). This is different from previous Philips synthesizers. The RF and IF synthesizers are on when respectively the input signal ONA and ONB are HIGH. When turned on, the dividers and phase detector are synchronized to avoid random phase errors. When turned off, the phase detector is synchronized to avoid interrupting charge pump pulses. The UMA1022M has a very low current consumption in the power-down mode. The trailing address bits are decoded on the rising edge of E. This produces an internal load pulse to store the data in the addressed latch. To avoid erroneous divider ratios, the load pulse is not allowed during data reads by the frequency dividers. This condition is guaranteed by respecting a minimum E pulse width after data transfer.The test register bits should not normally be programmed active (HIGH); normal operation requires them set LOW. When the supply voltage is established an internal power-up initialization pulse is generated to preconfigure the circuit state. Production testing does not verify that all bits are preconfigured correctly. Table 1 Bit allocation; note 1 FIRST IN REGISTER BIT ALLOCATION LAST IN DATA FIELD dt15 dt14 dt13 dt12 dt11 dt10 Test bits(2) CPI P0(6) X X S/D dt9 XON(3) ADDRESS dt8 dt7 dt6 dt5 X X X X dt4 P/A(4) dt3 dt2 dt1 X X X A0(6) X X X ad2 ad1 ad0 0 1 1 P15 0 0 0 R9 0 0 1 A13 0 1 0 REFDIV2(5) RF synthesizer main divider coefficient R0(6) dt0 reference divider coefficient IF synthesizer main divider coefficient Notes 1. X = don’t care. 2. The test bits (at address 011) should not be programmed with any other value except all zeros for normal operation. 3. Bit XON = power-on of crystal oscillator low-noise amplifier; logic 1 turns on circuit block. 4. Bit P/A = 1 selects the output of the reference subdivider to the RF synthesizer and the output of the common reference divider to the IF synthesizer. 5. The coefficient REFDIV2 (4 bits) selects the phase comparison ratio (1 to 16) between IF and RF synthesizers (see Table 2). 6. P0 is the LSB of the RF main divider coefficient; R0 is the LSB of the reference divider coefficient; A0 is the LSB of the IF main divider. 1998 Dec 09 6 Philips Semiconductors Product specification Low cost dual frequency synthesizer for radio telephones Table 2 UMA1022M Programming the coefficient REFDIV2 for reference subdivider dt3 (LSB) dt2 dt1 dt0 (MSB) REFDIV2 0 0 0 0 1 1 0 0 0 2 0 1 0 0 3 1 1 0 0 4 0 0 1 0 5 1 0 1 0 6 0 1 1 0 7 1 1 1 0 8 0 0 0 1 9 1 0 0 1 10 0 1 0 1 11 1 1 0 1 12 0 0 1 1 13 1 0 1 1 14 0 1 1 1 15 1 1 1 1 16 Table 3 RF and IF synthesizer nominal charge pump currents (gain) 1998 Dec 09 CPI SINGLE/DOUBLE ICPA (µA) ICPB (µA) 0 0 470 470 0 1 840 840 1 0 1410 470 1 1 2480 840 7 Philips Semiconductors Product specification Low cost dual frequency synthesizer for radio telephones UMA1022M LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 134). SYMBOL PARAMETER MIN. MAX. UNIT VDD, VDDX digital and crystal reference supply voltages −0.3 +5.5 V VCCA, VCCB analog charge pump supply voltages −0.3 +5.5 V VC − VD difference in voltage between analog and digital supplies −0.3 +5.5 V Vn voltage at pins 7, 9, 10, 11 and 13 −0.3 VDD + 0.3 V at pins 1, 3, and 20 −0.3 VDDX + 0.3 V at pins 4 and 6 −0.3 VCCB + 0.3 V at pins 15 and 17 −0.3 VCCA + 0.3 V ∆VGND difference in voltage between any of DGND, AGND and XGND (these pins should be connected together) −0.3 +0.3 V Ptot total power dissipation − 120 mW Tstg IC storage temperature −55 +125 °C Tamb operating ambient temperature −30 +85 °C Tj(max) maximum junction temperature − 150 °C HANDLING All pins withstand class 1 ESD test in accordance with “EIA/JESD22-A114-A” electrostatic discharge (ESD) sensitivity testing Human Body Model (HBM). THERMAL CHARACTERISTICS SYMBOL Rth j-a 1998 Dec 09 PARAMETER CONDITIONS thermal resistance from junction to ambient 8 in free air VALUE UNIT 120 K/W Philips Semiconductors Product specification Low cost dual frequency synthesizer for radio telephones UMA1022M CHARACTERISTICS All values refer to the typical measurement circuit; Tamb = 25 °C; VDD = VDDX = 2.7 to 5.5 V; VCCA = VCCB = 2.7 to 5.5 V; VCCA = VCCB ≥ VDD; unless otherwise specified. Characteristics for which only a typical value is given are not tested. SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT Supplies; pins 5, 12, 16 and 19 VDD, VDDX digital and crystal reference supply voltages VDD = VDDX; VCCA = VCCB ≥ VDD 2.7 3.0 5.5 V VCCA, VCCB charge pump supply voltages VCCA = VCCB ≥ VDD 2.7 3.0 5.5 V IDD synthesizer digital supply current VDD = 3 V; E = 1; ONA and ONB = 1 − 1.5 2.1 mA IDDX1 reference block supply current VDDX = 3 V; XON = 0 − 0.25 0.4 mA IDDX2 crystal oscillator and buffer currents VDDX = 3 V; XON = 1 − 1.5 1.8 mA ICCA RF synthesizer charge pump and prescaler supply currents VCCA = 3 V; ONA and ONB = 1 − 8.1 9.8 mA ICCB IF synthesizer charge pump and prescaler supply currents VCCB = 3 V; ONA and ONB = 1 − 4.8 5.7 mA Itot(pd) total supply currents E = VDD; CLK and (ICCA(pd) + IDD(pd) + ICCB(pd) + IDDX(pd)) DATA = 0 V or VDD; in power-down mode ONA and ONB = 0; XON = 0 − 40 80 µA 300 − 2100 MHz fRF = 600 to 2100 MHz 35 − 225 mV fRF = 300 to 600 MHz 70 − 225 mV 512 − 65535 − 60 − Ω − 2 − pF RF main divider input; pin 15 fRF RF input frequency VRF(rms) AC-coupled input signal level (RMS value) Rm main divider ratio Zi input impedance (real part) Ci pin input capacitance fRF = 2 GHz IF main divider input; pin 6 fIF VIF(rms) IF input frequency AC-coupled input signal level (RMS value) Rm main divider ratio Zi input impedance (real part) Ci pin input capacitance 1998 Dec 09 VCCA = VCCB ≤ 4.0 V 50 − 550 MHz 50 − 400 MHz 35 − 225 mV fIF = 100 to 150 MHz 50 − 225 mV fIF = 50 to 100 MHz 100 − 225 mV 128 − 16383 fIF = 150 to 550 MHz fIF = 400 MHz 9 − 60 − Ω − 2 − pF Philips Semiconductors Product specification Low cost dual frequency synthesizer for radio telephones SYMBOL PARAMETER UMA1022M CONDITIONS MIN. TYP. MAX. UNIT Synthesizers reference divider input; pins 1 and 20 fxtal crystal reference oscillator frequency Vxtal(rms) sinusoidal input signal level between pins 1 and 20 (RMS value) 3 − 20 MHz fxtal = 6 to 20 MHz 35 − 250 mV fxtal = 3 to 6 MHz 70 − 250 mV fxtal = 6 to 20 MHz 70 − 500 mV fxtal = 3 to 6 MHz mV single-ended; differential; 140 − 500 Rrefc common reference division ratio 8 − 1023 Rrefa reference subdivider division ratio 1 − 16 Zi input impedance (real part) per pin fxtal = 10 MHz; XON = 1 − 4 − kΩ − 2 − pF − 4.5 − dB − 2000 − Ci typical pin input capacitance NF small signal differential input noise figure matched to a 4 kΩ source; XON = 1 Phase detectors fPCmax maximum loop comparison frequency kHz Charge pump outputs; pins 4 and 17 VCPA output voltage compliance range; RF synthesizer 0.4 − VCCA − 0.4 V VCPB output voltage compliance range; IF synthesizer 0.4 − VCCB − 0.4 V Iocp(err) charge pump output current error −25 − +25 % Imatch sink-to-source current matching − ±5 − % ILcp charge pump off leakage current −5 ±1 +5 nA note 1 VCPA = 1⁄2VCCA; VCPB = 1⁄2VCCB Phase noise N900 RF synthesizer’s contribution to fxtal = 13 MHz; close-in phase noise of 0.9 GHz VCO Vxtal = 0 dBm; signal inside closed-loop bandwidth fPC = 200 kHz − −86 − dBc/Hz N1800 RF synthesizer’s contribution to fxtal = 13 MHz; close-in phase noise of 1.8 GHz VCO Vxtal = 0 dBm; signal inside closed-loop bandwidth fPC = 200 kHz − −80 − dBc/Hz N180 IF synthesizer’s contribution 180 MHz VCO signal inside closed-loop bandwidth − −104 − dBc/Hz 1998 Dec 09 fxtal = 13 MHz; Vxtal = 0 dBm; fPC = 1000 kHz 10 Philips Semiconductors Product specification Low cost dual frequency synthesizer for radio telephones SYMBOL PARAMETER UMA1022M CONDITIONS MIN. TYP. MAX. UNIT Interface logic input signal levels; pins 7, 9, 10, 11 and 13 VIH HIGH-level input voltage 0.7VDD − VDD + 0.3 V VIL LOW-level input voltage −0.3 − 0.3VDD V Ibias input bias current −5 − +5 µA Ci input capacitance − 2 − pF − 2 − kΩ − 2.29 − V 20 22 dB 2 − V logic 1 or logic 0 Low noise crystal oscillator amplifier output signals; pins 3 and 18 Zo differential output impedance (real part) fxtal = 10 MHz VXOUT, VXOUTN DC output voltage Gv(diff) small signal differential voltage gain XON = 1; fxtal = 10 MHz 18 Vo(p-p) limiting differential output voltage swing (peak-to-peak value) XON = 1 ∆f/f(VDDX) frequency stability as a function of VDDX = 3 V ±5%; note 2 − supply voltage change (referenced to initial frequency) − ±0.25 − ppm System specification FTRFIF RF frequency and close harmonics feedthrough to IF frequency note 3 − 70 − dBc FTIFRF IF frequency and close harmonics feedthrough to RF frequency note 3 − 50 − dBc Notes 1. Conditions: 0.4 < VCPA < (VCCA − 0.4) and 0.4 < VCPB < (VCCB − 0.4). 2. This value is directly dependent on the external resonator quality factor. Only guaranteed for the application circuit which is given in Fig.5. 3. Only guaranteed on the Philips application board. 1998 Dec 09 11 Philips Semiconductors Product specification Low cost dual frequency synthesizer for radio telephones UMA1022M SERIAL BUS TIMING CHARACTERISTICS VDD = VDDX = VCCA = VCCB = 3 V; Tamb = 25 °C; unless otherwise specified. SYMBOL PARAMETER MIN. TYP. MAX. UNIT Serial programming clock; CLK tr input rise time − 10 40 ns tf input fall time − 10 40 ns Tcy clock period 100 − − ns Enable programming; E tSTART delay to rising clock edge 100 − − ns tEND delay from last falling clock edge 20 − − ns tW(min) minimum inactive pulse width 1500(1) − − ns tSU;E enable set-up time to next clock edge 20 − − ns Register serial input data; DATA tSU;DAT input data to clock set-up time 20 − − ns tHD;DAT input data to clock hold time 20 − − ns Note 1. The minimum pulse width (tW(min)) can be smaller than 1.5 µs when the following conditions are fulfilled: 383 a) Main divider input frequency f RF > ---------------t W(min) 3 b) Reference divider input frequency f xtal > ---------------t W(min) tSU;DAT handbook, full pagewidth tHD;DAT tf Tcy tEND tSU;E tr CLK DATA LSB MSB ADDRESS E tSTART tW(min) MGE628 Fig.3 Serial bus timing diagram. 1998 Dec 09 12 Philips Semiconductors Product specification Low cost dual frequency synthesizer for radio telephones UMA1022M AC TIMING CHARACTERISTICS VDD = VDDX = VCCA = VCCB = 3 V; Tamb = 25 °C; unless otherwise specified. SYMBOL PARAMETER tPUP delay for initial power-up MIN. − TYP. MAX. − 400 UNIT µs tPDWN time for power-down from E = 0 (ONA/ONB = 0) − 100 − µs tSTART time to turn-on either the RF or IF synthesizer from ONA/ONB − 50 − µs tEND time to turn-off either the RF or IF synthesizer from ONA/ONB − 70 − µs tSEND waiting time before sending data on the serial bus 15000 − − µs handbook, full pagewidth VDD = VCCA = VCCB tSTART tPUP Itot tEND tPDWN ONA = '1' or ONB = '1' E MGE631 tSEND Fig.4 AC timing characteristics. 1998 Dec 09 13 Philips Semiconductors Product specification Low cost dual frequency synthesizer for radio telephones UMA1022M APPLICATION INFORMATION analog supply handbook, full pagewidth 12 Ω 100 nF VCO supply XIN VCO supply XIN 15 pF XGND 100 nF crystal clock 4.7 µF XOUT CPB 2 19 3 18 4 17 VDDX 12 Ω 100 nF 13 MHz 15 pF XOUT 4.7 µF CPA (1) (1) (1) (1) analog supply 12 Ω VCCB 5 100 nF 18 Ω 18 Ω 18 Ω 20 15 pF 12 Ω IF VCO 1 16 VCCA 6 digital supply 15 56 pF 1 kΩ ONB 7 (1) 14 18 Ω 18 Ω RFA 56 pF 56 Ω (1) analog supply 100 nF UMA1022M IFB 12 Ω 56 Ω 18 Ω AGND IF RF DGND E 13 8 9 12 ONA 1 kΩ VDD 12 Ω 100 nF DATA 1 kΩ 1 kΩ 10 11 CLK 1 kΩ 3-wire bus (1) Loop filter values depend on the application. Fig.5 Typical test and application diagram. 1998 Dec 09 RF VCO 14 digital supply MGE630 Philips Semiconductors Product specification Low cost dual frequency synthesizer for radio telephones handbook, full pagewidth power amplifier UMA1022M transmit data RF PLL VOLTAGE CONTROLLED OSCILLATOR SPLITTER transmit mixer LOW-PASS FILTER RF MAIN DIVIDER UMA1022M duplex filter OSCILLATOR crystal clock REFERENCE DIVIDER IF MAIN DIVIDER VOLTAGE CONTROLLED OSCILLATOR SPLITTER RF PHASE COMPARATOR AND CHARGE PUMP 3-wire bus IF PHASE COMPARATOR AND CHARGE PUMP LOW-PASS FILTER MGE629 band-pass filter IF filter IF PLL to demodulation low noise amplifier first mixer second mixer Fig.6 Application block diagram. 1998 Dec 09 15 Philips Semiconductors Product specification Low cost dual frequency synthesizer for radio telephones UMA1022M PACKAGE OUTLINE SSOP20: plastic shrink small outline package; 20 leads; body width 4.4 mm D SOT266-1 E A X c y HE v M A Z 11 20 Q A2 A (A 3) A1 pin 1 index θ Lp L 1 10 detail X w M bp e 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (1) e HE L Lp Q v w y Z (1) θ mm 1.5 0.15 0 1.4 1.2 0.25 0.32 0.20 0.20 0.13 6.6 6.4 4.5 4.3 0.65 6.6 6.2 1.0 0.75 0.45 0.65 0.45 0.2 0.13 0.1 0.48 0.18 10 0o Note 1. Plastic or metal protrusions of 0.20 mm maximum per side are not included. OUTLINE VERSION REFERENCES IEC JEDEC EIAJ ISSUE DATE 90-04-05 95-02-25 SOT266-1 1998 Dec 09 EUROPEAN PROJECTION 16 o Philips Semiconductors Product specification Low cost dual frequency synthesizer for radio telephones • Use a double-wave soldering method comprising a turbulent wave with high upward pressure followed by a smooth laminar wave. SOLDERING Introduction to soldering surface mount packages • For packages with leads on two sides and a pitch (e): This text gives a very brief insight to a complex technology. A more in-depth account of soldering ICs can be found in our “Data Handbook IC26; Integrated Circuit Packages” (document order number 9398 652 90011). – larger than or equal to 1.27 mm, the footprint longitudinal axis is preferred to be parallel to the transport direction of the printed-circuit board; There is no soldering method that is ideal for all surface mount IC packages. Wave soldering is not always suitable for surface mount ICs, or for printed-circuit boards with high population densities. In these situations reflow soldering is often used. – smaller than 1.27 mm, the footprint longitudinal axis must be parallel to the transport direction of the printed-circuit board. The footprint must incorporate solder thieves at the downstream end. • For packages with leads on four sides, the footprint must be placed at a 45° angle to the transport direction of the printed-circuit board. The footprint must incorporate solder thieves downstream and at the side corners. Reflow soldering Reflow soldering requires solder paste (a suspension of fine solder particles, flux and binding agent) to be applied to the printed-circuit board by screen printing, stencilling or pressure-syringe dispensing before package placement. During placement and before soldering, the package must be fixed with a droplet of adhesive. The adhesive can be applied by screen printing, pin transfer or syringe dispensing. The package can be soldered after the adhesive is cured. Several methods exist for reflowing; for example, infrared/convection heating in a conveyor type oven. Throughput times (preheating, soldering and cooling) vary between 100 and 200 seconds depending on heating method. Typical dwell time is 4 seconds at 250 °C. A mildly-activated flux will eliminate the need for removal of corrosive residues in most applications. Typical reflow peak temperatures range from 215 to 250 °C. The top-surface temperature of the packages should preferable be kept below 230 °C. Manual soldering Fix the component by first soldering two diagonally-opposite end leads. Use a low voltage (24 V or less) soldering iron applied to the flat part of the lead. Contact time must be limited to 10 seconds at up to 300 °C. Wave soldering Conventional single wave soldering is not recommended for surface mount devices (SMDs) or printed-circuit boards with a high component density, as solder bridging and non-wetting can present major problems. When using a dedicated tool, all other leads can be soldered in one operation within 2 to 5 seconds between 270 and 320 °C. To overcome these problems the double-wave soldering method was specifically developed. If wave soldering is used the following conditions must be observed for optimal results: 1998 Dec 09 UMA1022M 17 Philips Semiconductors Product specification Low cost dual frequency synthesizer for radio telephones UMA1022M Suitability of surface mount IC packages for wave and reflow soldering methods SOLDERING METHOD PACKAGE REFLOW(1) WAVE BGA, SQFP not suitable HLQFP, HSQFP, HSOP, HTSSOP, SMS not PLCC(3), SO, SOJ suitable suitable(2) suitable suitable suitable LQFP, QFP, TQFP not recommended(3)(4) suitable SSOP, TSSOP, VSO not recommended(5) suitable Notes 1. All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the maximum temperature (with respect to time) and body size of the package, there is a risk that internal or external package cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). For details, refer to the Drypack information in the “Data Handbook IC26; Integrated Circuit Packages; Section: Packing Methods”. 2. These packages are not suitable for wave soldering as a solder joint between the printed-circuit board and heatsink (at bottom version) can not be achieved, and as solder may stick to the heatsink (on top version). 3. If wave soldering is considered, then the package must be placed at a 45° angle to the solder wave direction. The package footprint must incorporate solder thieves downstream and at the side corners. 4. Wave soldering is only suitable for LQFP, TQFP and QFP packages with a pitch (e) equal to or larger than 0.8 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.65 mm. 5. Wave soldering is only suitable for SSOP and TSSOP packages with a pitch (e) equal to or larger than 0.65 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm. DEFINITIONS Data sheet status Objective specification This data sheet contains target or goal specifications for product development. Preliminary specification This data sheet contains preliminary data; supplementary data may be published later. Product specification This data sheet contains final product specifications. Limiting values Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Where application information is given, it is advisory and does not form part of the specification. LIFE SUPPORT APPLICATIONS These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale. 1998 Dec 09 18 Philips Semiconductors Product specification Low cost dual frequency synthesizer for radio telephones NOTES 1998 Dec 09 19 UMA1022M Philips Semiconductors – a worldwide company Argentina: see South America Australia: 34 Waterloo Road, NORTH RYDE, NSW 2113, Tel. +61 2 9805 4455, Fax. +61 2 9805 4466 Austria: Computerstr. 6, A-1101 WIEN, P.O. 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No. 5, 80640 GÜLTEPE/ISTANBUL, Tel. +90 212 279 2770, Fax. +90 212 282 6707 Ukraine: PHILIPS UKRAINE, 4 Patrice Lumumba str., Building B, Floor 7, 252042 KIEV, Tel. +380 44 264 2776, Fax. +380 44 268 0461 United Kingdom: Philips Semiconductors Ltd., 276 Bath Road, Hayes, MIDDLESEX UB3 5BX, Tel. +44 181 730 5000, Fax. +44 181 754 8421 United States: 811 East Arques Avenue, SUNNYVALE, CA 94088-3409, Tel. +1 800 234 7381 Uruguay: see South America Vietnam: see Singapore Yugoslavia: PHILIPS, Trg N. Pasica 5/v, 11000 BEOGRAD, Tel. +381 11 625 344, Fax.+381 11 635 777 For all other countries apply to: Philips Semiconductors, International Marketing & Sales Communications, Building BE-p, P.O. Box 218, 5600 MD EINDHOVEN, The Netherlands, Fax. +31 40 27 24825 Internet: http://www.semiconductors.philips.com © Philips Electronics N.V. 1998 SCA60 All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights. Printed in The Netherlands 435102/750/04/pp20 Date of release: 1998 Dec 09 Document order number: 9397 750 04825