TI TPS62260DDCR

TPS62260, TPS62261
TPS62262, TPS62263
www.ti.com
SLVS763B – JUNE 2007 – REVISED FEBRUARY 2008
2.25 MHz 600 mA Step Down Converter in 2x2SON/TSOT-23 Package
FEATURES
1
• High Efficiency Step Down Converter
• Output Current up to 600 mA
• Wide VIN Range from 2 V to 6 V for Li-Ion
Batteries with Extended Voltage Range
• 2.25 MHz Fixed Frequency Operation
• Power Save Mode at Light Load Currents
• Output Voltage Accuracy in PWM mode ±1.5%
• Typ. 15 µA Quiescent Current
• 100% Duty Cycle for Lowest Dropout
• Soft Start
• Voltage Positioning at Light Loads
• Available in a small 2×2×0,8mm SON and
TSOT-23 package
• Allows <1mm Solution Height
2
APPLICATIONS
PDAs, Pocket PCs
Low Power DSP Supply
Portable Media Players
POL applications
The TPS62260 device is a high efficient synchronous
step down dc-dc converter optimized for battery
powered applications. It provides up to 600-mA
output current from a single Li-Ion cell and is ideal to
power mobile phones and other portable applications.
With an wide input voltage range of 2 V to 6 V, the
device supports applications powered by Li-Ion
batteries with extended voltage range, two and three
cell alkaline batteries, 3.3 V and 5 V input voltage
rails.
The TPS62260 operates at 2.25 MHz fixed switching
frequency and enters Power Save Mode operation at
light load currents to maintain high efficiency over the
entire load current range.
The Power Save Mode is optimized for low output
voltage ripple. For low noise applications, the device
can be forced into fixed frequency PWM mode by
pulling the MODE pin high. In the shutdown mode,
the current consumption is reduced to less than 1µA.
TPS62260 allows the use of small inductors and
capacitors to achieve a small solution size.
The TPS62260 is available in a very small 2×2 6 pin
SON and TSOT-23 5 pin package.
VIN = 2V to 6V
TPS62260DRV
VIN
CIN
L
2.2 mH
SW
R1
EN
4.7 mF
GND
MODE
C1
22 pF
Up to 600mA
VOUT
100
VIN = 2.3 V
90 VIN = 2.7 V
COUT
80 VIN = 3 V
10 mF
FB
VIN = 3.6 V
70
R2
Efficiency - %
•
•
•
•
DESCRIPTION
VIN = 4.5 V
60
50
40
VOUT = 1.8 V,
MODE = GND,
L = 2.2 mH,
DCR 110 mR
30
20
10
0
0.01
0.1
1
10
100
IO - Output Current -
1000
1
2
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PowerPAD is a trademark of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2007–2008, Texas Instruments Incorporated
TPS62260, TPS62261
TPS62262, TPS62263
www.ti.com
SLVS763B – JUNE 2007 – REVISED FEBRUARY 2008
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
ORDERING INFORMATION
TA
–40°C to 85°C
(1)
(2)
(3)
PART
NUMBER (1)
OUTPUT
VOLTAGE (2)
PACKAGE (3)
PACKAGE
DESIGNATOR
ORDERING
PACKAGE
MARKING
TPS62260
adjustable
SON 2x2-6
DRV
TPS62260DRV
BYK
TPS62261
1.8V fix
TSOT-23 5
DDC
TPS62260DDC
BYP
SON 2x2-6
DRV
TPS62261DRV
TPS62262
BYL
1.2V fix
SON 2x2-6
DRV
TPS62262DRV
BYM
TPS62263
2.5V fix
SON 2x2-6
DRV
TPS62263DRV
CFX
The DRV (2x2-6 SON) and DDC (TSOT-23-5) packages are available in tape on reel. Add R suffix to order quantities of 3000 parts per
reel.
Contact TI for other fixed output voltage options
For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
website at www.ti.com.
ABSOLUTE MAXIMUM RATINGS
over operating free-air temperature range (unless otherwise noted) (1)
VALUE
Input voltage range (2)
UNIT
–0.3 to 7
–0.3 to VIN +0.3, ≤ 7
Voltage range at EN, MODE
Voltage on SW
V
–0.3 to 7
Peak output current
Internally limited
ESD rating (3)
HBM Human body model
2
CDM Charge device model
1
Machine model
A
kV
200
V
TJ
Maximum operating junction temperature
–40 to 125
°C
Tstg
Storage temperature range
–65 to 150
°C
(1)
(2)
(3)
Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only and functional operation of the device at these or any other conditions beyond those indicated under recommended operating
conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
All voltage values are with respect to network ground terminal.
The human body model is a 100-pF capacitor discharged through a 1.5-kΩ resistor into each pin. The machine model is a 200-pF
capacitor discharged directly into each pin.
DISSIPATION RATINGS
PACKAGE
RθJA
POWER RATING FOR TA ≤ 25°C
DERATING FACTOR ABOVE TA = 25°C
DRV
76°C/W
1300 mW
13 mW/°C
DDC
250/°C
400 mW
4 mW/°C
RECOMMENDED OPERATING CONDITIONS
MIN
VIN
NOM
MAX
UNIT
2
6
Output voltage range for adjustable voltage
0.6
VIN
V
TA
Operating ambient temperature
–40
85
°C
TJ
Operating junction temperature
–40
125
°C
2
Supply voltage
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V
Copyright © 2007–2008, Texas Instruments Incorporated
Product Folder Link(s): TPS62260 TPS62261 TPS62262 TPS62263
TPS62260, TPS62261
TPS62262, TPS62263
www.ti.com
SLVS763B – JUNE 2007 – REVISED FEBRUARY 2008
ELECTRICAL CHARACTERISTICS
Over full operating ambient temperature range, typical values are at TA = 25°C. Unless otherwise noted, specifications apply
for condition VIN = EN = 3.6V. External components CIN = 4.7µF 0603, COUT = 10µF 0603, L = 2.2µH, see the parameter
measurement information.
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
SUPPLY
VIN
Input voltage range
IOUT
2.3
Output current
6
VIN 2.5 V to 6 V
600
VIN 2.3 V to 2.5 V
300
VIN 2 V to 2.3 V
150
IOUT = 0 mA, PFM mode enabled
(MODE = GND) device not switching
IQ
Operating quiescent current
ISD
Shutdown current
UVLO
Undervoltage lockout threshold
V
mA
15
µA
IOUT = 0 mA, PFM mode enabled
(MODE = GND) device switching, VOUT = 1.8 V,
See (1)
18.5
IOUT = 0 mA, switching with no load
(MODE = VIN), PWM operation, VOUT = 1.8 V,
VIN = 3 V
3.8
EN = GND
0.1
Falling
1.85
Rising
1.95
mA
1
µA
V
ENABLE, MODE
VIH
High level input voltage, EN,
MODE
2 V ≤ VIN ≤ 6 V
1
VIN
VIL
Low level input voltage, EN,
MODE
2 V ≤ VIN ≤ 6 V
0
0.4
IIN
Input bias current, EN, MODE
EN, MODE = GND or VIN
0.01
1
240
480
185
380
1
1.2
V
V
µA
POWER SWITCH
RDS(on)
ILIMF
TSD
High side MOSFET on-resistance
Low side MOSFET on-resistance
VIN = VGS = 3.6 V, TA = 25°C
Forward current limit MOSFET
high-side and low side
VIN = VGS = 3.6 V
Thermal shutdown
Increasing junction temperature
140
Thermal shutdown hysteresis
Decreasing junction temperature
20
0.8
mΩ
A
°C
OSCILLATOR
fSW
2 V ≤ VIN ≤ 6 V
Oscillator frequency
2
2.25
2.5
MHz
OUTPUT
VOUT
Adjustable output voltage range
Vref
Reference voltage
0.6
VIN
600
V
mV
Feedback voltage PWM Mode
MODE = VIN, PWM operation, for fixed output
voltage versions VFB = VOUT,
2.5 V ≤ VIN ≤ 6 V, 0 mA ≤ IOUT ≤ 600 mA (2)
Feedback voltage PFM mode
MODE = GND, device in PFM mode, voltage
positioning active (1)
1%
Load regulation
PWM Mode
-0.5
%/A
tStart Up
Start-up time
Time from active EN to reach 95% of VOUT
nominal
500
µs
tRamp
VOUT ramp up time
Time to ramp from 5% to 95% of VOUT
Ilkg
Leakage current into SW pin
VIN = 3.6 V, VIN = VOUT = VSW, EN = GND
VFB
(1)
(2)
(3)
–1.5%
0%
1.5%
µs
250
(3)
0.1
1
µA
In PFM mode, the internal reference voltage is set to typ. 1.01×Vref. See the parameter measurement information.
For VIN = VO + 0.6 V
In fixed output voltage versions, the internal resistor divider network is disconnected from FB pin.
Copyright © 2007–2008, Texas Instruments Incorporated
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TPS62260, TPS62261
TPS62262, TPS62263
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SLVS763B – JUNE 2007 – REVISED FEBRUARY 2008
PIN ASSIGNMENTS
DRV PACKAGE
(TOP VIEW)
DDC PACKAGE
(TOP VIEW)
VIN
GND
EN
SW
5
1
1
SW
MODE
FB
2
3
FB
4
3
2
we
Po
6
AD
P
5
r
4
GND
VIN
EN
TERMINAL FUNCTIONS
TERMINAL
NO.
SON
2x2-6
NO.
TSOT23-5
I/O
VIN
5
1
PWR
VIN power supply pin.
GND
6
2
PWR
GND supply pin
EN
4
3
I
SW
1
5
OUT
FB
3
4
I
Feedback Pin for the internal regulation loop. Connect the external resistor divider to this pin.
In case of fixed output voltage option, connect this pin directly to the output capacitor
MODE
2
I
This pin is only available at SON package option. MODE pin = high forces the device to
operate in fixed frequency PWM mode. MODE pin = low enables the Power Save Mode with
automatic transition from PFM mode to fixed frequency PWM mode.
NAME
DESCRIPTION
This is the enable pin of the device. Pulling this pin to low forces the device into shutdown
mode. Pulling this pin to high enables the device. This pin must be terminated.
This is the switch pin and is connected to the internal MOSFET switches. Connect the
external inductor between this terminal and the output capacitor.
FUNCTIONAL BLOCK DIAGRAM
VIN
Current
Limit Comparator
VIN
Undervoltage
Lockout 1.8V
Thermal
Shutdown
Limit
High Side
EN
PFM Comp.
+1% Voltage positioning
Reference
0.6V VREF
FB
VREF +1%
Only in 2x2SON
Mode
MODE
Softstart
VOUT RAMP
CONTROL
Control
Stage
Error Amp .
Gate Driver
Anti
Shoot-Through
SW1
VREF
Integrator
FB
FB
Zero-Pole
AMP.
PWM
Comp.
Limit
Low Side
RI 1
RI3
RI..N
Sawtooth
Generator
Int. Resistor
Network
GND
Current
Limit Comparator
2.25 MHz
Oscillator
GND
4
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Copyright © 2007–2008, Texas Instruments Incorporated
Product Folder Link(s): TPS62260 TPS62261 TPS62262 TPS62263
TPS62260, TPS62261
TPS62262, TPS62263
www.ti.com
SLVS763B – JUNE 2007 – REVISED FEBRUARY 2008
PARAMETER MEASUREMENT INFORMATION
TPS62260DVR
V IN
CIN
L
2.2 mH
SW
R1
EN
4.7 mF
GND
VOUT
C1
22 pF
COUT
10 mF
FB
R2
MODE
L: LPS3015 2.2 mH, 110 mW
CIN GRM188R60J475K 4.7 mF Murata 0603 size
COUT GRM188R60J106M 10 mF Murata 0603 size
TYPICAL CHARACTERISTICS
Table of Graphs
FIGURE
η
Efficiency
Output Voltage Accuracy
Typical Operation
Mode Transition
Output Current VOUT = 1.8 V, Power Save Mode, MODE = GND
Figure 1
Output Current VOUT = 1.8 V, PWM Mode, MODE = VIN
Figure 2
Output Current VOUT = 3.3 V, PWM Mode, MODE = VIN
Figure 3
Output Current VOUT = 3.3 V, Power Save Mode, MODE = GND
Figure 4
Output Current
Figure 5
Output Current
Figure 6
at 25°C, VOUT = 1.8 V, Power Save Mode, MODE = GND
Figure 7
at –40°C, VOUT = 1.8 V, Power Save Mode, MODE = GND
Figure 8
at 85°C, VOUT = 1.8 V, Power Save Mode, MODE = GND
Figure 9
at 25°C, VOUT = 1.8 V, PWM Mode, MODE = VIN
Figure 10
at –40°C, VOUT = 1.8 V, PWM Mode, MODE = VIN
Figure 11
at 85°C, VOUT = 1.8 V, PWM Mode, MODE = VIN
Figure 12
PWM Mode, VOUT = 1.8 V
Figure 13
MODE Pin Transition From PFM to Forced PWM Mode at light load
Figure 14
MODE Pin Transition From Forced PWM to PFM Mode at light load
Figure 15
Start-up Timing
Figure 16
Load Transient
Line Transient
Typical Operation
Shutdown Current into VIN
Forced PWM Mode , VOUT = 1.5 V, 50 mA to 200 mA
Figure 17
Forced PWM Mode , VOUT = 1.5 V, 200 mA to 400 mA
Figure 18
PFM Mode to PWM Mode, VOUT = 1.5 V, 150 µA to 400 mA
Figure 19
PWM Mode to PFM Mode, VOUT = 1.5 V, 400 mA to 150 µA
Figure 20
PFM Mode, VOUT = 1.5 V, 1.5 mA to 50 mA
Figure 21
PFM Mode, VOUT = 1.5 V, 50 mA to 1.5 mA
Figure 22
PFM Mode to PWM Mode, VOUT = 1.8 V, 50 mA to 250 mA
Figure 23
PFM Mode to PWM Mode, VOUT = 1.5 V, 50 mA to 400 mA
Figure 24
PWM Mode to PFM Mode, VOUT = 1.5 V, 400 mA to 50 mA
Figure 25
PFM Mode, VOUT = 1.8 V, 50 mA
Figure 26
PFM Mode, VOUT = 1.8 V, 250 mA
Figure 27
PFM VOUT Ripple, VOUT = 1.8 V, 10 mA, L = 2.2µH, COUT = 10µF
Figure 28
PFM VOUT Ripple, VOUT = 1.8 V, 10 mA, L = 4.7µH, COUT = 10µF
Figure 29
vs Input Voltage, (TA = 85°C, TA = 25°C, TA = -40°C)
Figure 30
Copyright © 2007–2008, Texas Instruments Incorporated
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TPS62260, TPS62261
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SLVS763B – JUNE 2007 – REVISED FEBRUARY 2008
TYPICAL CHARACTERISTICS (continued)
Table of Graphs (continued)
FIGURE
Quiescent Current
vs Input Voltage, (TA = 85°C, TA = 25°C, TA = -40°C)
Static Drain Source On-State
Resistance
vs Input Voltage, (TA = 85°C, TA = 25°C, TA = -40°C)
EFFICIENCY (Power Save Mode)
vs
OUTPUT CURRENT
100
90
VIN = 3.6 V
h - Efficiency - %
Efficiency - %
70
VIN = 4.5 V
50
40
30
20
10
VIN = 2.7 V
70
VIN = 3 V
60
VIN = 4.5 V
50
40
20
VOUT = 1.8 V,
MODE = VIN,
10
L = 2.2 mH
0
0.1
1
10
100
1000
1
10
100
IO - Output Current - mA
IO - Output Current - mA
Figure 2.
EFFICIENCY (PWM Mode)
vs
OUTPUT CURRENT
EFFICIENCY (Power Save Mode)
vs
OUTPUT CURRENT
100
VIN = 4.2 V
80
VIN = 4.5 V
50
40
VOUT = 3.3 V,
MODE = VIN,
30
20
10
10
100
IO - Output Current - mA
Figure 3.
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VIN = 4.5 V
60
50
40
VOUT = 3.3 V,
MODE = GND,
L = 2.2 mH,
DCR 110 mW,
CO = 10 mF 0603
20
10
0
6
VIN = 5 V
30
L = 2.2 mH,
DCR 110 mW,
CO = 10 mF 0603
1
VIN = 3.6 V
70
VIN = 5 V
60
VIN = 4.2 V
80
h - Efficiency - %
h - Efficiency - %
90
VIN = 3.6 V
70
1000
Figure 1.
100
90
VIN = 3.6 V
30
VOUT = 1.8 V,
MODE = GND,
L = 2.2 mH,
DCR 110 mR
0
0.01
VIN = 2.3 V
80
VIN = 3 V
60
Figure 33
100
VIN = 2.7 V
80
Figure 32
EFFICIENCY (PWM Mode)
vs
OUTPUT CURRENT
VIN = 2.3 V
90
Figure 31
1000
0
0.01
0.1
1
10
100
1000
IO - Output Current - mA
Figure 4.
Copyright © 2007–2008, Texas Instruments Incorporated
Product Folder Link(s): TPS62260 TPS62261 TPS62262 TPS62263
TPS62260, TPS62261
TPS62262, TPS62263
www.ti.com
SLVS763B – JUNE 2007 – REVISED FEBRUARY 2008
EFFICIENCY
vs
OUTPUT CURRENT
EFFICIENCY
vs
OUTPUT CURRENT
100
100
90 VI = 2.3 V
90
VI = 2.7 V
Efficiency − %
70
80
VI = 2.3 V
60
VI = 4.5 V
50
VI = 3.6 V
40
30
20
100
VI = 2.7 V
40
VO = 1.2 V,
MODE = GND,
L = 2 mH,
MIPSA2520
CO = 10 mF 0603
10
0
0.01
0
10
50
20
L = 2 mH,
MIPSA2520
CO = 10 mF 0603
10
VI = 3.6 V
60
30
VO = 1.2 V,
MODE = VI,
1
VI = 4.5 V
70
VI = 2.3 V
Efficiency − %
80
1000
0.1
IO − Output Current − mA
1
Figure 5.
100
1000
Figure 6.
1.88
OUTPUT VOLTAGE ACCURACY (Power Save Mode)
vs
OUTPUT CURRENT
1.88
1.86
1.86
PFM Mode, Voltage Positioning
1.84
1.82
1.8
1.78
1.76
TA = 25°C,
VOUT = 1.8 V,
MODE = GND,
L = 2.2 mH,
CO = 10 mF
1.74
0.01
0.1
VIN = 2.3 V
VIN = 2.7 V
VIN = 3 V
VIN = 3.6 V
VIN = 4.5 V
PWM
Mode
VO - Output Voltage DC - V
OUTPUT VOLTAGE ACCURACY
vs
OUTPUT CURRENT
VO - Output Voltage DC - V
10
IO − Output Current − mA
PFM Mode, Voltage Positioning
1.84
1.82
1.8
1.78
1.76
1
10
IO - Output Current - mA
Figure 7.
Copyright © 2007–2008, Texas Instruments Incorporated
100
1000
TA = -40°C,
VOUT = 1.8 V,
MODE = GND,
L = 2.2 mH,
CO = 10 mF
1.74
0.01
0.1
VIN = 2.3 V
VIN = 2.7 V
VIN = 3 V
VIN = 3.6 V
VIN = 4.5 V
1
10
PWM
Mode
100
1000
IO - Output Current - mA
Figure 8.
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TPS62262, TPS62263
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SLVS763B – JUNE 2007 – REVISED FEBRUARY 2008
OUTPUT VOLTAGE ACCURACY (Power Save Mode)
vs
OUTPUT CURRENT
1.88
OUTPUT VOLTAGE ACCURACY (PWM Mode)
vs
OUTPUT CURRENT
1.854
1.836
PFM Mode, Voltage Positioning
1.84
1.82
1.8
1.78
1.76
TA = 85°C,
VOUT = 1.8 V,
MODE = GND,
L = 2.2 mH,
CO = 10 mF
1.74
0.01
0.1
VIN = 2 V
VIN = 2.7 V
VIN = 3 V
VIN = 3.6 V
VIN = 4.5 V
PWM
Mode
VO - Output Voltage DC - V
VO - Output Voltage DC - V
1.86
TA = 25°C,
VOUT = 1.8 V,
MODE = VIN,
L = 2.2 mH
1.818
1.8
VIN = 2.3 V
VIN = 2.7 V
VIN = 3 V
VIN = 3.6 V
VIN = 4.5 V
1.782
1.764
1
10
100
1.746
0.01
1000
0.1
IO - Output Current - mA
1000
IO - Output Current - mA
OUTPUT VOLTAGE ACCURACY (PWM Mode)
vs
OUTPUT CURRENT
OUTPUT VOLTAGE ACCURACY (PWM Mode)
vs
OUTPUT CURRENT
1.854
TA = -40°C,
VOUT = 1.8 V,
MODE = VIN,
1.836
VO - Output Voltage DC - V
VO - Output Voltage DC - V
100
Figure 10.
L = 2.2 mH
1.818
1.8
VIN = 2 V
VIN = 2.7 V
VIN = 3 V
VIN = 3.6 V
VIN = 4.5 V
1.782
1.764
1.746
0.01
0.1
1
TA = 85°C,
VOUT = 1.8 V,
MODE = VIN,
L = 2.2 mH
1.818
1.8
VIN = 2.3 V
VIN = 2.7 V
VIN = 3 V
VIN = 3.6 V
VIN = 4.5 V
1.782
1.764
10
IO - Output Current - mA
Figure 11.
8
10
Figure 9.
1.854
1.836
1
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100
1000
1.746
0.01
0.1
1
10
100
1000
IO - Output Current - mA
Figure 12.
Copyright © 2007–2008, Texas Instruments Incorporated
Product Folder Link(s): TPS62260 TPS62261 TPS62262 TPS62263
TPS62260, TPS62261
TPS62262, TPS62263
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SLVS763B – JUNE 2007 – REVISED FEBRUARY 2008
MODE PIN TRANSITION FROM PFM
TO FORCED PWM MODE AT LIGHT LOAD
TYPICAL OPERATION (PWM Mode)
VIN 3.6V
VOUT 1.8V, IOUT 150mA
L 2.2mH, COUT 10mF 0603
VOUT 10 mV/Div
VIN = 3.6 V
VOUT = 1.8 V
IOUT = 10 mA
MODE
2V/Div
SW 2 V/Div
SW
2V/Div
PFM Mode
Forced PWM Mode
ICOIL 200 mA/Div
Icoil
200mA/Div
Time Base - 10 ms/Div
Time Base - 1 ms/Div
Figure 13.
Figure 14.
MODE PIN TRANSITION FROM PWM
TO PFM MODE AT LIGHT LOAD
START-UP TIMING
MODE
2 V/Div
VIN = 3.6 V
VOUT = 1.8 V
IOUT = 10 mA
SW
2 V/Div
EN 2 V/Div
VIN = 3.6 V
RLoad = 10 Ω
VOUT = 1.8 V
IIN into CIN
MODE = GND
SW 2 V/Div
PFM Mode
Forced PWM Mode
VOUT 2 V/Div
ICOIL
200 mA/Div
IIN 100 mA/Div
Time Base - 2.5 ms/Div
Figure 15.
Copyright © 2007–2008, Texas Instruments Incorporated
Time Base - 100 ms/Div
Figure 16.
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SLVS763B – JUNE 2007 – REVISED FEBRUARY 2008
LOAD TRANSIENT
(Forced PWM Mode)
VIN 3.6 V
VOUT 1.5 V
IOUT 50 mA to 200 mA
MODE = VIN
VOUT 50 mV/Div
LOAD TRANSIENT
(Forced PWM Mode)
VIN 3.6 V
VOUT 1.5 V
IOUT 200 mA to 400 mA
VOUT 50 mV/Div
IOUT 200 mA/Div
400 mA
200 mA
IOUT 200 mA/Div
ICOIL 500 mA/Div
ICOIL 500 mA/Div
Time Base - 20 ms/Div
Time Base - 20 ms/Div
Figure 17.
Figure 18.
LOAD TRANSIENT
(Forced PFM Mode To PWM Mode)
LOAD TRANSIENT
(Forced PWM Mode To PFM Mode)
SW 2 V/Div
SW 2 V/Div
VOUT 50mV/Div
VIN 3.6 V
VOUT 1.5 V
IOUT 150 mA to 400 mA
MODE = GND
IOUT 500 mA/Div
400 mA
VIN 3.6 V
VOUT 1.5 V
IOUT 150 mA to 400 mA
MODE = GND
VOUT 50 mV/Div
400 mA
IOUT 500 mA/Div
150 mA
150 mA
ICOIL500 mA/Div
ICOILl 500mA/Div
Time Base - 500 ms/Div
Figure 19.
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Time Base - 500 ms/Div
Figure 20.
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TPS62262, TPS62263
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SLVS763B – JUNE 2007 – REVISED FEBRUARY 2008
LOAD TRANSIENT (PFM Mode)
LOAD TRANSIENT (PFM Mode)
SW 2 V/Div
VIN 3.6 V
VOUT 1.5 V
IOUT 1.5 mA to 50 mA
MODE = GND
SW 2V/Div
VIN 3.6 V
VOUT 1.5 V
IOUT 50 mA to 1.5mA
MODE = GND
VOUT 50 mV/Div
VOUT 50mV/Div
50 mA
50 mA
IOUT 50 mA/Div
IOUT 50 mA/Div
1.5 mA
1.5 mA
ICOIL 500 mA/Div
ICOIL 500 mA/Div
Time Base - 50 ms/Div
Time Base - 50 ms/Div
Figure 21.
Figure 22.
LOAD TRANSIENT
(PFM Mode To PWM Mode)
LOAD TRANSIENT
(PFM Mode To PWM Mode)
SW 2 V/Div
SW 2 V/Div
VIN 3.6 V
VOUT 1.5 V
IOUT 50 mA to 400 mA
MODE = GND
VOUT 50 mV/Div
VIN 3.6 V
VOUT 1.8 V
IOUT 50 mA to 250 mA
MODE = GND
VOUT 50 mV/Div
250 mA
IOUT 200 mA/Div
50 mA
PWM Mode
PFM Mode
400 mA
IOUT 500 mA/Div
50 mA
ICOIL 500 mA/Div
ICOIL 500mA/Div
Time Base - 20 ms/Div
Figure 23.
Copyright © 2007–2008, Texas Instruments Incorporated
Time Base - 20 ms/Div
Figure 24.
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SLVS763B – JUNE 2007 – REVISED FEBRUARY 2008
LOAD TRANSIENT
(PWM Mode To PFM Mode)
LINE TRANSIENT (PFM Mode)
SW 2 V/Div
VIN 3.6V to 4.2V
500 mV/Div
VIN 3.6 V
VOUT 1.5 V
IOUT 50 mA to 400 mA
MODE = GND
VOUT 50 mV/Div
PFM Mode
PWM Mode
400 mA
IOUT 500 mA/Div
50 mA
VOUT = 1.8 V
50 mV/Div
IOUT = 50 mA
MODE = GND
ICOIL 500 mA/Div
Time Base - 20 ms/Div
Time Base - 100 ms/Div
Figure 25.
Figure 26.
LINE TRANSIENT (PWM Mode)
TYPICAL OPERATION (PFM Mode)
VOUT 20 mV/Div
VIN 3.6V to 4.2V
500 mV/Div
VIN 3.6 V
VOUT 1.8 V, IOUT 10 mA
L 2.2 mH, COUT 10 mF
SW 2 V/Div
VOUT = 1.8 V
50 mV/Div
IOUT = 250 mA
MODE = GND
ICOIL 200 mA/Div
Time Base - 100ms/Div
Figure 27.
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Time Base - 10 ms/Div
Figure 28.
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SLVS763B – JUNE 2007 – REVISED FEBRUARY 2008
SHUTDOWN CURRENT INTO VIN
vs
INPUT VOLTAGE
TYPICAL OPERATION (PFM Mode)
0.8
VIN 3.6 V; VOUT 1.8 V, IOUT 10 mA,
L = 4.7 mH, COUT = 10 mF 0603,
MODE = GND
EN = GND
ISD - Shutdown Current Into VIN − mA
VOUT 20 mV/Div
SW 2 V/Div
ICOIL200 mA/Div
Time Base - 2 ms/Div
0.7
0.6
o
TA = 85 C
0.5
0.4
0.3
0.2
o
o
TA = 25 C
TA = -40 C
0.1
0
2
2.5
3
3.5
4
4.5
5
5.5
6
VIN − Input Voltage − V
Figure 29.
Figure 30.
20
MODE = GND,
EN = VIN,
Device Not Switching
IQ - Quiescent Current − mA
18
o
TA = 85 C
16
TA = 25oC
14
12
TA = -40oC
10
8
2
2.5
3
3.5
4
4.5
VIN − Input Voltage − V
Figure 31.
Copyright © 2007–2008, Texas Instruments Incorporated
5
5.5
6
RDS(on) - Static Drain-Source On-State Resistance − W
QUIESCENT CURRENT
vs
INPUT VOLTAGE
STATIC DRAIN-SOURCE ON-STATE RESISTANCE
vs
INPUT VOLTAGE
0.8
High Side Switching
0.7
0.6
o
TA = 85 C
0.5
o
TA = 25 C
0.4
0.3
0.2
TA = -40oC
0.1
0
2
2.5
3
3.5
4
4.5
5
VIN − Input Voltage − V
Figure 32.
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RDS(on) - Static Drain-Source On-State Resistance − W
SLVS763B – JUNE 2007 – REVISED FEBRUARY 2008
STATIC DRAIN-SOURCE ON-STATE RESISTANCE
vs
INPUT VOLTAGE
0.4
Low Side Switching
0.35
0.3
o
TA = 85 C
0.25
o
TA = 25 C
0.2
0.15
0.1
TA = -40oC
0.05
0
2
2.5
3
3.5
4
4.5
5
VIN − Input Voltage − V
Figure 33.
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SLVS763B – JUNE 2007 – REVISED FEBRUARY 2008
DETAILED DESCRIPTION
OPERATION
The TPS62260 step down converter operates with typically 2.25 MHz fixed frequency pulse width modulation
(PWM) at moderate to heavy load currents. At light load currents the converter can automatically enter Power
Save Mode and operates then in PFM mode.
During PWM operation the converter use a unique fast response voltage mode control scheme with input voltage
feed-forward to achieve good line and load regulation allowing the use of small ceramic input and output
capacitors. At the beginning of each clock cycle initiated by the clock signal, the High Side MOSFET switch is
turned on. The current flows now from the input capacitor via the High Side MOSFET switch through the inductor
to the output capacitor and load. During this phase, the current ramps up until the PWM comparator trips and the
control logic will turn off the switch. The current limit comparator will also turn off the switch in case the current
limit of the High Side MOSFET switch is exceeded. After a dead time preventing shoot through current, the Low
Side MOSFET rectifier is turned on and the inductor current will ramp down. The current flows now from the
inductor to the output capacitor and to the load. It returns back to the inductor through the Low Side MOSFET
rectifier.
The next cycle will be initiated by the clock signal again turning off the Low Side MOSFET rectifier and turning on
the on the High Side MOSFET switch.
POWER SAVE MODE
The Power Save Mode is enabled with MODE Pin set to low level. If the load current decreases, the converter
will enter Power Save Mode operation automatically. During Power Save Mode the converter skips switching and
operates with reduced frequency in PFM mode with a minimum quiescent current to maintain high efficiency. The
converter will position the output voltage typically +1% above the nominal output voltage. This voltage positioning
feature minimizes voltage drops caused by a sudden load step.
The transition from PWM mode to PFM mode occurs once the inductor current in the Low Side MOSFET switch
becomes zero, which indicates discontinuous conduction mode.
During the Power Save Mode the output voltage is monitored with a PFM comparator. As the output voltage falls
below the PFM comparator threshold of VOUT nominal +1%, the device starts a PFM current pulse. The High
Side MOSFET switch will turn on, and the inductor current ramps up. After the On-time expires, the switch is
turned off and the Low Side MOSFET switch is turned on until the inductor current becomes zero.
The converter effectively delivers a current to the output capacitor and the load. If the load is below the delivered
current, the output voltage will rise. If the output voltage is equal or higher than the PFM comparator threshold,
the device stops switching and enters a sleep mode with typical 15µA current consumption.
If the output voltage is still below the PFM comparator threshold, a sequence of further PFM current pulses are
generated until the PFM comparator threshold is reached. The converter starts switching again once the output
voltage drops below the PFM comparator threshold.
With a fast single threshold comparator, the output voltage ripple during PFM mode operation can be kept small.
The PFM Pulse is time controlled, which allows to modify the charge transferred to the output capacitor by the
value of the inductor. The resulting PFM output voltage ripple and PFM frequency depend in first order on the
size of the output capacitor and the inductor value. Increasing output capacitor values and inductor values will
minimize the output ripple. The PFM frequency decreases with smaller inductor values and increases with larger
values.
The PFM mode is left and PWM mode entered in case the output current can not longer be supported in PFM
mode. The Power Save Mode can be disabled through the MODE pin set to high. The converter will then operate
in fixed frequency PWM mode.
Dynamic Voltage Positioning
This feature reduces the voltage under/overshoots at load steps from light to heavy load and vice versa. It is
active in Power Save Mode and regulates the output voltage 1% higher than the nominal value. This provides
more headroom for both the voltage drop at a load step, and the voltage increase at a load throw-off.
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SLVS763B – JUNE 2007 – REVISED FEBRUARY 2008
Output voltage
Voltage Positioning
Vout +1%
PFM Comparator
threshold
Light load
PFM Mode
Vout (PWM)
moderate to heavy load
PWM Mode
Figure 34. Power Save Mode Operation with automatic Mode transition
100% Duty Cycle Low Dropout Operation
The device starts to enter 100% duty cycle mode once the input voltage comes close to the nominal output
voltage. In order to maintain the output voltage, the High Side MOSFET switch is turned on 100% for one or
more cycles.
With further decreasing VIN the High Side MOSFET switch is turned on completely. In this case the converter
offers a low input-to-output voltage difference. This is particularly useful in battery-powered applications to
achieve longest operation time by taking full advantage of the whole battery voltage range.
The minimum input voltage to maintain regulation depends on the load current and output voltage, and can be
calculated as:
VINmin = VOmax + IOmax × (RDS(on)max + RL)
With:
IOmax = maximum output current plus inductor ripple current
RDS(on)max = maximum P-channel switch RDSon.
RL = DC resistance of the inductor
VOmax = nominal output voltage plus maximum output voltage tolerance
Undervoltage Lockout
The undervoltage lockout circuit prevents the device from malfunctioning at low input voltages and from
excessive discharge of the battery and disables the output stage of the converter. The undervoltage lockout
threshold is typically 1.85V with falling VIN.
MODE SELECTION
The MODE pin allows mode selection between forced PWM mode and Power Save Mode.
Connecting this pin to GND enables the Power Save Mode with automatic transition between PWM and PFM
mode. Pulling the MODE pin high forces the converter to operate in fixed frequency PWM mode even at light
load currents. This allows simple filtering of the switching frequency for noise sensitive applications. In this mode,
the efficiency is lower compared to the power save mode during light loads.
The condition of the MODE pin can be changed during operation and allows efficient power management by
adjusting the operation mode of the converter to the specific system requirements.
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SLVS763B – JUNE 2007 – REVISED FEBRUARY 2008
ENABLE
The device is enabled setting EN pin to high. During the start up time tStart Up the internal circuits are settled and
the soft start circuit is activated. The EN input can be used to control power sequencing in a system with various
DC/DC converters. The EN pin can be connected to the output of another converter, to drive the EN pin high and
getting a sequencing of supply rails. With EN = GND, the device enters shutdown mode in which all internal
circuits are disabled. In fixed output voltage versions, the internal resistor divider network is then disconnected
from FB pin.
SOFT START
The TPS62260 has an internal soft start circuit that controls the ramp up of the output voltage. The output
voltage ramps up from 5% to 95% of its nominal value within typical 250µs. This limits the inrush current in the
converter during ramp up and prevents possible input voltage drops when a battery or high impedance power
source is used. The soft start circuit is enabled within the start up time tStart Up.
SHORT-CIRCUIT PROTECTION
The High Side and Low Side MOSFET switches are short-circuit protected with maximum switch current = ILIMF.
The current in the switches is monitored by current limit comparators. Once the current in the High Side
MOSFET switch exceeds the threshold of it's current limit comparator, it turns off and the Low Side MOSFET
switch is activated to ramp down the current in the inductor and High Side MOSFET switch. The High Side
MOSFET switch can only turn on again, once the current in the Low Side MOSFET switch has decreased below
the threshold of its current limit comparator.
THERMAL SHUTDOWN
As soon as the junction temperature, TJ, exceeds 140°C (typical) the device goes into thermal shutdown. In this
mode, the High Side and Low Side MOSFETs are turned-off. The device continues its operation when the
junction temperature falls below the thermal shutdown hysteresis.
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SLVS763B – JUNE 2007 – REVISED FEBRUARY 2008
APPLICATION INFORMATION
VIN = 2.0V to 6V
L1
2.2 µH
TPS62262DRV
VIN
CIN
4.7µF
VOUT 1.2V
Up to 600mA
SW
EN
COUT
10 µF
FB
GND
MODE
Figure 35. TPS62260 Fixed 1.2-V Output
TPS62260DRV
VIN
L1
2.2 mH
SW
R1
CIN
360 kW
EN
4.7 mF
GND
VOUT 1.2 V
C1
22 pF
COUT
10 mF
FB
R2
360 kW
MODE
Figure 36. TPS62260DRV Adjustable 1.2-V Output
VIN = 2.0V to 6V TPS62260DRV
VIN
SW
CIN
4.7µF
R1
540 kΩ
EN
GND
MODE
L1
2.2 µH
FB
R2
360 kΩ
VOUT 1.5 V
Up to 600mA
C1
22pF COUT
10 µF
Figure 37. TPS62260 adjustable 1.5-V Output
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SLVS763B – JUNE 2007 – REVISED FEBRUARY 2008
VIN = 2.0V to 6V
TPS62261DRV
VIN
CIN
4.7µF
L1
2.2 µH
VOUT 1.8 V
Up to 600mA
SW
EN
GND
COUT
10 µF
FB
MODE
Figure 38. TPS62261 Fixed 1.8-V Output
OUTPUT VOLTAGE SETTING
The output voltage can be calculated to:
V OUT + VREF
ǒ
R
1) 1
R2
Ǔ
with an internal reference voltage VREF typical 0.6V.
To minimize the current through the feedback divider network, R2 should be 180 kΩ or 360 kΩ. The sum of R1
and R2 should not exceed ~1MΩ, to keep the network robust against noise. An external feed forward capacitor
C1 is required for optimum load transient response. The value of C1 should be in the range between 22pF and
33pF.
Route the FB line away from noise sources, such as the inductor or the SW line.
OUTPUT FILTER DESIGN (INDUCTOR AND OUTPUT CAPACITOR)
The TPS62260 is designed to operate with inductors in the range of 1.5µH to 4.7µH and with output capacitors in
the range of 4.7µF to 22µF. The part is optimized for operation with a 2.2µH inductor and 10µF output capacitor.
Larger or smaller inductor values can be used to optimize the performance of the device for specific operation
conditions. For stable operation, the L and C values of the output filter may not fall below 1µH effective
inductance and 3.5µF effective capacitance.
Inductor Selection
The inductor value has a direct effect on the ripple current. The selected inductor has to be rated for its dc
resistance and saturation current. The inductor ripple current (ΔIL) decreases with higher inductance and
increases with higher VI or VO.
The inductor selection has also impact on the output voltage ripple in PFM mode. Higher inductor values will lead
to lower output voltage ripple and higher PFM frequency, lower inductor values will lead to a higher output
voltage ripple but lower PFM frequency.
Equation 1 calculates the maximum inductor current in PWM mode under static load conditions. The saturation
current of the inductor should be rated higher than the maximum inductor current as calculated with Equation 2.
This is recommended because during heavy load transient the inductor current will rise above the calculated
value.
DI L + Vout
1 * Vout
Vin
L
I Lmax + I outmax )
ƒ
(1)
DI L
2
(2)
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SLVS763B – JUNE 2007 – REVISED FEBRUARY 2008
With:
f = Switching Frequency (2.25MHz typical)
L = Inductor Value
ΔIL = Peak to Peak inductor ripple current
ILmax = Maximum Inductor current
A more conservative approach is to select the inductor current rating just for the switch current limit ILIMF of the
converter.
Accepting larger values of ripple current allows the use of lower inductance values, but results in higher output
voltage ripple, greater core losses, and lower output current capability.
The total losses of the coil have a strong impact on the efficiency of the DC/DC conversion and consist of both
the losses in the dc resistance (R(DC)) and the following frequency-dependent components:
• The losses in the core material (magnetic hysteresis loss, especially at high switching frequencies)
• Additional losses in the conductor from the skin effect (current displacement at high frequencies)
• Magnetic field losses of the neighboring windings (proximity effect)
• Radiation losses
Table 1. List of Inductors
DIMENSIONS [mm ]
Inductance µH
2.5x2.0x1.0max
2.5x2.0x1.2max
3
INDUCTOR TYPE
SUPPLIER
2.0
MIPS2520D2R2
FDK
2.0
MIPSA2520D2R2
FDK
2.5x2.0x1.0max
2.2
KSLI-252010AG2R2
Htachi Metals
2.5x2.0x1.2max
2.2
LQM2HPN2R2MJ0L
Murata
3x3x1.5max
2.2
LPS3015 2R2
Coilcraft
Output Capacitor Selection
The advanced fast-response voltage mode control scheme of the TPS62260 allows the use of tiny ceramic
capacitors. Ceramic capacitors with low ESR values have the lowest output voltage ripple and are
recommended. The output capacitor requires either an X7R or X5R dielectric. Y5V and Z5U dielectric capacitors,
aside from their wide variation in capacitance over temperature, become resistive at high frequencies.
At nominal load current, the device operates in PWM mode and the RMS ripple current is calculated as:
1 * Vout
1
Vin
I RMSCout + Vout
ƒ
L
2
Ǹ3
(3)
At nominal load current, the device operates in PWM mode and the overall output voltage ripple is the sum of the
voltage spike caused by the output capacitor ESR plus the voltage ripple caused by charging and discharging the
output capacitor:
DVout + Vout
1 * Vout
Vin
L
ƒ
ǒ8
1
Cout
ƒ
Ǔ
) ESR
(4)
At light load currents, the converter operates in Power Save Mode and the output voltage ripple is dependent on
the output capacitor and inductor value. Larger output capacitor and inductor values minimize the voltage ripple
in PFM mode and tighten DC output accuracy in PFM mode.
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SLVS763B – JUNE 2007 – REVISED FEBRUARY 2008
Input Capacitor Selection
An input capacitor is required for best input voltage filtering, and minimizing the interference with other circuits
caused by high input voltage spikes. For most applications, a 4.7µF to 10µF ceramic capacitor is recommended.
Because ceramic capacitor loses up to 80% of its initial capacitance at 5 V, it is recommended that 10µF input
capacitors be used for input voltages > 4.5V. The input capacitor can be increased without any limit for better
input voltage filtering. Take care when using only small ceramic input capacitors. When a ceramic capacitor is
used at the input and the power is being supplied through long wires, such as from a wall adapter, a load step at
the output or VIN step on the input can induce ringing at the VIN pin. This ringing can couple to the output and
be mistaken as loop instability or could even damage the part by exceeding the maximum ratings.
Table 2. List of Capacitors
CAPACITANCE
TYPE
SIZE
4.7µF
GRM188R60J475K
0603 1.6x0.8x0.8mm3
Murata
3
Murata
10µF
GRM188R60J106M69D
SUPPLIER
0603 1.6x0.8x0.8mm
LAYOUT CONSIDERATIONS
Figure 39. Suggested Layout for Fixed Output Voltage Options
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SLVS763B – JUNE 2007 – REVISED FEBRUARY 2008
VOUT
R2
GND
C1
R1
COUT
CIN
VIN
L
G
N
D
U
Figure 40. Suggested Layout for Adjustable Output Voltage Version
As for all switching power supplies, the layout is an important step in the design. Proper function of the device
demands careful attention to PCB layout. Care must be taken in board layout to get the specified performance. If
the layout is not carefully done, the regulator could show poor line and/or load regulation, stability issues as well
as EMI problems. It is critical to provide a low inductance, impedance ground path. Therefore, use wide and
short traces for the main current paths. The input capacitor should be placed as close as possible to the IC pins
as well as the inductor and output capacitor.
Connect the GND Pin of the device to the PowerPAD™ land of the PCB and use this pad as a star point. Use a
common Power GND node and a different node for the Signal GND to minimize the effects of ground noise.
Connect these ground nodes together to the PowerPAD land (star point) underneath the IC. Keep the common
path to the GND PIN, which returns the small signal components and the high current of the output capacitors as
short as possible to avoid ground noise. The FB line should be connected right to the output capacitor and routed
away from noisy components and traces (e.g., SW line).
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PACKAGE OPTION ADDENDUM
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20-Mar-2008
PACKAGING INFORMATION
Orderable Device
Status (1)
Package
Type
Package
Drawing
Pins Package Eco Plan (2)
Qty
TPS62260DDCR
ACTIVE
SOT
DDC
5
3000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TPS62260DDCRG4
ACTIVE
SOT
DDC
5
3000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TPS62260DDCT
ACTIVE
SOT
DDC
5
250
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TPS62260DDCTG4
ACTIVE
SOT
DDC
5
250
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TPS62260DRVR
ACTIVE
SON
DRV
6
3000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TPS62260DRVRG4
ACTIVE
SON
DRV
6
3000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TPS62260DRVT
ACTIVE
SON
DRV
6
250
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TPS62260DRVTG4
ACTIVE
SON
DRV
6
250
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TPS62261DRVR
ACTIVE
SON
DRV
6
3000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TPS62261DRVRG4
ACTIVE
SON
DRV
6
3000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TPS62261DRVT
ACTIVE
SON
DRV
6
250
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TPS62261DRVTG4
ACTIVE
SON
DRV
6
250
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TPS62262DRVR
ACTIVE
SON
DRV
6
3000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TPS62262DRVRG4
ACTIVE
SON
DRV
6
3000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TPS62262DRVT
ACTIVE
SON
DRV
6
250
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TPS62262DRVTG4
ACTIVE
SON
DRV
6
250
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TPS62263DRVR
ACTIVE
SON
DRV
6
3000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TPS62263DRVRG4
ACTIVE
SON
DRV
6
3000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TPS62263DRVT
ACTIVE
SON
DRV
6
250
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TPS62263DRVTG4
ACTIVE
SON
DRV
6
250
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
Lead/Ball Finish
MSL Peak Temp (3)
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
20-Mar-2008
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
7-May-2008
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
TPS62260DDCR
Package Package Pins
Type Drawing
SOT
DDC
5
SPQ
Reel
Reel
Diameter Width
(mm) W1 (mm)
A0 (mm)
B0 (mm)
K0 (mm)
P1
(mm)
W
Pin1
(mm) Quadrant
3000
179.0
8.4
3.2
3.2
1.4
4.0
8.0
Q3
TPS62260DDCT
SOT
DDC
5
250
179.0
8.4
3.2
3.2
1.4
4.0
8.0
Q3
TPS62260DRVR
SON
DRV
6
3000
179.0
8.4
2.2
2.2
1.2
4.0
8.0
Q2
TPS62260DRVR
SON
DRV
6
3000
330.0
12.4
2.2
2.2
1.1
8.0
12.0
Q2
TPS62260DRVT
SON
DRV
6
250
179.0
8.4
2.2
2.2
1.2
4.0
8.0
Q2
TPS62260DRVT
SON
DRV
6
250
180.0
12.4
2.2
2.2
1.1
8.0
12.0
Q2
TPS62261DRVR
SON
DRV
6
3000
330.0
12.4
2.2
2.2
1.1
8.0
12.0
Q2
TPS62261DRVR
SON
DRV
6
3000
179.0
8.4
2.2
2.2
1.2
4.0
8.0
Q2
TPS62261DRVT
SON
DRV
6
250
180.0
12.4
2.2
2.2
1.1
8.0
12.0
Q2
TPS62261DRVT
SON
DRV
6
250
179.0
8.4
2.2
2.2
1.2
4.0
8.0
Q2
TPS62262DRVR
SON
DRV
6
3000
179.0
8.4
2.2
2.2
1.2
4.0
8.0
Q2
TPS62262DRVR
SON
DRV
6
3000
330.0
12.4
2.2
2.2
1.1
8.0
12.0
Q2
TPS62262DRVT
SON
DRV
6
250
179.0
8.4
2.2
2.2
1.2
4.0
8.0
Q2
TPS62262DRVT
SON
DRV
6
250
180.0
12.4
2.2
2.2
1.1
8.0
12.0
Q2
TPS62263DRVR
SON
DRV
6
3000
179.0
8.4
2.2
2.2
1.2
4.0
8.0
Q2
TPS62263DRVR
SON
DRV
6
3000
330.0
12.4
2.2
2.2
1.1
8.0
12.0
Q2
TPS62263DRVT
SON
DRV
6
250
179.0
8.4
2.2
2.2
1.2
4.0
8.0
Q2
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
7-May-2008
*All dimensions are nominal
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
TPS62260DDCR
SOT
DDC
5
3000
195.0
200.0
45.0
TPS62260DDCT
SOT
DDC
5
250
195.0
200.0
45.0
TPS62260DRVR
SON
DRV
6
3000
195.0
200.0
45.0
TPS62260DRVR
SON
DRV
6
3000
346.0
346.0
29.0
TPS62260DRVT
SON
DRV
6
250
195.0
200.0
45.0
TPS62260DRVT
SON
DRV
6
250
190.5
212.7
31.8
TPS62261DRVR
SON
DRV
6
3000
346.0
346.0
29.0
TPS62261DRVR
SON
DRV
6
3000
195.0
200.0
45.0
TPS62261DRVT
SON
DRV
6
250
190.5
212.7
31.8
TPS62261DRVT
SON
DRV
6
250
195.0
200.0
45.0
TPS62262DRVR
SON
DRV
6
3000
195.0
200.0
45.0
TPS62262DRVR
SON
DRV
6
3000
346.0
346.0
29.0
TPS62262DRVT
SON
DRV
6
250
195.0
200.0
45.0
TPS62262DRVT
SON
DRV
6
250
190.5
212.7
31.8
TPS62263DRVR
SON
DRV
6
3000
195.0
200.0
45.0
TPS62263DRVR
SON
DRV
6
3000
346.0
346.0
29.0
TPS62263DRVT
SON
DRV
6
250
195.0
200.0
45.0
Pack Materials-Page 2
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