WIRELESS COMMUNICATIONS DIVISION TQ3131 C2 Control Logic DATA SHEET L1 C2 VDD GND GND RF IN 3V Cellular Band CDMA/AMPS LNA IC RF 50 ohm OUT RF Out GND C3 Control Logic Features Small size: SOT23-8 Single 3V operation Low-current operation Product Description Gain Select The TQ3131 is a 3V, RF LNA IC designed specifically for Cellular band CDMA/AMPS applications. It’s RF performance meets the requirements of products designed to the IS-95 and AMPS standards. The TQ3131 is designed to be used with the TQ5131 (CDMA/AMPS mixer) which provides a complete CDMA receiver for 800MHz dual-mode phones. Mode Select The LNA incorporates on-chip switches which determine CDMA, AMPS, and bypass mode select. When used with the TQ5131 (CDMA RFA/mixer), four gain states are available. The RF output port is internally matched to 50 Ω, greatly simplifying the design and keeping the number of external components to a minimum. The TQ3131 achieves good RF performance with low current consumption, supporting long standby times in portable applications. Coupled with the very small SOT23-8 package, the part is ideally suited for Cellular band mobile phones. Parameter Min Frequency 832 Typ Max Units 894 MHz 13.0 dB Noise Figure 1.4 dB 3rd 10.0 dBm 10.5 mA Input Order Intercept DC supply Current Few external components Applications IS-95 CDMA Mobile Phones AMPS Mobile Phones Electrical Specifications1 Gain High IP3 performance Dual Mode CDMA Cellular applications 832-870MHz CDMA applications Note 1: Test Conditions: Vdd=2.8V, Tc=25C, RF frequency=881MHz, CDMA High Gain state. For additional information and latest specifications, see our website: www.triquint.com 1 TQ3131 Data Sheet Electrical Characteristics Parameter Conditions RF Frequency Min. Typ/Nom Max. Units 832 881 894 MHz 11.5 13.0 CDMA Mode-High Gain Gain Noise Figure 1.4 dB 2.0 Input IP3 8.0 LNA IN Return Loss (with external matching) 10 dB LNA OUT Return Loss 10 dB Supply Current 10.0 dB 10.5 dBm 13.5 mA Bypass Mode Gain -3.0 Noise Figure -2.0 2.0 Input IP3 18.0 dB 3.0 30.0 dB dBm LNA IN Return Loss (with external matching) 10 dB LNA OUT Return Loss 10 dB Supply Current 1.2 2.5 mA AMPS Mode Gain 8.5 Noise Figure 1.6 dB 2.2 2.0 LNA IN Return Loss (with external matching) 10 dB LNA OUT Return Loss 10 dB Supply Voltage 2.7 Note 1: Test Conditions: Vdd=2.8V, RF=881MHz, TC = 25° C, unless otherwise specified. Note 2: Min/Max limits are at +25°C case temperature, unless otherwise specified. Absolute Maximum Ratings Parameter Value Units DC Power Supply 5.0 V Power Dissipation 500 mW Operating Temperature -40 to 85 C Storage Temperature -60 to 150 C Signal level on inputs/outputs +20 dBm Voltage to any non supply pin +0.3 V For additional information and latest specifications, see our website: www.triquint.com 3.0 dB Input IP3 Supply Current 2 11.0 dBm 4.0 5.5 mA 2.8 3.3 V TQ3131 Data Sheet Typical Performance Test Conditions, unless Otherwise Specified: Vdd=2.8V, Tc=+25C, RF=881MHz CDMA High Gain Mode Idd v Vdd v Temp 15.0 14.5 14.0 13.5 13.0 12.5 12.0 11.5 11.0 10.5 10.0 Idd (mA) Gain (dB) CDMA High Gain Mode Gain v Freq v Temp -30C +25C +85C 850 860 870 880 890 900 13.50 13.00 12.50 12.00 11.50 11.00 10.50 10.00 9.50 9.00 -30C +25C +85C 2.5 910 2.7 2.9 Vdd (V) Frequency (MHz) 13.0 13.5 12.5 13.0 12.0 Gain (dB) IIP3 (dBm) 3.3 AMPS Mode Gain v Freq v Temp CDMA High Gain Mode IIP3 v Freq v Temp 12.5 12.0 -30C +25C +85C 11.5 11.5 11.0 10.5 -30C 10.0 +25C 9.5 +85C 9.0 11.0 850 860 870 880 890 Frequency (MHz) 900 850 910 860 6.5 1.50 6.0 IIP3 (dBm) 7.0 1.70 1.30 1.10 Frequency (MHz) 5.0 4.0 +25C +85C 3.5 0.50 890 910 5.5 +25C 0.70 880 900 -30C -30C 870 890 4.5 0.90 860 880 AMPS Mode IIP3 v Freq v Temp 1.90 850 870 Frequency (MHz) CDMA High Gain Mode Noise Figure v Freq v Temp Noise Figure (dB) 3.1 900 910 +85C 3.0 850 860 870 880 890 900 910 Frequency (MHz) For additional information and latest specifications, see our website: www.triquint.com 3 TQ3131 Data Sheet AMPS Mode Noise Figure v Freq v Temp BYPASS Mode Gain v Freq v Temp 2.00 Gain (dB) Noise Figure (dB) 2.50 1.50 1.00 -30C +25C 0.50 +85C 0.00 850 860 870 880 890 Frequency (MHz) 900 910 -1.0 -1.2 -1.4 -1.6 -1.8 -2.0 -2.2 -2.4 -2.6 -2.8 -3.0 -30C +25C +85C 850 860 870 910 2.50 Noise Figure (dB) 5.00 Idd (mA) 900 BYPASS Mode Noise Figure v Freq v Temp 5.50 4.50 4.00 -30C +25C 3.50 +85C 2.5 2.7 2.9 Vdd (V) 3.1 2.00 1.50 1.00 -30C +25C 0.50 +85C 0.00 3.00 850 3.3 860 34.0 Idd (mA) 33.0 32.0 31.0 -30C +25C +85C 29.0 28.0 27.0 850 860 870 880 890 880 890 900 BYPASS Mode Idd v Vdd v Temp 35.0 30.0 870 Frequency (MHz) BYPASS Mode IIP3 v Freq v Temp IIP3 (dBm) 890 Frequency (MHz) AMPS Mode Idd v Vdd v Temp 900 910 1.80 1.60 1.40 1.20 1.00 0.80 0.60 0.40 0.20 0.00 -30C +25C +85C 2.5 2.7 Frequency (MHz) 4 880 For additional information and latest specifications, see our website: www.triquint.com 2.9 Vdd (V) 3.1 3.3 910 TQ3131 Data Sheet Application/Test Circuit Vdd R1 Control Logic C2 Vdd GND GND C2 (paddle) LNA input L1 RF in RF out LNA output LNA GND C3 Control Logic C1 Lbrd Bill of Material for TQ3131 LNA Application/Test Circuit Component Reference Designator Part Number Value Size Manufacturer Receiver IC U1 TQ3131 SOT23-8 TriQuint Semiconductor Capacitor C1 3.3pFd 0402 Capacitor C2 8.2pF 0402 Resistor R1 3.3Ω 0402 Inductor L1 15nH 0402 Inductor Lbrd See application note For additional information and latest specifications, see our website: www.triquint.com 5 TQ3131 Data Sheet Operation TQ3131 Product Description MODE C2 C3 Typical Gain The TQ3131 LNA uses a cascode low noise amplifier, along with signal path switching. A bias control circuit sets the High Gain 0 0 13(dB) quiescent current for each mode and ensures peak performance over process and temperature, (refer to Figure 1). In the application, CMOS level signals are applied to pins 1 and 5 and 1 0 AMPS 0 1 11(dB) Bypass 1 1 -2(dB) are decoded by internal logic in order to set the device to the desired mode. (see Table 1 for logic control states) In the high gain mode, switches S1, S2, and S5 are closed, with switches S3 and S4 open. In the bypass mode, switches S1, S2, and S5 are open, with switches S3 and S4 closed. Having five switches ensures that there are no parasitic feedback paths for the signal. In the AMPS mode, control logic switches the LNA into a low current bias condition. Only three external components are needed in an application. The chip uses an external cap and inductor for the input match to pin 3. The output is internally matched to 50 ohms at pin 6. A Vdd bypass cap is required close to pin 8. External degeneration of the cascode is required between pin 4 and ground. However, a small amount of pc board trace can be used as the inductor (Lbrd). Alternatively, if an extra component can be tolerated, a small value chip inductor can be used. (see Figure 2) VDD 1 Bias and Switch Control Logic 8 C2 provides the best compromise between noise figure and gain. The quality of the chip ground will have some effect on the match, which is why some experimentation will likely be needed. Noise Parameter Analysis 3 LNA OUT 6 S1 RFIN S2 RF OUT C1 S3 S4 C3 S5 4 Lbrd It is probably wise to synthesize the matching network component values for some intermediate range of Gamma values, and then by experimentation, find the one which GND S6 L1 was designed so that one only needs to optimize the input match in the high gain mode. As long as the proper grounding and source inductance are used, the other two modes will perform well with the same match. starting point. 7 GND LNA IN Input network design for most LNA’s is a straightforward compromise between noise figure and gain. The TQ3131 is no exception, even though it has 3 different modes. The device The values used on our evaluation board may be used as a C2 2 LNA Input Network Design The input match will affect the output match to some degree, so S22 should be monitored. R1 VDD C2 Table 1 LNA States and Control Bits 5 LNA GND C3 Figure 1 TQ3131 Simplified Schematic A noise parameter analysis is shown on the next page for both the high gain and AMPS modes. A “nominal” device was mounted directly on a solid copper ground plane with semi-rigid probes attached to the device input and output pins. A value of Lbrd was chosen so that 13.0dB of gain was attained at conjugate match. Then the tuner was removed and noise data was taken. Please note that although data was taken at 700MHz and 1000MHz, the device was designed to operate satisfactorily only over a much more limited range. 6 For additional information and latest specifications, see our website: www.triquint.com TQ3131 Data Sheet Gamma Opt analysis for TQ3131 High Gain Mode Freq (MHz) Γ Opt Γ Angle Fmin (dB) R noise 700 0.53 43.3 0.90 18.5 880 0.53 52.4 0.92 16.5 1000 0.48 58.5 1.01 15.4 For additional information and latest specifications, see our website: www.triquint.com 7 TQ3131 Data Sheet Gamma Opt analysis for TQ3131 Amps Mode Γ Opt Γ Angle 700 0.61 40.6 1.22 33.0 880 0.70 54.2 1.09 27.4 1000 0.56 56.6 1.42 27.0 Freq (MHz) Fmin (dB) R noise Figure 2 shows how a spiral pc board trace can be used as the external inductance. It is suggested that such a circuit be used for the initial design prototype. Then the optimum inductance can be found by simply solder bridging across the inductor. The final pc board design can then include the proper shorted version of the inductor. Gain Control via Pin 4 Inductance The source connection of the LNA cascode is brought out separately through pin 4. That allows the designer to make some range of gain adjustment. The total amount of inductance present at the source of the cascode is equal to the bond wire plus package plus external inductance. One should generally use an external inductance such that gain in the high gain CDMA mode = 13.0. Although it is possible to increase the gain of the TQ3131 by using little or no degeneration, input intercept will be degraded. 8 Figure 2 Showing Lbrd and Grounding on Evaluation Board For additional information and latest specifications, see our website: www.triquint.com TQ3131 Data Sheet Selection of the Vdd Bypass Cap for Optimum Performance Symptoms of a poor ground include reduced gain and the The Vdd bypass capacitor has the largest effect on the LNA output match, and is required for proper operation. Because the input match affects the output match to some degree as well, the process of picking the bypass cap value involves some iteration. First, an input match is selected which gives adequate gain and noise figure. Then the bypass capacitor is varied to give the best output match. Generally, the poorer the chip grounding, the smaller the bypass capacitor value will be. The inability to achieve >2:1 VSWR at the output when the input is matched. It is recommended to use multiple vias to a mid ground plane layer. The vias at pins 2 and 7 to this layer should be as close to the lead pads as possible Additionally, the ground return on the Vdd bypass cap should provide minimal inductance back to chip pins 2 and 7. TQ3131 S-Parameters demo board achieves 11-12dB of return loss which is adequate for connection directly to the input of a SAW filter. Following are S-Parameter graphs for both the high gain and the AMPS modes. Data was taken on a single “nominal” device at 2.8v Vdd. The reference planes were set at the end of the Grounding package pins. Note that the plots are almost identical for both modes. An optimal ground for the device is important in order to achieve datasheet specified performance. TQ3131 High Gain Mode S-Parameters S11 For additional information and latest specifications, see our website: www.triquint.com 9 TQ3131 Data Sheet S12 S21 10 For additional information and latest specifications, see our website: www.triquint.com TQ3131 Data Sheet S22 TQ3131 Amps Mode S-Parameters S11 For additional information and latest specifications, see our website: www.triquint.com 11 TQ3131 Data Sheet S12 S21 12 For additional information and latest specifications, see our website: www.triquint.com TQ3131 Data Sheet S22 For additional information and latest specifications, see our website: www.triquint.com 13 TQ3131 Data Sheet C2 Control Logic L1 C2 VDD GND GND RF IN GND RF 50 ohm OUT RF Out C3 Package Pinout Pin Descriptions Pin Name Pin # C2 1 Control logic 2 GND 2 Ground, paddle RF IN 3 RF input, off-chip matching required LNA GND 4 Ground C3 5 Control logic 3 RF OUT 6 RF output, no matching required LNA GND 7 Ground Vdd 8 LNA Vdd, typical 2.8V, C2 capacitor required 14 Description and Usage For additional information and latest specifications, see our website: www.triquint.com Control Logic TQ3131 Data Sheet Package Type: SOT23-8 Plastic Package Note 1 PIN 1 E E1 b FUSED LEAD Note 2 A c e DESIGNATION A A1 b c D e E E1 L Theta L A1 DESCRIPTION OVERALL HEIGHT STANDOFF LEAD WIDTH LEAD THICKNESS PACKAGE LENGTH LEAD PITCH LEAD TIP SPAN PACKAGE WIDTH FOOT LENGTH FOOT ANGLE DIE METRIC 1.20 +/-.25 mm .100 +/-.05 mm .365 mm TYP .127 mm TYP 2.90 +/-.10 mm .65 mm TYP 2.80 +/-.20 mm 1.60 +/-.10 mm .45 +/-.10 mm 1.5 +/-1.5 DEG θ ENGLISH 0.05 +/-.250 in .004 +/-.002 in .014 in .005 in .114 +/-.004 in .026 in .110 +/-.008 in .063 +/-.004 in .018 +/-.004 in 1.5 +/-1.5 DEG NOTE 3 3 3 3 1,3 3 3 2,3 3 Notes 1. The package length dimension includes allowance for mold mismatch and flashing. 2. The package width dimension includes allowance for mold mismatch and flashing. 3. Primary dimensions are in metric millimeters. The English equivalents are calculated and subject to rounding error. For additional information and latest specifications, see our website: www.triquint.com 15 TQ3131 Data Sheet Additional Information For latest specifications, additional product information, worldwide sales and distribution locations, and information about TriQuint: Web: www.triquint.com Tel: (503) 615-9000 Email: [email protected] Fax: (503) 615-8900 For technical questions and additional information on specific applications: Email: [email protected] The information provided herein is believed to be reliable; TriQuint assumes no liability for inaccuracies or omissions. TriQuint assumes no responsibility for the use of this information, and all such information shall be entirely at the user's own risk. Prices and specifications are subject to change without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. TriQuint does not authorize or warrant any TriQuint product for use in life-support devices and/or systems. Copyright © 1998 TriQuint Semiconductor, Inc. All rights reserved. Revision A, January, 2000 16 For additional information and latest specifications, see our website: www.triquint.com