STMICROELECTRONICS TS925IPT

TS925
Rail-to-Rail High Output Current Quad Operational Amplifiers
With Standby Mode and Adjustable Phantom Ground
■
■
■
■
■
■
■
■
■
■
■
Rail-to-rail input and output
Low noise: 9nV/√Hz
Low distortion
High output current: 80mA (able to drive 32Ω
loads)
High-speed: 4MHz, 1.3V/µs
Operating from 2.7V to 12V
Low input offset voltage: 900µV max. (TS925A)
Adjustable phantom ground (VCC/2)
Standby mode
ESD internal protection: 2kV
Latch-up immunity
N
DIP16
(Plastic Package)
D
SO-16
(Plastic Micropackage)
P
TSSOP16
(Thin Shrink Small Outline Package)
Description
Pin connections (top view)
2
-
+
+
16
Output 4
15
Inverting
Input 4
-
Non-inverting
Input 1
3
14
Non-inverting
Input 4
V CC+
4
13
V CC -
Non-inverting
Input 2
5
12
Non-inverting
Input 3
Inverting
Input 2
6
11
Inverting
Input 3
Output 2
7
10
Output 3
Phantom ground
8
9
-
The device is stable for capacitive loads up to
500pF. When the STANDBY mode is enabled, the
total consumption drops to 6µA (VCC = 3V).
Inverting
Input 1
+
The TS925 exhibits very low noise, low distortion
and high output current making this device an
excellent choice for high quality, low voltage or
battery operated audio/telecom systems.
1
+
High output current allows low load impedances to
be driven. An internal low impedance phantom
ground eliminates the need for an external
reference voltage or biasing arrangement.
Output 1
-
The TS925 is a rail-to-rail quad BiCMOS
operational amplifier optimized and fully specified
for 3V and 5V operation.
Stdby
Applications
■
Headphone amplifier
Soundcard amplifier, piezoelectric speaker
■ MPEG boards, multimedia systems...
■
November 2005
■
Cordless telephones and portable
communication equipment
■ Line driver, buffer
■ Instrumentation with low noise as key factor
Rev 2
1/17
www.st.com
17
TS925
Order Codes
Part Number
Package
Packing
Marking
TS925IN
DIP16
DIP16
TS925IN
TS925ID/IDT
SO-16
SO-16
TSSOP16
TSSOP16
TS925IPT
TS925AIN
Temperature Range
-40°C to +125°C
DIP16
DIP16
TS925AID
SO-16
SO-16
TS925AIPT
TSSOP16
TSSOP16
2/17
925I
TS925AIN
925AI
TS925
1
Absolute Maximum Ratings
Absolute Maximum Ratings
Table 1.
Symbol
Key parameters and their absolute maximum ratings
Value
Unit
Supply voltage (1)
14
V
Vid
Differential Input Voltage (2)
±1
V
Vi
Input Voltage
VDD -0.3 to VCC+0.3
V
Tj
Maximum Junction Temperature
150
°C
Rthja
SO-16
Thermal Resistance Junction to
TSSOP16
Ambient
DIP16
95
95
63
°C/W
Rthjc
SO-16
Thermal Resistance Junction to
TSSOP16
Case
DIP16
30
25
33
°C/W
2
kV
200
V
1
kV
VCC
Parameter
Condition
HBM
Human Body Model(3)
ESD
Electro-Static Discharge
MM
Machine Model(4)
CDM
Charged Device Model
see note(5)
Output Short Circuit Duration
Latch-up Immunity
10sec,
Pb-free package
Soldering Temperature
200
mA
260
°C
1. All voltage values, except differential voltage are with respect to network ground terminal.
2. Differential voltages are the non-inverting input terminal with respect to the inverting input terminal. If Vid > ±1V,
the maximum input current must not exceed ±1mA. In this case (Vid > ±1V) an input serie resistor must be
added to limit input current.
3. Human body model, 100pF discharged through a 1.5kΩ resistor into pin of device.
4. Machine model ESD, a 200pF cap is charged to the specified voltage, then discharged directly into the IC with
no external series resistor (internal resistor < 5Ω), into pin to pin of device.
5. There is no short-circuit protection inside the device: short-circuits from the output to Vcc can cause excessive
heating. The maximum output current is approximately 80mA, independent of the magnitude of Vcc. Destructive
dissipation can result from simultaneous short-circuits on all amplifiers.
Table 2.
Operating conditions
Symbol
Parameter
VCC
Supply Voltage
Vicm
Common Mode Input Voltage Range
Toper
Operating Free Air Temperature Range
Value
Unit
2.7 to 12
V
VDD -0.2 to VCC +0.2
V
-40 to +125
°C
3/17
Electrical Characteristics
2
TS925
Electrical Characteristics
Table 3.
Electrical characteristics for VCC = 3V, VDD = 0V, Vicm = VCC/2, RL connected
to VCC/2, Tamb = 25°C (unless otherwise specified)
Symbol
Vio
Parameter
Input Offset Voltage
Conditions
Min.
Typ.
3
0.9
mV
5
1.8
TS925
TS925A
Input Offset Voltage Drift
µV/°C
2
Iio
Input Offset Current
Vout = 1.5V
1
30
nA
Iib
Input Bias Current
Vout = 2.5V
15
100
nA
High Level Output Voltage
RL = 10kΩ
RL = 600Ω
RL = 32Ω
VOH
VOL
Avd
Low Level Output Voltage
Large Signal Voltage Gain
2.90
2.87
V
2.63
RL = 10kΩ
RL = 600Ω
RL = 32Ω
50
100
mV
180
Vout = 2Vpk-pk
RL = 10kΩ
RL = 600Ω
RL = 32Ω
200
35
16
RL = 600Ω
4
MHz
60
80
dB
60
85
dB
Output Short-Circuit Current
50
80
mA
SR
Slew Rate
0.7
1.3
V/µs
Pm
Phase Margin at Unit Gain
RL = 600Ω, CL =100pF
68
Degrees
GM
Gain Margin
RL = 600Ω, CL =100pF
12
dB
Equivalent Input Noise Voltage
f = 1kHz
9
nV
-----------Hz
Total Harmonic Distortion
Vout = 2Vpk-pk,
f = 1kHz, Av = 1,
RL = 600Ω
0.01
%
120
dB
GBP
Gain Bandwidth Product
CMR
Common Mode Rejection Ratio
SVR
Supply Voltage Rejection Ratio
Io
en
THD
Cs
4/17
Unit
at Tamb = +25°C
TS925
TS925A
at Tmin. ≤ Tamb ≤ Tmax:
DV io
Max.
Channel Separation
Vcc = 2.7 to 3.3V
V/mV
TS925
Electrical Characteristics
Table 4.
Global circuit
Symbol
Parameter
Conditions
Min.
Typ
Max.
Unit
7
mA
ICC
Total Supply Current
No load, Vout = Vcc/2
5
Istby
Total Supply Current in STANDBY
Pin 9 connected to Vcc-
6
Venstby Pin 9 Voltage to enable the
STANDBY mode
Vdistby
(1)
Pin 9 Voltage to disable the
STANDBY
mode (1)
at Tamb = +25°C
at Tmin ≤ T amb ≤ Tmax
at Tamb = +25°C
at Tmin ≤ T amb ≤ Tmax
µA
0.3
0.4
1.1
1
V
V
1. The STANDBY mode is currently enabled when Pin 9 is GROUNDED and disabled when Pin 9 is left OPEN.
Table 5.
Phantom ground
Symbol
Parameter
Conditions
Min.
Typ
Max.
Unit
No Output Current
Vcc/2
-5%
V cc/2
Vcc/2
+5%
V
12
18
mA
3
Ω
200
40
17
nV
-----------Hz
18
mA
Vpg
Phantom Ground Output Voltage
Ipgsc
Phantom Ground Output Short
Circuit Current - Sourced
Zpg
Phantom Ground Impedance
DC to 20kHz
Enpg
Phantom Ground Output Voltage
Noise
f = 1kHz
Cdec = 100pF
Cdec = 1nF
Cdec = 10nF(1)
Ipgsk
Phantom Ground Output Short
Circuit Current - Sinked
12
1. Cdec is the decoupling capacitor on Pin9.
5/17
Electrical Characteristics
Table 6.
Electrical characteristics for VCC = 5V, V DD = 0V, Vicm = VCC/2, RL connected
to VCC/2, Tamb = 25°C (unless otherwise specified)
Symbol
Vio
TS925
Parameter
Input Offset Voltage
Conditions
Min.
Typ.
3
0.9
mV
5
1.8
TS925
TS925A
Input Offset Voltage Drift
µV/°C
2
Iio
Input Offset Current
Vout = 2.5V
1
30
nA
Iib
Input Bias Current
Vout = 2.5V
15
100
nA
High Level Output Voltage
RL= 10kΩ
RL = 600Ω
RL = 32Ω
VOH
VOL
Avd
Low Level Output Voltage
Large Signal Voltage Gain
4.90
4.85
V
4.4
RL= 10kΩ
RL = 600Ω
RL = 32Ω
50
120
mV
300
Vout = 2Vpk-pk
RL= 10k
RL = 600Ω
RL = 32Ω
200
40
17
RL = 600Ω
4
MHz
60
80
dB
60
85
dB
Output Short-Circuit Current
50
80
mA
SR
Slew Rate
0.7
1.3
V/µs
Pm
Phase Margin at Unit Gain
RL = 600Ω, CL =100pF
68
Degrees
GM
Gain Margin
RL = 600Ω, CL =100pF
12
dB
Equivalent Input Noise Voltage
f = 1kHz
9
nV
-----------Hz
Total Harmonic Distortion
Vout = 2V pk-pk, f = 1kHz,
Av = 1, RL = 600Ω
0.01
%
120
dB
GBP
Gain Bandwidth Product
CMR
Common Mode Rejection Ratio
SVR
Supply Voltage Rejection Ratio
Io
en
THD
Cs
6/17
Unit
at T amb = +25°C:
TS925
TS925A
at T min. ≤ T amb ≤ Tmax:
DV io
Max.
Channel Separation
Vcc = 3 to 5V
V/mV
TS925
Electrical Characteristics
Table 7.
Symbol
Global circuit
Parameter
Conditions
Min.
Typ
Max.
8
ICC
Total Supply Current
No load, Vout = Vcc/2
6
Istby
Total Supply Current in
STANDBY
Pin 9 connected to Vcc-
6
Venstby
Vdistby
Pin 9 Voltage to enable the
STANDBY mode
(1)
Pin 9 Voltage to disable the
STANDBY mode (1)
at Tamb = +25°C
at Tmin ≤ Tamb ≤ Tmax
at Tamb = +25°C
at Tmin ≤ Tamb ≤ Tmax
Unit
mA
µA
0.3
0.4
V
1.1
1
V
1. the STANDBY mode is currently enabled when Pin 9 is GROUNDED and disabled when Pin 9 is left OPEN.
Table 8.
Symbol
Phantom ground
Parameter
Conditions
Min.
Typ
Max.
Unit
No Output Current
Vcc/2
-5%
Vcc/2
V cc/2
+5%
V
12
18
mA
3
Ω
200
40
17
nV
-----------Hz
18
mA
Vpg
Phantom Ground Output
Voltage
Ipgsc
Phantom Ground Output Short
Circuit Current - Sourced
Zpg
Phantom Ground Impedance
DC to 20kHz
Enpg
Phantom Ground Output
Voltage Noise
f = 1kHz
Cdec = 100pF
Cdec = 1nF
Cdec = 10nF(1)
Ipgsk
Phantom Ground Output Short
Circuit Current - Sinked
12
1. Cdec is the decoupling capacitor on Pin9.
7/17
Electrical Characteristics
TS925
Figure 1.
Input offset voltage distribution
Figure 2.
Total supply current vs. supply
voltage with no load
Figure 3.
Supply current/amplifier vs.
temperature
Figure 4.
Output short circuit current vs.
output voltage
Figure 5.
Output short circuit current vs.
output voltage
Figure 6.
Output short circuit current vs.
output voltage
8/17
TS925
Electrical Characteristics
Figure 7.
Output short circuit current vs.
temperature
Figure 8.
Figure 9.
Distortion + noise vs. frequency
Figure 10. THD + noise vs. frequency
Figure 11. THD + noise vs. frequency
Voltage gain and phase vs.
frequency
Figure 12. THD + noise vs. frequency
9/17
Electrical Characteristics
Figure 13. Equivalent input noise vs.
frequency
Figure 15. Phantom ground short circuit
output current vs. phantom
ground output voltage
10/17
TS925
Figure 14. Total supply current vs. standby
input voltage
TS925
3
Using the TS925 as a preamplifier and speaker driver
Using the TS925 as a preamplifier and speaker
driver
The TS925 is an input/output rail-to-rail quad BiCMOS operational amplifier. It is able to operate
with low supply voltages (2.7V) and to drive low output loads such as 32Ω.
As an illustration of these features, the following technical note highlights many of the
advantages of the device in a global audio application.
3.1
Application circuit
Figure 16 shows two operators (A1, A4) used in a preamplifier configuration, and the two others
in a push-pull configuration driving a headset. The phantom ground is used as a common
reference level (VCC/2).
The power supply is delivered from two LR6 batteries (2 x 1.5V nominal).
Preamplifier
The operators A1 and A4 are wired with a non-inverting gain of respectively:
• A1# (R4/(R3+R17))
• A4# R6/R5
With the following values chosen:
• R4 = 22kΩ - R3 = 50Ω - R17 = 1.2kΩ
• R6 = 47kΩ - R5 = 1.2kΩ,
The gain of the preamplifier chain is therefore equal to 58dB.
Alternatively, the gain of A1 can be adjusted by choosing a JFET transistor Q1 instead of R17.
This JFET voltage controlled resistor arrangement forms an automatic level control (ALC)
circuit, useful in many microphone preamplifier applications. The mean rectified peak level of
the output signal envelope is used to control the preamplifier gain.
11/17
Using the TS925 as a preamplifier and speaker driver
TS925
Figure 16. Electrical schematic
M ike p re am p lifie r
C1
C9
M IKE
OUTPUT
R2
M IC R O P H O N E
R5
C6
R3
C4
C14
D2
D1
C5
C2
C3
C7
R7
R 17
R 18
AL C
Q1
R8
Vcc
P H AN TO M G R O U N D
8
4
9
13
STBY
C1 5
C1 0
C 18 C 8
7
5
H E AD PH O N E S
R 13
R 12
6
C 10
H e ad ph on es a m plifier
R 15
C 12
R 11
R 10
C9
C 13
A M P LIF IE R
IN P U T
LEFT
11
10
R1 6
C 11
12
A M P LIF IE R
IN P U T
R IG H T
Headphone amplifier
The operators A2 and A3 are organized in a push-pull configuration with a gain of 5. The stereo
inputs can be connected to a CD-player and the TS925 can directly drive the head-phone
speakers. This configuration shows the ability of the circuit to drive 32Ω load with a maximum
output swing and high fidelity suitable for sound and music.
Figure 19 shows the available signal swing at the headset outputs: two other rail-to-rail
competitor parts are employed in the same circuit for comparison (note the much reduced
clipping level and crossover distortion).
12/17
TS925
Using the TS925 as a preamplifier and speaker driver
Figure 17. Frequency response of the global
preamplifier chain
Figure 18. Voltage noise density vs.
frequency at preamplifier output
15
70
14
Nois e D ens ity (n V /sqrt(Hz ))
V oltag e Gain ( dB)
60
50
40
30
13
12
11
10
9
8
1 00 0
1 00 00
1 00 0 00
1 00 0 00 0
1 00 0 00 00
1 .0 E +0 8
frequency (Hz)
Figure 19. Maximum voltage swing at
headphone outputs (RL = 32Ω)
7
10
100
1000
1 0 00 0
1 0 00 0 0
fre q u e n c y ( H z )
Figure 20. THD + noise vs. frequency
(headphone outputs)
0 .4
0.3 5
0 .3
THD+no ise (%)
20
1 00
0.2 5
0 .2
0.1 5
0 .1
0.0 5
0
100
1 0 00
10000
1 0 0 0 00
Hz
13/17
Package Mechanical Data
4
TS925
Package Mechanical Data
In order to meet environmental requirements, ST offers these devices in ECOPACK® packages.
These packages have a Lead-free second level interconnect. The category of second level
interconnect is marked on the package and on the inner box label, in compliance with JEDEC
Standard JESD97. The maximum ratings related to soldering conditions are also marked on
the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at:
www.st.com.
4.1
DIP16 Package
Plastic DIP-16 (0.25) MECHANICAL DATA
mm.
inch
DIM.
MIN.
a1
0.51
B
0.77
TYP
MAX.
MIN.
TYP.
MAX.
0.020
1.65
0.030
0.065
b
0.5
0.020
b1
0.25
0.010
D
20
0.787
E
8.5
0.335
e
2.54
0.100
e3
17.78
0.700
F
7.1
0.280
I
5.1
0.201
L
Z
3.3
0.130
1.27
0.050
P001C
14/17
TS925
4.2
Package Mechanical Data
SO-16 Package
SO-16 MECHANICAL DATA
DIM.
mm.
MIN.
TYP
A
a1
inch
MAX.
MIN.
TYP.
1.75
0.1
0.068
0.2
a2
0.004
0.008
0.46
0.013
0.018
0.25
0.007
1.65
b
0.35
b1
0.19
C
MAX.
0.064
0.5
0.010
0.019
c1
45˚ (typ.)
D
9.8
10
0.385
E
5.8
6.2
0.228
e
1.27
e3
0.393
0.244
0.050
8.89
0.350
F
3.8
4.0
0.149
0.157
G
4.6
5.3
0.181
0.208
L
0.5
1.27
0.019
M
S
0.62
8
0.050
0.024
˚ (max.)
PO13H
15/17
Package Mechanical Data
4.3
TS925
TSSOP16 Package
TSSOP16 MECHANICAL DATA
mm.
inch
DIM.
MIN.
TYP
A
MAX.
MIN.
TYP.
MAX.
1.2
A1
0.05
A2
0.8
b
0.047
0.15
0.002
0.004
0.006
1.05
0.031
0.039
0.041
0.19
0.30
0.007
0.012
c
0.09
0.20
0.004
0.0079
D
4.9
5
5.1
0.193
0.197
0.201
E
6.2
6.4
6.6
0.244
0.252
0.260
E1
4.3
4.4
4.48
0.169
0.173
0.176
1
e
0.65 BSC
K
0˚
L
0.45
A
0.60
0.0256 BSC
8˚
0˚
0.75
0.018
8˚
0.024
0.030
A2
A1
b
e
K
c
L
E
D
E1
PIN 1 IDENTIFICATION
1
0080338D
16/17
TS925
5
Revision History
Revision History
Date
Revision
Feb. 2001
1
Initial release - Product in full production.
2
The following changes were made in this revision:
– Chapter on Macromodels removed from the datasheet.
– Data updated in Table 3. on page 4.
– Data in tables in Electrical Characteristics on page 4 reformatted for
easier use.
– Minor grammatical and formatting changes throughout.
Nov. 2005
Changes
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granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are
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