INTEGRATED CIRCUITS DATA SHEET TSA5518M 1.3 GHz bidirectional I2C-bus controlled synthesizer Product specification File under Integrated Circuits, IC02 1997 Mar 07 Philips Semiconductors Product specification 1.3 GHz bidirectional I2C-bus controlled synthesizer TSA5518M FEATURES • Complete 1.3 GHz single chip system • Low power 5 V, 40 mA • I2C-bus programming • One pin crystal oscillator • In-lock flag GENERAL DESCRIPTION • Varicap drive disable The device is a single chip PLL frequency synthesizer designed for TV tuning systems. Control data is entered via the I2C-bus; five serial bytes are required to address the device, select the oscillator frequency, program the 7 output ports and set the charge-pump current. The output port P6 is combined with an A/D converter input. Digital information concerning this port can be read out of the SDA line (one status byte) during a READ operation. A flag is set when the loop is ‘in-lock’ and is read during a READ operation. The device has one fixed I2C-bus address, programmed by applying a specific voltage on AS input. The phase comparator operates at 7.8125 kHz when a 4 MHz crystal in used. The device provides a bandswitch output to select the bands of the mixer/oscillator ICs TDA5330, TDA5630A except TDA5630/C1 and TDA5730 with the appropriate voltage level. • Low radiation • Address selection for picture in picture (PIP), DBS tuner, and so on • 5-level A/D converter • 7 bus-controlled ports (4 open-collector outputs and 3 emitter follower outputs), 1 bidirectional port • Power-down flag • Mixer/oscillator bandswitch output • Available in SSOP20 package. APPLICATIONS • TV tuners and front-ends • VCR tuners. QUICK REFERENCE DATA SYMBOL VCC ICC fi Vi(rms) fxtal Io Tamb Rth j-a PARAMETER CONDITIONS supply voltage supply current frequency input voltage level (RMS value) 80 to 150 MHz 150 MHz to 1.0 GHz 1 GHz to 1.3 GHz crystal oscillator frequency output current emitter follower on P4, P5 and P7 open-collector P0, P1 and P2 open-collector P6 operating ambient temperature thermal resistance from junction to ambient MIN. 4.5 − 80 12 9 40 3.2 − − − −10 − TYP. 5 40 − − − − 4 − − − − − MAX. 5.5 − 1300 300 300 300 4.48 5 20 10 +80 120 UNIT V mA MHz mV mV mV MHz mA mA mA °C K/W ORDERING INFORMATION PACKAGE TYPE NUMBER NAME TSA5518M SSOP20 1997 Mar 07 DESCRIPTION plastic shrink small outline package; 20 leads; body width 4.4 mm 2 VERSION SOT266-1 1997 Mar 07 3 SDA 15 SCL 16 XTAL 19 RF2 7 RF1 8 DIVIDER N = 512 3 2 GATE fDIV T1 LATCH & CONTROL DATA IN-LOCK DETECTOR DIGITAL PHASE COMPARATOR TO LOGIC BAND SWITCH OS OP CHARGE PUMP MGK115 5 BS 9 GND 17 VCC 1 UD 20 PD output 1.3 GHz bidirectional I2C-bus controlled synthesizer Fig.1 Block diagram. 4 11 10 14 13 P0 P1 P2 P6 P4 P5 P7 8-BIT LATCH PORT INFORMATION 12 8-BIT A/D CONVERTER fref 15-BIT LATCH DIVIDER RATIO 7.8125 kHz 15-BIT PROGRAMABLE DIVIDER AS ADDRESS SELECTION I2C-BUS TRANSCEIVER POWER-DOWN DETECTOR OSCILLATOR 4 MHz PRESCALER DIVIDE-BY-8 handbook, full pagewidth input Philips Semiconductors Product specification TSA5518M BLOCK DIAGRAM Philips Semiconductors Product specification 1.3 GHz bidirectional I2C-bus controlled synthesizer TSA5518M PINNING SYMBOL PIN DESCRIPTION UD 1 drive output (UD) P7 2 P7 output port P5 3 P5 output port P4 4 P4 output port BS 5 bandswitch output for M/O drive n.c 6 not connected RF2 7 UHF/VHF signal input 2 RF1 8 GND 9 P1 10 handbook, halfpage UD 1 20 PD P7 2 19 XTAL P5 3 18 n.c. UHF/VHF signal input 1 P4 4 17 VCC ground BS 5 P1 output port (general purpose) n.c. 6 RF2 7 14 P2 RF1 8 13 P6 GND 9 12 AS P1 10 11 P0 P0 11 P0 output port (general purpose) AS 12 input for Address Selection P6 13 P6 port (output/input for general purpose ADC) P2 14 P2 output port (fDIV if the test mode is active) SDA 15 I2C-bus serial data input/output SCL 16 I2C-bus serial clock VCC 17 voltage supply n.c 18 not connected XTAL 19 crystal oscillator input PD 20 charge-pump output (PD) 15 SDA MBH947 Fig.2 Pin configuration. or charge pump and port information (first bit = 1) will follow. Until an I2C-bus STOP condition is sent by the controller, additional data bytes can be entered without the need to re-address the device. This allows a smooth frequency sweep for fine tuning or AFC purpose. At power-on the ports are set to the high-impedance state (open-collector outputs) or at the HIGH level (emitter follower outputs). The bandswitch output BS provides a voltage output suitable for the band selection input of mixer/oscillator ICs TDA5330, TDA5630A and TDA5730. It is controlled by B1 and B0 bits or P7, P5 and P4 bits depending on the BSC bit (see Tables 1 to 4). The 7.8125 kHz reference frequency is obtained by dividing the output of the 4 MHz crystal oscillator by 512. Because the input of UHF/VHF signal is first divided-by-8 the step size is 62.5 kHz. A 3.2 MHz crystal can offer step size of 50 kHz. FUNCTIONAL DESCRIPTION I2C-bus. The device is controlled via the two wire For programming, there is one module address (7 bits) and the R/W bit for selecting READ or WRITE mode. Write mode The write data format is summarized in Table 1. After the address transmission (first byte), data bytes can be sent to the device. Four data bytes are needed to fully program the device. The bus transceiver has an auto increment facility which permits the programming of the device within one single transmission (address byte + 4 data bytes). The device can also be partially programmed on the condition that the first data byte following the address is byte 2 or 4. The meaning of the bits in the data bytes is given in Table 3. The first bit of the first data byte transmitted indicates whether frequency data (first bit = 0) 1997 Mar 07 16 SCL TSA5518M 4 Philips Semiconductors Product specification 1.3 GHz bidirectional I2C-bus controlled synthesizer Table 1 Write data format BYTE MS B DESCRIPTION LSB ACKNOWLEDGE 1 address 1 1 2 programmable divider 0 3 programmable divider N7 4 charge-pump, bandswitch and test bits 1 5 output ports control bits Table 2 TSA5518M P7 0 0 0 MA1 MA0 0 LOW from device N14 N13 N12 N11 N10 LOW from device N6 N5 N4 N3 N2 N1 N0 LOW from device CP T1 T0 BSC B1 B0 OS LOW from device P6 P5 P4 X P1 P0 LOW from device N9 P2 N8 Explanation of Table 1 BIT DESCRIPTION MA1, MA0 programmable address bits (see Table 7) N14, .. , N0 programmable divider bits N = N14 × 214 + N13 × 213 +...+ N1 × 21 + N0 CP charge pump current CP = 0 to 50 µA; CP = 1 to 220 µA T1, T0, OS T1 = 0, T0 = 0, OS = 0: normal operation T1 = 1: P2 = fDIV, P6 = fref T0 = 1: 3-state charge pump OS = 1: operational amplifier output is switched off (varicap drive disable) BSC bandswitch control bit BSC = 0: bandswitch output is controlled by B1 and B0 bits according to Table 3 BSC = 1: bandswitch output is controlled by P7, P5 and P4 bits according to Table 4 B1, B0 bandswitch control bits P6, P2, P1 and P0 P6, P2 .. P0 = 1: open-collector outputs are active P6, P2 .. P0 = 0: outputs are in high impedance state P4, P5 and P7 P4, P5 and P7 = 1: outputs are at low level P4, P5 and P7 = 0: emitter follower outputs are active X don’t care Table 3 BS output control (BSC = 0) Table 4 BS output control (BSC = 1) B1 B0 VOLTAGE ON PIN BS P7 P5 P4 VOLTAGE ON PIN BS 0 0 0.25 V 1 1 0 0.25 V 0 1 2V 1 0 1 2V 1 0 4V 0 1 1 4V 1 1 VCC 1997 Mar 07 5 Philips Semiconductors Product specification 1.3 GHz bidirectional I2C-bus controlled synthesizer in its high-impedance state. The POR flag (Power-on reset) is set to logic 1 when VCC goes below 3 V and at power-on. It is reset when an end of data is detected by the device (end of a READ sequence). Control of the loop is made possible with the in-lock flag FL which indicates (FL = 1) when the loop is phase-locked. A built-in % level A/D converter is available on I/O port P6. This converter can be used to feed AFC information to the controller from the IF section of the television as illustrated in the typical application circuit in Fig.2. The relationship between bit A2, A1 and A0 and the input voltage on port P6 is given in Table 6. Read mode The read data format is summarised in Table 5. Data can be read out of the device by setting the R/W bit to logic 1. After the slave address has been recognized, the device generates an acknowledge pulse and the status word is transferred on the SDA line (MSB first). Data is valid on the SDA line during a HIGH of the SCL clock signal. A second data byte can be read out of the device if the processor generates an acknowledge on the SDA line. End of transmission will occur if no acknowledge from the processor occurs.The device will then release the data line to allow the processor to generate a STOP condition. When the port P6 is used as input, it must be programmed Table 5 TSA5518M Read data format BYTE DESCRIPTION 1 address 2, .. status byte(s) MSB 1 1 0 0 0 MA1(1) POR(2) FL(3) 0 0 0 A2(4) LSB ACKNOWLEDGE MA0(1) 1 LOW from device A1(4) A0(4) note 5 Notes 1. See Table 7. 2. POR: Power-on reset flag. (POR = 1 on power-on). 3. FL: in lock flag (FL = 1 when the loop is phase-locked). 4. A2, A1, A0: digital outputs of the 5 level A/D converter (see Table 6). Accuracy is 1⁄2 LSB. MSB is transmitted first. 5. Upon an acknowledge pulse from the controller, the device transfers the status byte again. If no acknowledge pulse from the controller is received, data read is terminated. Table 6 A/D converter levels Accuracy on the switching levels is ±0.02VCC. Address selection VOLTAGE APPLIED ON PIN P6 A2 A1 A0 0.6VCC to 5.5 V 1 0 0 0.45VCC to 0.6VCC 0 1 1 0.3VCC to 0.45VCC 0 1 0 0.15VCC to 0.3VCC 0 0 1 0 to 0.15VCC 0 0 0 Table 7 The module address contains programmable address bits (MA1 and MA0) which offer the possibility of having several synthesizers (up to 3) in one system by applying a specific voltage on AS input. The relationship between MA1 and MA0 and the input voltage on AS input is given in Table 7. Frequency lock flag (FL) definition When the FL flag is logic 1, the maximum frequency deviation dF from stable frequency can be expressed as: K VCO C1 + C2 df = ± ------------- × I CP × --------------------- with: C1 × C2 KO Address selection VOLTAGE APPLIED ON PIN AS MA1 MA0 0 to 0.1VCC 0 0 always valid 0 1 0.4 to 0.6VCC 1 0 0.9VCC to VCC 1 1 1997 Mar 07 KVCO = oscillator slope (Hz/V) ICP = charge pump current (A) KO = 4 × 106 C1, C2 = loop filter capacitors. 6 Philips Semiconductors Product specification 1.3 GHz bidirectional I2C-bus controlled synthesizer TSA5518M LIMITING VALUES Limiting values in accordance with the Absolute Maximum Rating System (IEC 134). SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT VCC supply voltage −0.3 +6 V Vi(XTAL) voltage at pin XTAL −0.3 +VCC V Vi(SCL) voltage at pin SCL −0.3 +6 V VSDA voltage at pin SDA −0.3 +6 V Vi(AS) voltage at pin AS −0.3 +VCC V Vo(BS) voltage at pin BS −0.3 +VCC V Vi(RF) voltage at pins RF1 and RF2 −0.3 +VCC V Vo output voltage at ports P0, P2 and P6 −0.3 +16 V output voltage at ports P4, P5 and P7 −0.3 +VCC V VPD output voltage at pin PD −0.3 +VCC V VUD output voltage at pin UD −0.3 +VCC V ISDA output current at pin SDA −1 +5 mA Io output current at pins P0, P1 and P2 −1 +20 mA open collector output current at pins P4, P5 and P7 emitter follower −1 +10 mA output current at pin P6 open collector −1 +10 mA Tstg storage temperature −40 +150 °C Tj(max) maximum junction temperature − 150 °C tsc(GND)(max) maximum short circuit time to GND one pin to GND (VCC = 5.5 V; GND = 0 V) − 10 s tsc(VCC)(max) maximum short circuit time to VCC one pin to VCC (VCC = 5.5 V; GND = 0 V) − 10 s HANDLING Every pin withstands the ESD test in accordance with MIL-STD-833C category B (2000 V). Every pin withstands the ESD test in accordance with Philips Semiconductor machine model 0 Ω, 200 pF. THERMAL CHARACTERISTICS SYMBOL Rth j-a 1997 Mar 07 PARAMETER CONDITIONS thermal resistance from junction to ambient in free air 7 VALUE UNIT 120 K/W Philips Semiconductors Product specification 1.3 GHz bidirectional I2C-bus controlled synthesizer TSA5518M CHARACTERISTICS VCC = 4.5 to 5.5 V; Tamb = −10 to +80 °C; unless otherwise specified. SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT Operating characteristics VCC supply voltage 4.5 − 5.5 V Tamb operating ambient temperature −10 − +80 °C fi input frequency 80 − 1300 MHz N divider 256 − 32767 ICC supply current 25 40 50 mA note 1 Crystal oscillator fosc oscillator frequency 3.2 4 4.48 MHz Zi(XTAL) input impedance on pin XTAL − − −450 Ω Vo(XTAL) output drive level on pin XTAL − 40 − mV Vi(RF) input level 12 − 300 mV fi = 80 to 150 MHz 9 − 300 mV fi = 150 to 1000 MHz 40 − 300 mV − 10 mV − 1000 MHz see Fig.3 fi = 1000 to 1300 MHz − flatness of the minimum sensitivity 150 prescaler input impedance see Fig.4 Output port P0, P1 and P2 (open collector); note 1 ILO output leakage current VPn = 13.5 V − − 10 µA Io(sink) output sink current note 2 − − 20 mA VOL LOW-level output voltage IPn = 15 mA − − 0.5 V CL(max) maximum capacitive loading on output VPn = 5.5 V pin − − 100 nF VCC − 1 − − V − 3 5 mA Output ports P4, P5 and P7 (emitter follower) VOH HIGH-level output voltage IOH HIGH-level output current Iport = 3 mA Output port P6 (open collector) ILO output leakage current VP6 = 13.5 V − 1 10 µA Io(sink) output sink current note 2 − − 10 mA VOL LOW-level output voltage IP6 = 5 mA − − 0.4 V CL(max) maximum capacitive loading on output VP6 = 5.5 V pin − − 100 nF Input port AS IIH HIGH-level input current VASH = VCC − − 10 µA IIL HIGH-level input current VASL = 0 V −10 − − µA Input port P6 IIH HIGH-level input current VP6H = 5.5 V − − 10 µA IIL LOW-level input current VP6L = 0 V −10 − − µA 1997 Mar 07 8 Philips Semiconductors Product specification 1.3 GHz bidirectional I2C-bus controlled synthesizer SYMBOL PARAMETER TSA5518M CONDITIONS MIN. TYP. MAX. UNIT Bandswitch output BS VO(BSA) output voltage for band A Isource(BSA) = 20 µA − 0.25 0.5 V VO(BSB) output voltage for band B Isource(BSB) = 20 µA; note 3 0.36 VCC 0.4 VCC 0.43 VCC V VO(BSC) output voltage for band C Isource(BSC) = 20 µA; note 3 0.7 VCC 0.8 VCC 0.9 VCC V I2C-bus inputs SCL, SDA; note 4 VIH HIGH-level input voltage 3 − 5.5 V VIL LOW-level input voltage − − 1.5 V hysi input hysteresis VCC = 5 V − 250 − mV IIH HIGH-level input current VBH = 5.5 V; VCC = 0 V − − 10 µA VBH = 5.5 V; VCC = 5.5 V − − 10 µA IIL LOW-level input current VBL = 0 V; VCC = 0 V −10 − − µA VBL = 0 V; VCC = 5.5 V −10 − − µA Output SDA (open collector) ILO output leakage current VSDAH = VCC − − 10 µA VO output voltage ISDAL = 3 mA − − 0.4 V Charge-pump output PD IOH(cp) HIGH level output charge pump current CP = 1 140 220 300 µA IOL(cp) LOW level output charge pump current CP = 0 25 50 75 µA VO output voltage in-lock 1.5 − 2.5 V ILZ OFF-state leakage current T0 = 1 −5 − +5 nA − − 200 mV − − 1.2 V Operational amplifier output UD (test mode: T0 = 1) Vo(off) output voltage when switched-off OS = 1; IUD = 1 mA Vo(loop) output voltage when the loop is closed OS = 0; T0 = 0 Notes 1. If the dividing number N is set to less than 256, a dividing number of 256 is used. 2. When a port is active, the collector voltage may not exceed 6 V. 3. Measured with all other ports active at max. current (10 mA or 20 mA respectively). 4. See “The I2C-bus and how to use it”, order no. 9398 393 40011. 1997 Mar 07 9 Philips Semiconductors Product specification 1.3 GHz bidirectional I2C-bus controlled synthesizer TSA5518M MGK117 103 handbook, halfpage Vi(rms) (mV) 102 guaranteed operating area 10 1 0 500 1000 f (MHz) 1500 Fig.3 I/O prescaler typical input sensitivity curve: VCC = 4.5 to 5.5 V; Tamb = −10 to +80 °C. 1 handbook, full pagewidth 0.5 2 0.2 5 10 +j 0 0.2 0.5 1 2 −j 10 ∞ 100 MHz 50 MHz 5 10 5 0.2 1.3 GHz 500 MHz 1 GHz 2 0.5 1 MGK118 Fig.4 Prescaler Smith-chart of typical input impedance: VCC = 5 V; reference value 50 Ω. 1997 Mar 07 10 Philips Semiconductors Product specification 1.3 GHz bidirectional I2C-bus controlled synthesizer TSA5518M INTERNAL PIN CONFIGURATION PIN PIN CONFIGURATION CONFIGURATION 7 and 8 1 and 20 VCC VCC to divider VCC 7 DOWN Vref VCC VCC UP 20 8 MGK121 VCC 10, 11, 13 and 14 VCC 1 10, 11, 13, 14 MGK127 2, 3 and 4 MGK120 VCC VCC 12 VCC VCC 2, 3, 4 12 MGK119 5 VCC MGK123 VCC 15 VCC 5 15 MGK122 1997 Mar 07 MGK124 11 Philips Semiconductors Product specification 1.3 GHz bidirectional I2C-bus controlled synthesizer PIN CONFIGURATION TSA5518M PIN 16 CONFIGURATION 19 VCC VCC VCC 16 19 MGK125 MGK126 1997 Mar 07 12 Philips Semiconductors Product specification 1.3 GHz bidirectional I2C-bus controlled synthesizer TSA5518M APPLICATION INFORMATION handbook, full pagewidth 22 kΩ 33 V Vtune filter dependent 22 kΩ BC847 15 nF 35 kΩ 100 nF UD P7 HIGH P5 MID P4 LOW BS BS RF2 1 nF RF1 RF2 RF1 20 2 19 3 18 4 17 5 16 TSA5518M n.c. 1 nF 1 6 15 7 14 8 GND 13 9 P1 12 11 10 PD XTAL 10 pF 5V n.c. 4 MHz VCC SCL 390 Ω 300 Ω 390 Ω 390 Ω SCL SDA 300 Ω SDA P2 P2 P8 1 kΩ P3 1 kΩ ADC AS P0 P0 P1 4.7 nF 4.7 nF 4.7 nF 4.7 nF 4.7 nF 4.7 nF 4.7 nF MGK116 Fig.5 Typical application. Loop filter Table 8 Loop filter DESCRIPTION Time span between actual phase lock and FL flag setting MIN. MAX. UNIT 1024 1152 µs 128 µs Time span between the loop 0 losing lock and FL flag resetting KVCO = 16 MHz/V (UHF band) handbook, halfpage ICP = 220 µA C1 = 100 nF, C2 = 15 nF df = ±67.5 kHz C2 C1 R MBH948 Fig.6 Loop filter. 1997 Mar 07 13 4.7 nF Philips Semiconductors Product specification 1.3 GHz bidirectional I2C-bus controlled synthesizer TSA5518M PACKAGE OUTLINE SSOP20: plastic shrink small outline package; 20 leads; body width 4.4 mm D SOT266-1 E A X c y HE v M A Z 11 20 Q A2 A (A 3) A1 pin 1 index θ Lp L 1 10 detail X w M bp e 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (1) e HE L Lp Q v w y Z (1) θ mm 1.5 0.15 0 1.4 1.2 0.25 0.32 0.20 0.20 0.13 6.6 6.4 4.5 4.3 0.65 6.6 6.2 1.0 0.75 0.45 0.65 0.45 0.2 0.13 0.1 0.48 0.18 10 0o Note 1. Plastic or metal protrusions of 0.20 mm maximum per side are not included. OUTLINE VERSION REFERENCES IEC JEDEC EIAJ ISSUE DATE 90-04-05 95-02-25 SOT266-1 1997 Mar 07 EUROPEAN PROJECTION 14 o Philips Semiconductors Product specification 1.3 GHz bidirectional I2C-bus controlled synthesizer If wave soldering cannot be avoided, the following conditions must be observed: SOLDERING Introduction • A double-wave (a turbulent wave with high upward pressure followed by a smooth laminar wave) soldering technique should be used. There is no soldering method that is ideal for all IC packages. Wave soldering is often preferred when through-hole and surface mounted components are mixed on one printed-circuit board. However, wave soldering is not always suitable for surface mounted ICs, or for printed-circuits with high population densities. In these situations reflow soldering is often used. • The longitudinal axis of the package footprint must be parallel to the solder flow and must incorporate solder thieves at the downstream end. Even with these conditions, only consider wave soldering SSOP packages that have a body width of 4.4 mm, that is SSOP16 (SOT369-1) or SSOP20 (SOT266-1). This text gives a very brief insight to a complex technology. A more in-depth account of soldering ICs can be found in our “IC Package Databook” (order code 9398 652 90011). During placement and before soldering, the package must be fixed with a droplet of adhesive. The adhesive can be applied by screen printing, pin transfer or syringe dispensing. The package can be soldered after the adhesive is cured. Reflow soldering Reflow soldering techniques are suitable for all SSOP packages. Reflow soldering requires solder paste (a suspension of fine solder particles, flux and binding agent) to be applied to the printed-circuit board by screen printing, stencilling or pressure-syringe dispensing before package placement. Maximum permissible solder temperature is 260 °C, and maximum duration of package immersion in solder is 10 seconds, if cooled to less than 150 °C within 6 seconds. Typical dwell time is 4 seconds at 250 °C. Several techniques exist for reflowing; for example, thermal conduction by heated belt. Dwell times vary between 50 and 300 seconds depending on heating method. Typical reflow temperatures range from 215 to 250 °C. A mildly-activated flux will eliminate the need for removal of corrosive residues in most applications. Repairing soldered joints Fix the component by first soldering two diagonallyopposite end leads. Use only a low voltage soldering iron (less than 24 V) applied to the flat part of the lead. Contact time must be limited to 10 seconds at up to 300 °C. When using a dedicated tool, all other leads can be soldered in one operation within 2 to 5 seconds between 270 and 320 °C. Preheating is necessary to dry the paste and evaporate the binding agent. Preheating duration: 45 minutes at 45 °C. Wave soldering Wave soldering is not recommended for SSOP packages. This is because of the likelihood of solder bridging due to closely-spaced leads and the possibility of incomplete solder penetration in multi-lead devices. 1997 Mar 07 TSA5518M 15 Philips Semiconductors Product specification 1.3 GHz bidirectional I2C-bus controlled synthesizer TSA5518M DEFINITIONS Data sheet status Objective specification This data sheet contains target or goal specifications for product development. Preliminary specification This data sheet contains preliminary data; supplementary data may be published later. Product specification This data sheet contains final product specifications. Limiting values Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Where application information is given, it is advisory and does not form part of the specification. LIFE SUPPORT APPLICATIONS These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale. PURCHASE OF PHILIPS I2C COMPONENTS Purchase of Philips I2C components conveys a license under the Philips’ I2C patent to use the components in the I2C system provided the system conforms to the I2C specification defined by Philips. This specification can be ordered using the code 9398 393 40011. 1997 Mar 07 16 Philips Semiconductors Product specification 1.3 GHz bidirectional I2C-bus controlled synthesizer NOTES 1997 Mar 07 17 TSA5518M Philips Semiconductors Product specification 1.3 GHz bidirectional I2C-bus controlled synthesizer NOTES 1997 Mar 07 18 TSA5518M Philips Semiconductors Product specification 1.3 GHz bidirectional I2C-bus controlled synthesizer NOTES 1997 Mar 07 19 TSA5518M Philips Semiconductors – a worldwide company Argentina: see South America Australia: 34 Waterloo Road, NORTH RYDE, NSW 2113, Tel. +61 2 9805 4455, Fax. +61 2 9805 4466 Austria: Computerstr. 6, A-1101 WIEN, P.O. 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No. 5, 80640 GÜLTEPE/ISTANBUL, Tel. +90 212 279 2770, Fax. +90 212 282 6707 Ukraine: PHILIPS UKRAINE, 4 Patrice Lumumba str., Building B, Floor 7, 252042 KIEV, Tel. +380 44 264 2776, Fax. +380 44 268 0461 United Kingdom: Philips Semiconductors Ltd., 276 Bath Road, Hayes, MIDDLESEX UB3 5BX, Tel. +44 181 730 5000, Fax. +44 181 754 8421 United States: 811 East Arques Avenue, SUNNYVALE, CA 94088-3409, Tel. +1 800 234 7381 Uruguay: see South America Vietnam: see Singapore Yugoslavia: PHILIPS, Trg N. Pasica 5/v, 11000 BEOGRAD, Tel. +381 11 625 344, Fax.+381 11 635 777 For all other countries apply to: Philips Semiconductors, Marketing & Sales Communications, Building BE-p, P.O. Box 218, 5600 MD EINDHOVEN, The Netherlands, Fax. +31 40 27 24825 Internet: http://www.semiconductors.philips.com © Philips Electronics N.V. 1997 SCA53 All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights. Printed in The Netherlands 547047/1200/01/pp20 Date of release: 1997 Mar 07 Document order number: 9397 750 01612