STMICROELECTRONICS TSDC05EIJT

TS4990
1.2 W audio power amplifier with active low standby mode
Features
■
Operating range from VCC = 2.2 V to 5.5 V
■
1.2 W output power @ VCC = 5 V, THD = 1%,
F = 1 kHz, with 8Ω load
■
Ultra-low consumption in standby mode (10 nA)
■
62 dB PSRR at 217 Hz in grounded mode
■
Near-zero pop and click
■
Ultra-low distortion (0.1%)
■
Unity gain stable
■
Available in 9-bump flip-chip, miniSO-8 and
DFN8 packages
TS4990IJT/TS4990EIJT - Flip-chip 9 bumps
Vin+
VOUT1
Vin-
VCC
GND
GND
STBY
VOUT2
BYPASS
TS4990IST - MiniSO-8
Applications
■
Mobile phones (cellular / cordless)
■
Laptop / notebook computers
■
PDAs
■
Portable audio devices
TS4990IQT - DFN8
Description
STANDBY
1
8
VOUT 2
BYPASS
2
7
GND
VIN+
3
6
Vcc
This audio power amplifier is capable of delivering
1.2 W of continuous RMS output power into an 8Ω
load at 5 V.
VIN-
4
5
VOUT 1
An externally controlled standby mode reduces
the supply current to less than 10 nA. It also
includes an internal thermal shutdown protection.
TS4990ID/TS4990IDT - SO-8
STBY
1
8
VOUT2
The unity-gain stable amplifier can be configured
by external gain setting resistors.
BYPASS
2
7
GND
VIN+
3
6
VCC
VIN-
4
5
VOUT1
The TS4990 is designed for demanding audio
applications such as mobile phones to reduce the
number of external components.
May 2008
Rev 12
1/32
www.st.com
32
Contents
TS4990
Contents
1
Absolute maximum ratings and operating conditions . . . . . . . . . . . . . 3
2
Typical application schematics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
3
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
4
Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
5
4.1
BTL configuration principle . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
4.2
Gain in a typical application . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
4.3
Low and high frequency response . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
4.4
Power dissipation and efficiency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
4.5
Decoupling of the circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
4.6
Wake-up time (tWU) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
4.7
Shutdown time . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
4.8
Pop performance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
4.9
Application example: differential input, BTL power amplifier . . . . . . . . . . 22
Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
5.1
Flip-chip package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
5.2
MiniSO-8 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
5.3
DFN8 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
5.4
SO-8 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
6
Ordering information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
7
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
2/32
TS4990
Absolute maximum ratings and operating conditions
1
Absolute maximum ratings and operating conditions
Table 1.
Absolute maximum ratings (AMR)
Symbol
VCC
Vin
Parameter
Value
Unit
6
V
GND to VCC
V
Supply voltage (1)
Input voltage
(2)
Toper
Operating free-air temperature range
-40 to + 85
°C
Tstg
Storage temperature
-65 to +150
°C
Maximum junction temperature
150
°C
Rthja
Thermal resistance junction to ambient
Flip chip (3)
MiniSO-8
DFN8
250
215
120
°C/W
Pdiss
Power dissipation
Tj
ESD
Internally limited
(4)
2
200
kV
V
Latch-up immunity
200
mA
Lead temperature (soldering, 10sec)
Lead temperature (soldering, 10sec) for lead-free version
250
260
°C
HBM: Human body model
MM: Machine model(5)
1. All voltage values are measured with respect to the ground pin.
2. The magnitude of the input signal must never exceed VCC + 0.3 V / GND - 0.3 V.
3. The device is protected in case of over temperature by a thermal shutdown active at 150° C.
4. Human body model: A 100 pF capacitor is charged to the specified voltage, then discharged through a 1.5 kΩ resistor
between two pins of the device. This is done for all couples of connected pin combinations while the other pins are floating.
5. Machine model: A 200 pF capacitor is charged to the specified voltage, then discharged directly between two pins of the
device with no external series resistor (internal resistor < 5 Ω). This is done for all couples of connected pin combinations
while the other pins are floating.
Table 2.
Operating conditions
Symbol
Parameter
VCC
Supply voltage
Vicm
Common mode input voltage range
VSTBY
Standby voltage input:
Device ON
Device OFF
Value
Unit
2.2 to 5.5
V
1.2V to VCC
V
1.35 ≤ VSTBY ≤ VCC
GND ≤ VSTBY ≤ 0.4
V
RL
Load resistor
≥4
Ω
TSD
Thermal shutdown temperature
150
°C
Rthja
Thermal resistance junction to ambient
Flip-chip (1)
MiniSO-8
DFN8(2)
100
190
40
°C/W
1. This thermal resistance is reached with a 100 mm2 copper heatsink surface.
2.
When mounted on a 4-layer PCB.
3/32
Typical application schematics
2
TS4990
Typical application schematics
Figure 1.
Typical application schematics
Rfeed
Vcc
+
Cfeed
VCC
Cs
Cin
Audio In
Rin
Vin-
Vout 1
Vin+
Speaker
8 Ohms
+
Vout 2
AV = -1
Bypass
Cb
Table 3.
TS4990
Component descriptions
Component
Functional description
Rin
Inverting input resistor that sets the closed loop gain in conjunction with Rfeed. This
resistor also forms a high pass filter with Cin (Fc = 1 / (2 x Pi x Rin x Cin)).
Cin
Input coupling capacitor that blocks the DC voltage at the amplifier input terminal.
Rfeed
Feed back resistor that sets the closed loop gain in conjunction with Rin.
Cs
Supply bypass capacitor that provides power supply filtering.
Cb
Bypass pin capacitor that provides half supply filtering.
Cfeed
AV
Exposed pad
4/32
Bias
+
Standby
GND
Standby
Control
+
Low pass filter capacitor allowing to cut the high frequency (low pass filter cut-off
frequency 1/ (2 x Pi x Rfeed x Cfeed)).
Closed loop gain in BTL configuration = 2 x (Rfeed / Rin).
DFN8 exposed pad is electrically connected to pin 7. See DFN8 package
information on page 28 for more information.
TS4990
3
Electrical characteristics
Electrical characteristics
Table 4.
Electrical characteristics when VCC = +5 V, GND = 0 V, Tamb = 25°C
(unless otherwise specified)
Symbol
Typ.
Max.
Unit
Supply current
No input signal, no load
3.7
6
mA
Standby current (1)
No input signal, VSTBY = GND, RL = 8Ω
10
1000
nA
Voo
Output offset voltage
No input signal, RL = 8Ω
1
10
mV
Pout
Output power
THD = 1% max, F = 1kHz, RL = 8Ω
ICC
ISTBY
THD + N
PSRR
Parameter
Min.
0.9
Total harmonic distortion + noise
Pout = 1Wrms, AV = 2, 20Hz ≤ F ≤ 20kHz, RL = 8Ω
Power supply rejection ratio(2)
RL = 8Ω, AV = 2, Vripple = 200mVpp, input grounded
F = 217Hz
F = 1kHz
55
55
1.2
W
0.2
%
dB
62
64
tWU
Wake-up time (Cb = 1µF)
90
tSTBY
Standby time (Cb = 1µF)
10
130
ms
µs
VSTBYH
Standby voltage level high
1.3
V
VSTBYL
Standby voltage level low
0.4
V
ΦM
Phase margin at unity gain
RL = 8Ω, CL = 500pF
65
Degrees
GM
Gain margin
RL = 8Ω, CL = 500pF
15
dB
GBP
Gain bandwidth product
RL = 8Ω
1.5
MHz
3
43
kΩ
ROUT-GND
Resistor output to GND (VSTBY ≤VSTBYL)
Vout1
Vout2
1. Standby mode is active when VSTBY is tied to GND.
2. All PSRR data limits are guaranteed by production sampling tests.
Dynamic measurements - 20*log(rms(Vout)/rms(Vripple)). Vripple is the sinusoidal signal superimposed upon
VCC.
5/32
Electrical characteristics
Table 5.
TS4990
Electrical characteristics when VCC = +3.3 V, GND = 0 V, Tamb = 25°C
(unless otherwise specified)
Symbol
Typ.
Max.
Unit
Supply current
No input signal, no load
3.3
6
mA
Standby current (1)
No input signal, VSTBY = GND, RL = 8Ω
10
1000
nA
Voo
Output offset voltage
No input signal, RL = 8Ω
1
10
mV
Pout
Output power
THD = 1% max, F = 1kHz, RL = 8Ω
ICC
ISTBY
Parameter
THD + N
Total harmonic distortion + noise
Pout = 400mWrms, AV = 2, 20Hz ≤ F ≤ 20kHz, RL = 8Ω
PSRR
Power supply rejection ratio(2)
RL = 8Ω, AV = 2, Vripple = 200mVpp, input grounded
F = 217Hz
F = 1kHz
Min.
375
55
55
500
mW
0.1
%
dB
61
63
tWU
Wake-up time (Cb = 1µF)
110
tSTBY
Standby time (Cb = 1µF)
10
140
ms
µs
VSTBYH
Standby voltage level high
1.2
V
VSTBYL
Standby voltage level low
0.4
V
ΦM
Phase margin at unity gain
RL = 8Ω, CL = 500pF
65
Degrees
GM
Gain margin
RL = 8Ω, CL = 500pF
15
dB
GBP
Gain bandwidth product
RL = 8Ω
1.5
MHz
4
44
kΩ
ROUT-GND
Resistor output to GND (VSTBY ≤ VSTBYL)
Vout1
Vout2
1. Standby mode is active when VSTBY is tied to GND.
2. All PSRR data limits are guaranteed by production sampling tests.
Dynamic measurements - 20*log(rms(Vout)/rms(Vripple)). Vripple is the sinusoidal signal superimposed upon
VCC.
6/32
TS4990
Electrical characteristics
Table 6.
Electrical characteristics when VCC = 2.6V, GND = 0V, Tamb = 25°C (unless
otherwise specified)
Symbol
Typ.
Max.
Unit
Supply current
No input signal, no load
3.1
6
mA
Standby current (1)
No input signal, VSTBY = GND, RL = 8Ω
10
1000
nA
Voo
Output offset voltage
No input signal, RL = 8Ω
1
10
mV
Pout
Output power
THD = 1% max, F = 1kHz, RL = 8Ω
ICC
ISTBY
Parameter
THD + N
Total harmonic distortion + noise
Pout = 200mWrms, AV = 2, 20Hz ≤ F ≤ 20kHz, RL = 8Ω
PSRR
Power supply rejection ratio(2)
RL = 8Ω, AV = 2, Vripple = 200mVpp, input grounded
F = 217Hz
F = 1kHz
Min.
220
55
55
300
mW
0.1
%
dB
60
62
tWU
Wake-up time (Cb = 1µF)
125
tSTBY
Standby time (Cb = 1µF)
10
150
ms
µs
VSTBYH
Standby voltage level high
1.2
V
VSTBYL
Standby voltage level low
0.4
V
ΦM
Phase margin at unity gain
RL = 8Ω, CL = 500pF
65
Degrees
GM
Gain margin
RL = 8Ω, CL = 500pF
15
dB
GBP
Gain bandwidth product
RL = 8Ω
1.5
MHz
6
46
kΩ
ROUT-GND
Resistor output to GND (VSTBY ≤VSTBYL)
Vout1
Vout2
1. Standby mode is active when VSTBY is tied to GND.
2. All PSRR data limits are guaranteed by production sampling tests.
Dynamic measurements - 20*log(rms(Vout)/rms(Vripple)). Vripple is the sinusoidal signal superimposed upon
VCC.
7/32
Electrical characteristics
Open loop frequency response
0
60
40
-120
-40
20
Gain (dB)
0
Phase (°)
Phase
-80
-20
-40
0
Gain
-40
20
Open loop frequency response
60
Gain
40
Gain (dB)
Figure 3.
Phase
-80
0
Phase (°)
Figure 2.
TS4990
-120
-20
Vcc = 5V
RL = 8Ω
Tamb = 25°C
-60
0.1
1
-160
10
100
1000
-40
-200
10000
-60
0.1
1
10
Frequency (kHz)
Figure 4.
-160
Vcc = 3.3V
RL = 8Ω
Tamb = 25°C
100
1000
-200
10000
Frequency (kHz)
Open loop frequency response
Figure 5.
0
60
Open loop frequency response
0
100
Gain
80
40
-120
-20
-80
40
Phase
20
-120
0
-160
Vcc = 2.6V
RL = 8Ω
Tamb = 25°C
-60
0.1
1
-20
10
100
1000
-200
10000
Figure 6.
-40
0.1
1
10
Figure 7.
0
100
-200
10000
Open loop frequency response
0
80
Gain
Gain
-40
-40
Phase
20
-120
0
-80
40
Phase
20
-120
0
-160
Vcc = 3.3V
CL = 560pF
Tamb = 25°C
1
-20
10
100
Frequency (kHz)
1000
-200
10000
-40
0.1
-160
Vcc = 2.6V
CL = 560pF
Tamb = 25°C
1
10
100
Frequency (kHz)
1000
-200
10000
Phase (°)
-80
40
Gain (dB)
60
Phase (°)
Gain (dB)
1000
100
60
8/32
100
Frequency (kHz)
Open loop frequency response
80
-160
Vcc = 5V
CL = 560pF
Tamb = 25°C
Frequency (kHz)
-40
0.1
Phase (°)
Gain (dB)
-80
Phase (°)
Gain (dB)
Phase
0
-20
-40
60
20
-40
Gain
-40
TS4990
Figure 8.
Electrical characteristics
PSRR vs. power supply
Figure 9.
0
PSRR (dB)
-20
-30
0
Vripple = 200mVpp
Av = 2
Input = Grounded
Cb = Cin = 1μF
RL >= 4Ω
Tamb = 25°C
-40
-10
Vcc :
2.2V
2.6V
3.3V
5V
PSRR (dB)
-10
PSRR vs. power supply
-50
-20
Vripple = 200mVpp
Av = 10
Input = Grounded
Cb = Cin = 1μF
RL >= 4Ω
Tamb = 25°C
Vcc :
2.2V
2.6V
3.3V
5V
-30
-40
-60
-50
-70
100
1000
10000
Frequency (Hz)
100000
Figure 10. PSRR vs. power supply
100
-30
0
Vripple = 200mVpp
Rfeed = 22kΩ
Input = Floating
Cb = 1μF
RL >= 4Ω
Tamb = 25°C
Vcc = 2.2, 2.6, 3.3, 5V
-10
PSRR (dB)
PSRR (dB)
-20
100000
Figure 11. PSRR vs. power supply
0
-10
1000
10000
Frequency (Hz)
-40
-50
-20
Vripple = 200mVpp
Av = 5
Input = Grounded
Cb = Cin = 1μF
RL >= 4Ω
Tamb = 25°C
Vcc :
2.2V
2.6V
3.3V
5V
-30
-40
-60
-50
-70
-80
100
1000
10000
Frequency (Hz)
-60
100000
Figure 12. PSRR vs. power supply
-30
100000
0
Vripple = 200mVpp
Av = 2
Input = Grounded
Cb = 0.1μF, Cin = 1μF
RL >= 4Ω
Tamb = 25°C
-10
-20
PSRR (dB)
PSRR (dB)
-20
1000
10000
Frequency (Hz)
Figure 13. PSRR vs. power supply
0
-10
100
Vcc = 5, 3.3, 2.5 & 2.2V
-40
-30
Vripple = 200mVpp
Rfeed = 22kΩ
Input = Floating
Cb = 0.1μF
RL >= 4Ω
Tamb = 25°C
Vcc = 2.2, 2.6, 3.3, 5V
-40
-50
-60
-50
-60
-70
100
1000
10000
Frequency (Hz)
100000
-80
100
1000
10000
Frequency (Hz)
100000
9/32
Electrical characteristics
TS4990
Figure 14. PSRR vs. DC output voltage
Figure 15. PSRR vs. DC output voltage
0
0
Vcc = 5V
Vripple = 200mVpp
RL = 8Ω
Cb = 1μF
AV = 2
Tamb = 25°C
PSRR (dB)
-20
-30
Vcc = 5V
Vripple = 200mVpp
RL = 8Ω
Cb = 1μF
AV = 10
Tamb = 25°C
-10
PSRR (dB)
-10
-40
-20
-30
-50
-40
-60
-70
-5
-4
-3
-2
-1
0
1
2
3
Differential DC Output Voltage (V)
4
-50
-5
5
Figure 16. PSRR vs. DC output voltage
-30
-20
-30
-40
-50
-50
-60
-3.0 -2.5 -2.0 -1.5 -1.0 -0.5 0.0 0.5 1.0 1.5 2.0 2.5 3.0
-60
-5
Differential DC Output Voltage (V)
Figure 18. PSRR vs. DC output voltage
-3
-2
-1
0
1
2
3
Differential DC Output Voltage (V)
4
5
0
Vcc = 3.3V
Vripple = 200mVpp
RL = 8Ω
Cb = 1μF
AV = 2
Tamb = 25°C
-40
-10
PSRR (dB)
PSRR (dB)
-30
-4
Figure 19. PSRR vs. DC output voltage
0
-20
5
Vcc = 5V
Vripple = 200mVpp
RL = 8Ω
Cb = 1μF
AV = 5
Tamb = 25°C
-10
-40
-10
4
0
Vcc = 3.3V
Vripple = 200mVpp
RL = 8Ω
Cb = 1μF
AV = 5
Tamb = 25°C
PSRR (dB)
PSRR (dB)
-20
-3
-2
-1
0
1
2
3
Differential DC Output Voltage (V)
Figure 17. PSRR vs. DC output voltage
0
-10
-4
-20
Vcc = 3.3V
Vripple = 200mVpp
RL = 8Ω
Cb = 1μF
AV = 10
Tamb = 25°C
-30
-50
-40
-60
10/32
-70
-3.0 -2.5 -2.0 -1.5 -1.0 -0.5 0.0 0.5 1.0 1.5 2.0 2.5 3.0
-50
-3.0 -2.5 -2.0 -1.5 -1.0 -0.5 0.0 0.5 1.0 1.5 2.0 2.5 3.0
Differential DC Output Voltage (V)
Differential DC Output Voltage (V)
TS4990
Electrical characteristics
Figure 20. PSRR vs. DC output voltage
Figure 21. PSRR vs. DC output voltage
0
0
Vcc = 2.6V
Vripple = 200mVpp
RL = 8Ω
Cb = 1μF
AV = 2
Tamb = 25°C
PSRR (dB)
-20
-30
Vcc = 2.6V
Vripple = 200mVpp
RL = 8Ω
Cb = 1μF
AV = 10
Tamb = 25°C
-10
PSRR (dB)
-10
-40
-20
-30
-50
-40
-60
-70
-2.5 -2.0 -1.5 -1.0 -0.5
0.0
0.5
1.0
1.5
2.0
-50
-2.5 -2.0 -1.5 -1.0 -0.5
2.5
Differential DC Output Voltage (V)
Figure 22. Output power vs. power supply
voltage
0.5
1.0
1.5
2.0
2.5
Figure 23. PSRR vs. DC output voltage
0
2.4
2.2 RL = 4Ω
F = 1kHz
2.0
BW < 125kHz
1.8 Tamb = 25°C
1.6
Vcc = 2.6V
Vripple = 200mVpp
RL = 8Ω
Cb = 1μF
AV = 5
Tamb = 25°C
-10
THD+N=10%
PSRR (dB)
Output power (W)
0.0
Differential DC Output Voltage (V)
1.4
1.2
1.0
0.8
-20
-30
-40
THD+N=1%
0.6
-50
0.4
0.2
0.0
2.5
3.0
3.5
4.0
Vcc (V)
4.5
5.0
-60
-2.5 -2.0 -1.5 -1.0 -0.5
5.5
0.0
0.5
1.0
1.5
2.0
2.5
Differential DC Output Voltage (V)
Figure 24. PSRR at F = 217 Hz vs.
bypass capacitor
Figure 25. Output power vs. power supply
voltage
2.0
PSRR at 217Hz (dB)
-40
-50
-60
-70
-80
0.1
Av=2
Vcc:
2.6V
3.3V
5V
Av=5
Vcc:
2.6V
3.3V
5V
RL = 8Ω
F = 1kHz
1.6 BW < 125kHz
Tamb = 25°C
1.4
1.8
Output power (W)
Av=10
Vcc:
2.6V
3.3V
5V
-30
THD+N=10%
1.2
1.0
0.8
0.6
THD+N=1%
0.4
Tamb=25°C
1
Bypass Capacitor Cb ( F)
0.2
0.0
2.5
3.0
3.5
4.0
Vcc (V)
4.5
5.0
5.5
11/32
Electrical characteristics
TS4990
Figure 26. Output power vs. power supply
voltage
Figure 27. Output power vs. load resistor
2.2
RL = 16Ω
F = 1kHz
1.0
BW < 125kHz
Tamb = 25°C
0.8
Vcc = 5V
F = 1kHz
BW < 125kHz
Tamb = 25°C
2.0
1.8
Output power (W)
Output power (W)
1.2
THD+N=10%
0.6
0.4
THD+N=1%
1.6
1.4
THD+N=10%
1.2
1.0
0.8
0.6
THD+N=1%
0.4
0.2
0.2
0.0
2.5
3.0
3.5
4.0
Vcc (V)
4.5
5.0
0.0
5.5
Figure 28. Output power vs. load resistor
8
12
16
20
24
Load Resistance ( )
28
32
Figure 29. Output power vs. power supply
voltage
0.6
0.6
0.4
THD+N=10%
0.3
0.2
0.5
Output power (W)
Vcc = 2.6V
F = 1kHz
BW < 125kHz
Tamb = 25°C
0.5
Output power (W)
4
RL = 32Ω
F = 1kHz
BW < 125kHz
Tamb = 25°C
0.4
THD+N=10%
0.3
0.2
THD+N=1%
THD+N=1%
0.1
0.0
4
8
12
16
20
24
Load Resistance ( )
0.1
28
0.0
32
Figure 30. Output power vs. load resistor
3.0
3.5
4.0
Vcc (V)
4.5
5.0
5.5
Figure 31. Power dissipation vs. Pout
1.4
Vcc = 3.3V
F = 1kHz
BW < 125kHz
Tamb = 25°C
0.8
THD+N=10%
0.6
0.4
Power Dissipation (W)
1.0
Output power (W)
2.5
Vcc=5V
1.2 F=1kHz
THD+N<1%
RL=4Ω
1.0
0.8
0.6
RL=8Ω
0.4
0.2
0.2
THD+N=1%
0.0
12/32
8
16
24
Load Resistance ( )
RL=16Ω
32
0.0
0.0
0.2
0.4
0.6
0.8
1.0
1.2
Output Power (W)
1.4
1.6
TS4990
Electrical characteristics
Figure 33. Power derating curves
Flip-Chip Package Power Dissipation (W)
Figure 32. Power dissipation vs. Pout
0.6
Power Dissipation (W)
Vcc=3.3V
F=1kHz
0.5 THD+N<1%
RL=4Ω
0.4
0.3
0.2
RL=8Ω
0.1
RL=16Ω
0.0
0.0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
1.2
2
Heat sink surface ≈ 100mm
(See demoboard)
1.0
0.8
0.6
0.4
0.2
0.0
No Heat sink
0
25
50
Figure 34. Clipping voltage vs. power supply
voltage and load resistor
RL = 4Ω
Vcc=2.6V
F=1kHz
THD+N<1%
0.35
0.5
0.4
RL = 8Ω
0.3
0.2
0.1
0.25
0.20
0.15
RL=8Ω
0.10
0.05
RL=16Ω
3.0
3.5
4.0
4.5
0.00
0.0
5.0
0.1
Power supply Voltage (V)
0.3
0.4
Figure 37. Current consumption vs. power
supply voltage
4.0
Tamb = 25°C
No load
3.5 Tamb=25°C
RL = 4Ω
0.5
Current Consumption (mA)
Vout1 & Vout2
Clipping Voltage High side (V)
0.2
Output Power (W)
Figure 36. Clipping voltage vs. power supply
voltage and load resistor
0.6
150
RL=4Ω
0.30
RL = 16Ω
2.5
125
0.40
Tamb = 25°C
0.6
0.0
100
Figure 35. Power dissipation vs. Pout
Power Dissipation (W)
Vout1 & Vout2
Clipping Voltage Low side (V)
0.7
75
Ambiant Temperature ( C)
Output Power (W)
0.4
RL = 8Ω
0.3
0.2
0.1
3.0
2.5
2.0
1.5
1.0
0.5
RL = 16Ω
0.0
0.0
2.5
3.0
3.5
4.0
Power supply Voltage (V)
4.5
5.0
0
1
2
3
4
5
Power Supply Voltage (V)
13/32
Electrical characteristics
TS4990
Figure 38. Current consumption vs. standby
voltage @ VCC = 5V
Figure 39. Current consumption vs. standby
voltage @ VCC = 2.6V
4.0
4.0
3.0
2.5
2.0
1.5
1.0
Vcc = 5V
No load
Tamb=25°C
0.5
0.0
0
1
2
3
4
Current Consumption (mA)
Current Consumption (mA)
3.5
Vcc = 2.6V
3.5 No load
Tamb=25°C
3.0
2.5
2.0
1.5
1.0
0.5
0.0
0.0
5
0.5
Standby Voltage (V)
Figure 40. THD + N vs. output power
1.5
2.0
2.5
Figure 41. Current consumption vs. standby
voltage @ VCC = 3.3V
4.0
RL = 4Ω
F = 20Hz
Av = 2
Cb = 1μF
BW < 125kHz
1
Tamb = 25°C
Current Consumption (mA)
10
THD + N (%)
1.0
Standby Voltage (V)
Vcc=2.2V
Vcc=2.6V
0.1
Vcc = 3.3V
3.5 No load
Tamb=25°C
3.0
2.5
2.0
1.5
1.0
0.5
Vcc=3.3V
1E-3
0.01
0.1
Output Power (W)
Vcc=5V
0.0
0.0
1
1.0
1.5
2.0
2.5
3.0
Standby Voltage (V)
Figure 42. Current consumption vs. standby
voltage @ VCC = 2.2V
Figure 43. THD + N vs. output power
4.0
10
Vcc = 2.2V
3.5 No load
Tamb=25°C
3.0
THD + N (%)
Current Consumption (mA)
0.5
2.5
2.0
1.5
RL = 8Ω
F = 20Hz
Av = 2
Cb = 1μF
1 BW < 125kHz
Tamb = 25°C
Vcc=2.2V
Vcc=2.6V
0.1
1.0
0.5
Vcc=3.3V
0.0
0.0
0.5
1.0
1.5
Standby Voltage (V)
14/32
2.0
0.01
1E-3
0.01
0.1
Output Power (W)
Vcc=5V
1
TS4990
Electrical characteristics
Figure 44. THD + N vs. output power
Figure 45. THD + N vs. output power
10
10
Vcc=2.2V
Vcc=2.6V
0.1
Vcc=2.2V
Vcc=2.6V
0.1
Vcc=3.3V
0.01
1E-3
Vcc=5V
Vcc=3.3V
0.01
0.1
Output Power (W)
1
Figure 46. THD + N vs. output power
0.01
1E-3
Vcc=5V
0.01
0.1
Output Power (W)
1
Figure 47. THD + N vs. output power
10
10
RL = 4Ω
F = 20kHz
Av = 2
Cb = 1μF
BW < 125kHz
Tamb = 25°C
Vcc=2.2V
THD + N (%)
THD + N (%)
RL = 8Ω
F = 1kHz
Av = 2
Cb = 1μF
1 BW < 125kHz
Tamb = 25°C
THD + N (%)
THD + N (%)
RL = 16Ω
F = 20kHz
Av = 2
Cb = 1μF
1
BW < 125kHz
Tamb = 25°C
Vcc=2.6V
1
RL = 4Ω
F = 1kHz
Av = 2
Cb = 1μF
BW < 125kHz
1 Tamb = 25°C
Vcc=2.2V
Vcc=2.6V
0.1
Vcc=3.3V
0.1
1E-3
Vcc=3.3V
Vcc=5V
0.01
0.1
Output Power (W)
1
1E-3
Figure 48. THD + N vs. output power
10
Vcc=2.2V
THD + N (%)
THD + N (%)
0.1
1
Figure 49. THD + N vs. output power
10
RL = 16Ω
F = 1kHz
Av = 2
1 Cb = 1μF
BW < 125kHz
Tamb = 25°C
Vcc=5V
0.01
0.1
Output Power (W)
Vcc=2.6V
Vcc=3.3V
RL = 8Ω
F = 20kHz
Av = 2
Cb = 1μF
BW < 125kHz
1
Tamb = 25°C
Vcc=2.2V
Vcc=2.6V
0.1
0.01
1E-3
Vcc=3.3V
Vcc=5V
0.01
0.1
Output Power (W)
1
1E-3
0.01
0.1
Output Power (W)
Vcc=5V
1
15/32
Electrical characteristics
TS4990
Figure 50. THD + N vs. output power
Figure 51. THD + N vs. frequency
RL = 16Ω
F = 20kHz
Av = 2
Cb = 1μF
1
BW < 125kHz
Tamb = 25°C
RL=8Ω
Av=2
Cb = 1μF
Bw < 125kHz
Tamb = 25°C
Vcc=2.2V
THD + N (%)
THD + N (%)
10
Vcc=2.6V
0.1
Vcc=5V, Po=1W
0.1
Vcc=2.2V, Po=130mW
Vcc=3.3V
Vcc=5V
0.01
0.01
1E-3
0.01
0.1
Output Power (W)
1
Figure 52. SNR vs. power supply with
unweighted filter (20Hz to 20kHz)
100
10000 20k
1000
Frequency (Hz)
Figure 53. THD + N vs. frequency
110
1
RL=4Ω
Av=2
Cb = 1μF
Bw < 125kHz
Tamb = 25°C
RL=16Ω
105
100
THD + N (%)
Signal to Noise Ratio (dB)
20
RL=8Ω
95
RL=4Ω
90
Av = 2
85 Cb = 1μF
THD+N < 0.7%
Tamb = 25°C
80
2.5
3.0
Vcc=5V, Po=1.3W
Vcc=2.2V, Po=150mW
0.1
3.5
4.0
4.5
5.0
20
100
Figure 54. THD + N vs. frequency
10000 20k
1000
Frequency (Hz)
Power Supply Voltage (V)
Figure 55. SNR vs. power supply with
unweighted filter (20Hz to 20kHz)
0.1
0.01
16/32
RL=16Ω
Signal to Noise Ratio (dB)
THD + N (%)
95
RL=16Ω
Av=2
Cb = 1μF
Bw < 125kHz
Tamb = 25°C
Vcc=5V, Po=0.55W
Vcc=2.2V, Po=100mW
20
100
1000
Frequency (Hz)
10000 20k
90
85
RL=8Ω
RL=4Ω
80
Av = 10
75 Cb = 1μF
THD+N < 0.7%
Tamb = 25°C
70
2.5
3.0
3.5
4.0
Power Supply Voltage (V)
4.5
5.0
TS4990
Electrical characteristics
Figure 56. Signal to noise ratio vs. power
supply with a weighted filter
Figure 57. Output noise voltage
device ON
110
45
Output Noise Voltage ( Vrms)
Signal to Noise Ratio (dB)
RL=16Ω
105
100
RL=8Ω
RL=4Ω
95
90
Av = 2
85 Cb = 1μF
THD+N < 0.7%
Tamb = 25°C
80
2.5
3.0
3.5
4.0
4.5
35
Unweighted Filter
30
25
20
A Weighted Filter
15
10
5.0
Vcc=2.2V to 5.5V
Cb=1μF
RL=8Ω
Tamb=25°C
40
2
4
6
Closed Loop Gain
Power Supply Voltage (V)
Figure 58. Signal to noise ratio vs. power
supply with a weighted filter
10
Figure 59. Output noise voltage device in
Standby
100
2.0
RL=16Ω
1.8
Output Noise Voltage ( Vrms)
Signal to Noise Ratio (dB)
8
95
90
RL=8Ω
85
RL=4Ω
80
Av = 10
75 Cb = 1μF
THD+N < 0.7%
Tamb = 25°C
70
2.5
3.0
1.6
Unweighted Filter
1.4
1.2
1.0
A Weighted Filter
0.8
0.6
Vcc=2.2V to 5.5V
Cb=1μF
RL=8Ω
Tamb=25°C
0.4
0.2
3.5
4.0
Power Supply Voltage (V)
4.5
5.0
0.0
2
4
6
Closed Loop Gain
8
10
17/32
Application information
TS4990
4
Application information
4.1
BTL configuration principle
The TS4990 is a monolithic power amplifier with a BTL output type. BTL (bridge tied load)
means that each end of the load is connected to two single-ended output amplifiers. Thus,
we have:
Single-ended output 1 = Vout1 = Vout (V)
Single-ended output 2 = Vout2 = -Vout (V)
and Vout1 - Vout2 = 2Vout (V)
The output power is:
2
( 2V out )
RMS
P out = -----------------------------RL
For the same power supply voltage, the output power in BTL configuration is four times
higher than the output power in single-ended configuration.
4.2
Gain in a typical application
The typical application schematics are shown in Figure 1 on page 4.
In the flat region (no Cin effect), the output voltage of the first stage is (in Volts):
R feed
V out1 = ( – V in ) -------------R in
For the second stage: Vout2 = -Vout1 (V)
The differential output voltage is (in Volts):
R feed
V out2 – V out1 = 2V in -------------R in
The differential gain named gain (Gv) for more convenience is:
R feed
V out2 – V out1
= 2 -------------G v = ---------------------------------R in
V in
Vout2 is in phase with Vin and Vout1 is phased 180° with Vin. This means that the positive
terminal of the loudspeaker should be connected to Vout2 and the negative to Vout1.
4.3
Low and high frequency response
In the low frequency region, Cin starts to have an effect. Cin forms with Rin a high-pass filter
with a -3 dB cut-off frequency. FCL is in Hz.
1
F CL = -----------------------2πR in C in
In the high frequency region, you can limit the bandwidth by adding a capacitor (Cfeed) in
parallel with Rfeed. It forms a low-pass filter with a -3 dB cut-off frequency. FCH is in Hz.
1
F CH = -----------------------------------2πR feed C feed
18/32
TS4990
Application information
The graph in Figure 60 shows an example of Cin and Cfeed influence.
Figure 60. Frequency response gain vs. Cin and Cfeed
10
5
Gain (dB)
0
Cfeed = 330pF
Cfeed = 680pF
-5
-15
-20
Cin = 22nF
Rin = Rfeed = 22kΩ
Tamb = 25°C
Cin = 82nF
-25
10
4.4
Cfeed = 2.2nF
Cin = 470nF
-10
100
1000
Frequency (Hz)
10000
Power dissipation and efficiency
Hypotheses:
●
Load voltage and current are sinusoidal (Vout and Iout).
●
Supply voltage is a pure DC source (VCC).
The load can be expressed as:
V out = V PEAK sin ωt
(V)
and
V out
I out = -----------RL
(A)
and
2
V PEAK
P out = -----------------------2R L
(W)
Therefore, the average current delivered by the supply voltage is:
I CC
V
AVG
PEAK
= 2 ---------------------
πR L
(A)
The power delivered by the supply voltage is:
P supply = V CC ⋅ I CC
AVG
(W)
19/32
Application information
TS4990
Therefore, the power dissipated by each amplifier is:
Pdiss = Psupply - Pout (W)
2 2V CC
P diss = ---------------------- P out – P out
π RL
and the maximum value is obtained when:
δP diss
------------------ = 0
δP out
and its value is:
2
P diss
Note:
max
2V CC
= -------------2
π RL
(W)
This maximum value is only dependent on power supply voltage and load values.
The efficiency is the ratio between the output power and the power supply:
P out
πV PEAK
η = ------------------- = ----------------------P supply
4V CC
The maximum theoretical value is reached when VPEAK = VCC, so:
π
----- = 78.5%
4
4.5
Decoupling of the circuit
Two capacitors are needed to correctly bypass the TS4990: a power supply bypass
capacitor Cs and a bias voltage bypass capacitor Cb.
Cs has particular influence on the THD+N in the high frequency region (above 7 kHz) and
an indirect influence on power supply disturbances. With a value for Cs of 1 µF, you can
expect THD+N levels similar to those shown in the datasheet.
In the high frequency region, if Cs is lower than 1 µF, it increases THD+N and disturbances
on the power supply rail are less filtered.
On the other hand, if Cs is higher than 1 µF, those disturbances on the power supply rail are
more filtered.
Cb has an influence on THD+N at lower frequencies, but its function is critical to the final
result of PSRR (with input grounded and in the lower frequency region).
If Cb is lower than 1 µF, THD+N increases at lower frequencies and PSRR worsens.
If Cb is higher than 1 µF, the benefit on THD+N at lower frequencies is small, but the benefit
to PSRR is substantial.
Note that Cin has a non-negligible effect on PSRR at lower frequencies. The lower the value
of Cin, the higher the PSRR.
20/32
TS4990
4.6
Application information
Wake-up time (tWU)
When the standby is released to put the device ON, the bypass capacitor Cb is not charged
immediately. Because Cb is directly linked to the bias of the amplifier, the bias will not work
properly until the Cb voltage is correct. The time to reach this voltage is called wake-up time
or tWU and specified in the electrical characteristics tables with Cb = 1 µF.
If Cb has a value other than 1 µF, refer to the graph in Figure 61 to establish the wake-up
time.
Figure 61. Typical wake-up time vs. Cb
600
Tamb=25°C
Startup Time (ms)
500
Vcc=3.3V
400
Vcc=2.6V
300
200
Vcc=5V
100
0
0.1
1
2
3
Bypass Capacitor Cb ( F)
4
4.7
Due to process tolerances, the maximum value of wake-up time is shown in Figure 62.
Figure 62. Maximum wake-up time vs. Cb
600
Tamb=25°C
Max. Startup Time (ms)
Vcc=3.3V
500
Vcc=2.6V
400
300
200
Vcc=5V
100
0
0.1
1
2
3
Bypass Capacitor Cb ( F)
4
4.7
Note:
The bypass capacitor Cb also has a typical tolerance of +/-20%. To calculate the wake-up
time with this tolerance, refer to the graph above (considering for example for Cb=1 µF in the
range of 0.8 µF≤Cb≤1.2 µF).
4.7
Standby time
When the standby command is set, the time required to put the two output stages in high
impedance and the internal circuitry in standby mode is a few microseconds. In standby
mode, the bypass pin and Vin pin are short-circuited to ground by internal switches. This
allows a quick discharge of Cb and Cin capacitors.
21/32
Application information
4.8
TS4990
Pop performance
Pop performance is intimately linked with the size of the input capacitor Cin and the bias
voltage bypass capacitor Cb.
The size of Cin is dependent on the lower cut-off frequency and PSRR values requested.
The size of Cb is dependent on THD+N and PSRR values requested at lower frequencies.
Moreover, Cb determines the speed with which the amplifier turns ON. In order to reach
near zero pop and click, the equivalent input constant time,
τ in = (Rin + 2kΩ) x Cin (s) with Rin ≥ 5kΩ
must not reach the τ in maximum value as indicated in Figure 63 below.
Figure 63. τ in max. versus bypass capacitor
160 Tamb=25°C
Vcc=3.3V
in max. (ms)
120
Vcc=2.6V
80
40
0
Vcc=5V
1
2
3
Bypass Capacitor Cb ( F)
4
By following the previous rules, the TS4990 can reach near zero pop and click even with
high gains such as 20 dB.
Example:
With Rin = 22 kΩ and a 20 Hz, -3 dB low cut-off frequency, Cin = 361 nF. So, Cin = 390 nF
with standard value which gives a lower cut-off frequency equal to 18.5 Hz. In this case,
(Rin + 2kΩ) x Cin = 9.36ms. By referring to the previous graph, if Cb = 1 µF and VCC = 5 V,
we read 20 ms max. This value is twice as high as our current value, thus we can state that
pop and click will be reduced to its lowest value.
Minimizing both Cin and the gain benefits both the pop phenomenon, and the cost and size
of the application.
4.9
Application example: differential input, BTL power amplifier
The schematics in Figure 64 show how to configure the TS4990 to work in differential input
mode. The gain of the amplifier is:
R2
G VDIFF = 2 ------R1
In order to reach the best performance of the differential function, R1 and R2 should be
matched at 1% max.
22/32
TS4990
Application information
Figure 64. Differential input amplifier configuration
R2
+
Vcc
Cin
VCC
Cs
R1
Vin-
Neg. Input
Vout 1
Cin
Vin+
R1
Speaker
8 Ohms
+
Pos. Input
R2
AV = -1
Bypass
Standby
Control
+
Cb
Bias
GND
Standby
Vout 2
+
TS4990
The input capacitor Cin can be calculated by the following formula using the -3 dB lower
frequency required. (FL is the lower frequency required).
1
C in ≈ --------------------2πR 1 F L
Note:
(F)
This formula is true only if:
1
F CB = ---------------------------------------2π ( R 1 + R 2 )C B
(Hz)
is 5 times lower than FL.
Example bill of materials
The bill of materials in Table 7 is for the example of a differential amplifier with a gain of 2
and a -3 dB lower cut-off frequency of about 80 Hz.
Table 7.
Bill of materials for differential input amplifier application
Pin name
Functional description
R1
20k / 1%
R2
20k / 1%
Cin
100nF
Cb=Cs
1µF
U1
TS4990
23/32
Package information
5
TS4990
Package information
In order to meet environmental requirements, STMicroelectronics offers these devices in
ECOPACK® packages. These packages have a lead-free second level interconnect. The
category of second level interconnect is marked on the package and on the inner box label,
in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering
conditions are also marked on the inner box label. ECOPACK is an STMicroelectronics
trademark. ECOPACK specifications are available at: www.st.com.
5.1
Flip-chip package information
Figure 65. Flip chip pinout (top view)
3
Vin+
2
VOUT1
1
Vin-
GND
BYPASS
A
B
C
■
VCC
GND
STBY
VOUT2
Balls are underneath
Figure 66. Marking (top view)
E
■
ST logo
■
Product and assembly code: XXX
A90 from Tours
90S from Shenzhen
■
Three-digit datecode: YWW
■
E symbol for lead-free only
■
The dot indicates pin A1
Symbol for
lead-free package
XXX
YWW
24/32
TS4990
Package information
Figure 67. Package mechanical data for 9-bump flip-chip package
1.60 mm
1.60 mm
0.5mm
0.5mm
∅ 0.25mm
■
Die size: 1.60 x 1.60 mm ±30µm
■
Die height (including bumps): 600µm
■
Bump diameter: 315µm ±50µm
■
Bump diameter before reflow: 300µm ±10µm
■
Bump height: 250µm ±40µm
■
Die height: 350µm ±20µm
■
Pitch: 500µm ±50µm
■
Coplanarity: 50µm max
■
* Back coating height: 100µm ±10µm
* Optional
100µm
600µm
Figure 68. Daisy chain mechanical data
1.6mm
3
1.6mm
2
1
A
B
C
The daisy chain sample features two-by-two pin connections. The schematics in Figure 68
illustrate the way pins connect to each other. This sample is used to test continuity on your
board. Your PCB needs to be designed the opposite way, so that pins that are unconnected
in the daisy chain sample, are connected on your PCB. If you do this, by simply connecting
an Ohmmeter between pin A1 and pin A3, the soldering process continuity can be tested.
25/32
Package information
TS4990
Figure 69. TS4990 footprint recommendations
75µm min.
100μm max.
500μm
500μm
Track
Φ=400μm typ.
150μm min.
Φ=340μm min.
500μm
500μm
Φ=250μm
Non Solder mask opening
Pad in Cu 18μm with Flash NiAu (2-6μm, 0.2μm max.)
Figure 70. Tape and reel specification (top view)
1.5
4
1
1
A
Die size Y + 70µm
A
8
Die size X + 70µm
4
All dimensions are in mm
User direction of feed
Device orientation
The devices are oriented in the carrier pocket with pin number A1 adjacent to the sprocket
holes.
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TS4990
5.2
Package information
MiniSO-8 package information
Figure 71. MiniSO-8 package mechanical drawing
Table 8.
MiniSO-8 package mechanical data
Dimensions
Ref.
Millimeters
Min.
Typ.
A
Inches
Max.
Min.
Typ.
1.1
A1
0
A2
0.75
b
Max.
0.043
0.15
0
0.95
0.030
0.22
0.40
0.009
0.016
c
0.08
0.23
0.003
0.009
D
2.80
3.00
3.20
0.11
0.118
0.126
E
4.65
4.90
5.15
0.183
0.193
0.203
E1
2.80
3.00
3.10
0.11
0.118
0.122
e
L
0.85
0.65
0.40
0.60
0.006
0.033
0.026
0.80
0.016
0.024
L1
0.95
0.037
L2
0.25
0.010
k
ccc
0°
0.037
8°
0.10
0°
0.031
8°
0.004
27/32
Package information
TS4990
5.3
DFN8 package information
Note:
DFN8 exposed pad (E2 x D2) is connected to pin number 7. For enhanced thermal
performance, the exposed pad must be soldered to a copper area on the PCB, acting as a
heatsink. This copper area can be electrically connected to pin7 or left floating.
Figure 72. DFN8 3x3x0.90mm package mechanical drawing (pitch 0.5mm)
Table 9.
DFN8 3x3x0.90mm package mechanical data (pitch 0.5mm)
Dimensions
Ref.
A
Millimeters
Min.
Typ.
Max.
Min.
Typ.
Max.
0.80
0.90
1.00
31.5
35.4
39.4
0.02
0.05
0.8
2.0
0.65
0.80
25.6
31.5
A1
A2
0.55
A3
217
0.20
7.9
b
0.18
0.25
0.30
7.1
9.8
11.8
D
2.85
3.00
3.15
112.2
118.1
124
D2
2.20
2.70
86.6
E
2.85
3.15
112.2
E2
1.40
1.75
55.1
e
L
ddd
28/32
Mils
3.00
0.50
0.30
0.40
106.3
118.1
124
68.9
19.7
0.50
0.08
11.8
15.7
19.7
3.1
TS4990
5.4
Package information
SO-8 package information
Figure 73. SO-8 package mechanical drawing
Table 10.
SO-8 package mechanical data
Dimensions
Ref.
Millimeters
Min.
Typ.
A
Inches
Max.
Min.
Typ.
1.75
0.069
A1
0.10
A2
1.25
b
0.28
0.48
0.011
0.019
c
0.17
0.23
0.007
0.010
D
4.80
4.90
5.00
0.189
0.193
0.197
H
5.80
6.00
6.20
0.228
0.236
0.244
E1
3.80
3.90
4.00
0.150
0.154
0.157
e
0.25
Max.
0.004
0.010
0.049
1.27
0.050
h
0.25
0.50
0.010
0.020
L
0.40
1.27
0.016
0.050
k
1°
8°
1°
8°
ccc
0.10
0.004
29/32
Ordering information
6
TS4990
Ordering information
Table 11.
Order codes
Order code
Temperature
range
Package
Packing
Marking
TS4990IJT
TS4990EIJT(1)
Flip chip, 9 bumps
Tape & reel
90
TSDC05IJT
TSDC05EIJT(2)
Flip chip, 9 bumps
Tape & reel
DC3
MiniSO-8
Tape & reel
K990
DFN8
Tape & reel
K990
FC + back coating
Tape & reel
90
SO-8
Tube or
Tape & reel
TS4990I
TS4990IST
-40°C, +85°C
TS4990IQT
TS4990EKIJT
TS4990ID
TS4990IDT
1. Lead-free Flip chip part number.
2. Lead free daisy chain part number.
30/32
TS4990
7
Revision history
Revision history
Table 12.
Document revision history
Date
Revision
1-Jul-2002
1
First release.
4-Sep-2003
2
Update mechanical data.
1-Oct-2004
3
Order code for back coating on flip-chip.
2-Apr-2005
4
Typography error on page 1: Mini-SO-8 pin connection.
May-2005
5
New marking for assembly code plant.
1-Jul-2005
6
Error on Table 4 on page 5. Parameters in wrong column.
28-Sep-2005
7
Updated mechanical coplanarity data to 50µm (instead of 60µm)
(see Figure 67 on page 25).
14-Mar-2006
8
SO-8 package inserted in the datasheet.
21-Jul-2006
9
Update of Figure 66 on page 24. Disclaimer update.
10
Corrected value of PSRR in Table 5 on page 6 from 1 to 61 (typical
value).
Moved Table 3: Component descriptions to Section 2: Typical
application schematics on page 4.
Merged daisy chain flip-chip order code table into Table 11: Order
codes on page 30.
17-Jan-2008
11
Corrected pitch error in DFN8 package information. Actual pitch is
0.5mm. Updated DFN8 package dimensions to correspond to
JEDEC databook definition (in previous versions of datasheet,
package dimensions were as in manufacturer’s drawing).
Corrected error in MiniSO-8 package information (L and L1 values
were inverted).
Reformatted package information.
21-May-2008
12
Corrected value of output resistance vs. ground in standby mode:
removed from Table 2, and added in Table 4, Table 5, and Table 6.
11-May-2007
Changes
31/32
TS4990
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