NEC UPA2780GR

DATA SHEET
MOS FIELD EFFECT TRANSISTOR
µ PA2780GR
SWITCHING
N-CHANNEL POWER MOS FET/SCHOTTKY BARRIER DIODE
DESCRIPTION
PACKAGE DRAWING (Unit: mm)
The µPA2780GR is N-channel Power MOSFET, which built a
Schottky Barrier Diode inside.
This product is designed for synchronous DC/DC converter
application.
8
5
1, 2, 3 : Source
4
: Gate
5, 6, 7, 8: Drain
FEATURES
• Built a Schottky Barrier Diode
• Low on-state resistance
RDS(on)1 = 6.2 mΩ TYP. (VGS = 10 V, ID = 7 A)
RDS(on)2 = 8.7 mΩ TYP. (VGS = 4.5 V, ID = 7 A)
RDS(on)3 = 10.3 mΩ TYP. (VGS = 4.0 V, ID = 7 A)
• Low Ciss: Ciss = 1200 pF TYP.
• Small and surface mount package (Power SOP8)
1.44
6.0 ±0.3
4
4.4
0.8
0.15
+0.10
–0.05
5.37 MAX.
0.05 MIN.
1.8 MAX.
1
0.5 ±0.2
0.10
1.27 0.78 MAX.
0.40
+0.10
–0.05
0.12 M
ORDERING INFORMATION
PART NUMBER
PACKAGE
µPA2780GR
Power SOP8
EQUIVALENT CIRCUIT
ABSOLUTE MAXIMUM RATINGS (TA = 25°C. All terminals are connected.)
Drain to Source Voltage (VGS = 0 V)
VDSS
30
V
Gate to Source Voltage (VDS = 0 V)
VGSS
±20
V
Drain Current (DC) [MOSFET]
ID(DC)
±14
A
ID(pulse)
±56
A
IF(AV)
2.5
A
PT
2
W
Drain Current (pulse)
Note1
Average Forward Current
Note2
[SCHOTTKY]
Total Power Dissipation
Note3
[MOSFET]
Total Power Dissipation
Note3
[SCHOTTKY]
Channel & Junction Temperature
Storage Temperature
PT
1
W
Tch, Tj
150
°C
Tstg
−55 to + 150
°C
Drain
Gate
Gate
Protection
Diode
Schottky
Diode
Source
Notes 1. PW ≤ 10 µs, Duty Cycle ≤ 1%
2. Rectangle wave, 50% Duty Cycle
2
3. Mounted on ceramic substrate of 1200 mm x 2.2 mm
Remark The diode connected between the gate and source of the transistor serves as a protector against ESD.
When this device actually used, an additional protection circuit is externally required if a voltage
exceeding the rated voltage may be applied to this device.
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all products and/or types are available in every country. Please check with an NEC Electronics
sales representative for availability and additional information.
Document No. G16419EJ1V0DS00 (1st edition)
Date Published April 2003 NS CP(K)
Printed in Japan
2002
µ PA2780GR
ELECTRICAL CHARACTERISTICS (TA = 25°C, unless otherwise noted. All terminals are connected.)
CHARACTERISTICS
Zero Gate Voltage Drain Current
SYMBOL
Note
IDSS
Gate Leakage Current
Drain to Source On-state Resistance
MIN.
TYP.
MAX.
UNIT
VDS = 24 V, VGS = 0 V
50
µA
VDS = 24 V, VGS = 0 V, TA = 125°C
10
mA
±10
µA
2.5
V
IGSS
VGS = ±20 V, VDS = 0 V
VGS(off)
VDS = 10 V, ID = 1 mA
RDS(on)1
VGS = 10 V, ID = 7 A
6.2
7.5
mΩ
RDS(on)2
VGS = 4.5 V, ID = 7 A
8.7
11.6
mΩ
RDS(on)3
13.7
mΩ
Gate Cut-off Voltage
Note
TEST CONDITIONS
1.0
VGS = 4.0 V, ID = 7 A
10.3
Input Capacitance
Ciss
VDS = 10 V
1200
pF
Output Capacitance
Coss
VGS = 0 V
570
pF
Reverse Transfer Capacitance
Crss
f = 1 MHz
160
pF
Turn-on Delay Time
td(on)
VDD = 15 V, ID = 7 A
10
ns
tr
VGS = 10 V
13
ns
td(off)
RG = 10 Ω
44
ns
11
ns
Rise Time
Turn-off Delay Time
Fall Time
tf
Total Gate Charge
QG
VDD = 15 V
12
nC
Gate to Source Charge
QGS
VGS = 5 V
4
nC
QGD
ID = 14 A
6
nC
Gate to Drain Charge
Body Diode Forward Voltage
Note
VF(S-D)
IF = 1 A, VGS = 0 V
0.45
0.5
V
IF = 1 A, VGS = 0 V, TA = 125°C
0.37
V
Reverse Recovery Time
trr
IF = 7 A, VGS = 0 V
31
ns
Reverse Recovery Charge
Qrr
di/dt = 100 A/µs
22
nC
Note Pulsed: PW ≤ 350 µs, Duty Cycle ≤ 2%
TEST CIRCUIT 1 SWITCHING TIME
TEST CIRCUIT 2 GATE CHARGE
D.U.T.
D.U.T.
VGS
RL
VGS
RG
PG.
Wave Form
VDD
0
VGS
10%
PG.
VDS
90%
VGS
0
τ
τ = 1 µs
Duty Cycle ≤ 1%
2
90%
VDS
VDS
10%
0
10%
Wave Form
td(on)
tr
ton
IG = 2 mA
RL
50 Ω
VDD
90%
td(off)
tf
toff
Data Sheet G16419EJ1V0DS
µ PA2780GR
TYPICAL CHARACTERISTICS (TA = 25°C. All terminals are connected.)
TOTAL POWER DISSIPATION vs.
AMBIENT TEMPERATURE
2.8
120
PT - Total Power Dissipation - W
dT - Percentage of Rated Power - %
DERATING FACTOR OF FORWARD BIAS
SAFE OPERATING AREA
100
80
60
40
20
0
0
20
40
60
80
100
Mouted on ceramic substrate of
2
1200 mm x 2.2 mm
2.4
MOSFET
2
1.6
1.2
SCHOTTKY
0.8
0.4
0
120 140 160
0
TA - Ambient Temperature - °C
20
40
60
80
100
120
140
160
TA - Ambient Temperature - °C
FORWARD BIAS SAFE OPERATING AREA
100
PW = 100 µs
ID(pulse)
10
1 ms
RDS(on) Limited
(at VGS = 10 V)
1
10 ms
Power Dissipation Limited
100 ms
0.1
DC
Single pulse
Mounted on ceramic substrate
of 1200 mm2 x 2.2 mm
0.01
0.01
0.1
1
10
100
VDS - Drain to Source Voltage - V
TRANSIENT THERMAL RESISTANCE vs. PULSE WIDTH (MOSFET)
1000
rth(t) - Transient Thermal Resistance - °C/W
ID - Drain Current - A
ID(DC)
Rth(ch-A) = 62.5°C/W
100
10
1
Single pulse
2
Mounted on ceramic substrate of 1200 mm x 2.2 mm
0.1
1m
10 m
100 m
1
10
100
1000
PW - Pulse Width - s
Data Sheet G16419EJ1V0DS
3
µ PA2780GR
TRANSIENT THERMAL RESISTANCE vs. PULSE WIDTH (SCHOTTKY)
rth(t) - Transient Thermal Resistance - °C/W
1000
Rth(j-A) = 125°C/W
100
10
1
Single pulse
2
Mounted on ceramic substrate of 1200 mm x 2.2 mm
0.1
1m
10 m
100 m
1
10
100
1000
PW - Pulse Width - s
DRAIN CURRENT vs. DRAIN TO SOURCE VOLTAGE
GATE CUT-OFF VOLTAGE vs.
CHANNEL TEMPERATURE
80
VGS(off) - Gate Cut-off Voltage - V
3
60
VGS = 10 V
4.5 V
50
40
4.0 V
30
20
10
0
RDS(on) - Drain to Source On-state Resistance - mΩ
VDS = 10 V
ID = 1 mA
2
1
Pulsed
0
0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9
0
−50 −25
1
25
50
75
100 125 150
Tch - Channel Temperature - °C
DRAIN TO SOURCE ON-STATE RESISTANCE vs.
DRAIN CURRENT
DRAIN TO SOURCE ON-STATE RESISTANCE vs.
GATE TO SOURCE VOLTAGE
30
Pulsed
15
VGS = 4.0 V
10
4.5 V
10 V
5
0
0.1
1
10
100
20
Pulsed
18
16
14
12
10
8
ID = 7 A
6
4
2
0
0
2
4
6
8
10 12 14 16 18 20
VGS - Gate to Source Voltage - V
ID - Drain Current - A
4
0
VDS - Drain to Source Voltage - V
RDS(on) - Drain to Source On-state Resistance - mΩ
ID - Drain Current - A
70
Data Sheet G16419EJ1V0DS
DRAIN TO SOURCE ON-STATE RESISTANCE vs.
CHANNEL TEMPERATURE
10000
20
Pulsed
15
VGS = 4.0 V
4.5 V
10
10 V
5
VGS = 0 V
f = 1 MHz
Ciss
1000
Coss
100
Crss
10
0
25
50
75 100 125 150 175
0.1
10
100
Tch - Channel Temperature - °C
VDS - Drain to Source Voltage - V
SWITCHING CHARACTERISTICS
DYNAMIC INPUT/OUTPUT CHARACTERISTICS
VDS - Drain to Source Voltage - V
td(off)
tf
tr
10
td(on)
VDD = 15 V
VGS = 10 V
RG = 10 Ω
1
0.1
1
10
40
8
35
7
VDD = 24 V
15 V
6V
30
25
6
5
VGS
20
3
10
2
5
1
VDS
ID = 14 A
0
100
4
15
0
ID - Drain Current - A
2
4
6
8
0
10 12 14 16 18 20
QG - Gate Charge - nC
SOURCE TO DRAIN DIODE FORWARD VOLTAGE
SOURCE TO DRAIN DIODE REVERCE CURRENT
100
100000
VGS = 0 V
Pulsed
10000
IR - Reverce Current - µA
IF - Diode Forward Current - A
1
VGS - Gate to Source Voltage - V
0
−50 −25
100
td(on), tr, td(off), tf - Switching Time - ns
CAPACITANCE vs. DRAIN TO SOURCE VOLTAGE
Ciss, Coss, Crss - Capacitance - pF
RDS(on) - Drain to Source On-state Resistance - mΩ
µ PA2780GR
TA = 25°C
10
125°C
1
1000
30 V
100
VDS = 24 V
10
1
0.1
0.1
0.01
0
0.2
0.4
0.6
0.8
1
1.2
VF(S-D) - Source to Drain Voltage - V
-50
0
50
100
150
Tj - Junction Temperature - °C
Data Sheet G16419EJ1V0DS
5
µ PA2780GR
• The information in this document is current as of April, 2003. The information is subject to change
without notice. For actual design-in, refer to the latest publications of NEC Electronics data sheets or
data books, etc., for the most up-to-date specifications of NEC Electronics products. Not all
products and/or types are available in every country. Please check with an NEC Electronics sales
representative for availability and additional information.
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written consent of NEC Electronics. NEC Electronics assumes no responsibility for any errors that may
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M8E 02. 11-1