DATA SHEET MOS FIELD EFFECT TRANSISTOR µPA2706GR SWITCHING N-CHANNEL POWER MOS FET DESCRIPTION PACKAGE DRAWING (Unit: mm) The µPA2706GR is N-Channel MOS Field Effect Transistor designed for DC/DC converters and power management 8 5 1, 2, 3 ; Source 4 ; Gate 5, 6, 7, 8 ; Drain applications of notebook computers. FEATURES PART NUMBER PACKAGE µ PA2706GR Power SOP8 4.4 0.15 0.05 MIN. ORDERING INFORMATION 6.0 ±0.3 4 5.37 MAX. 0.40 Drain to Source Voltage (VGS = 0 V) VDSS 30 V Gate to Source Voltage (VDS = 0 V) VGSS ±20 V Drain Current (DC) ID(DC) ±11 A ID(pulse) ±44 A Drain Current (pulse) Total Power Dissipation (TA = 25°C) Note2 PT 2.0 W Channel Temperature Tch 150 °C Storage Temperature Tstg −55 to + 150 °C IAS 11 A EAS 12.1 mJ Single Avalanche Current Note3 Single Avalanche Energy Note3 0.5 ±0.2 0.10 1.27 0.78 MAX. +0.10 –0.05 0.12 M ABSOLUTE MAXIMUM RATINGS (TA = 25°C, All terminals are connected) Note1 0.8 +0.10 –0.05 1.44 1 1.8 MAX. • Low on-state resistance RDS(on)1 = 15 mΩ MAX. (VGS = 10 V, ID = 5.5 A) RDS(on)2 = 22.5 mΩ MAX. (VGS = 4.5 V, ID = 5.5 A) • Low Ciss: Ciss = 660 pF TYP. (VDS = 10 V, VGS = 0 V) • Small and surface mount package (Power SOP8) EQUIVALENT CIRCUIT Drain Body Diode Gate Gate Protection Diode Source Notes 1. PW ≤ 10 µs, Duty Cycle ≤ 1% 2 2. Mounted on ceramic substrate of 1200 mm x 2.2 mm 3. Starting Tch = 25°C, VDD = 15 V, RG = 25 Ω, L = 100 µH, VGS = 20 → 0 V Caution Strong electric field, when exposed to this device, can cause destruction of the gate oxide and ultimately degrade the device operation. Steps must be taken to stop generation of static electricity as much as possible, and quickly dissipate it once, when it has occurred. Remark The diode connected between the gate and source of the transistor serves as a protector against ESD. When this device actually used, an additional protection circuit is externally required if a voltage exceeding the rated voltage may be applied to this device. The information in this document is subject to change without notice. Before using this document, please confirm that this is the latest version. Not all products and/or types are available in every country. Please check with an NEC Electronics sales representative for availability and additional information. Document No. G16236EJ1V0DS00 (1st edition) Date Published April 2003 NS CP(K) Printed in Japan 2003 µPA2706GR ELECTRICAL CHARACTERISTICS (TA = 25°C, All terminals are connected.) CHARACTERISTICS SYMBOL TEST CONDITIONS MIN. TYP. MAX. UNIT Zero Gate Voltage Drain Current IDSS VDS = 30 V, VGS = 0 V 10 µA Gate Leakage Current IGSS VGS = ±20 V, VDS = 0 V ±10 µA 2.5 V Gate Cut-off Voltage Forward Transfer Admittance Note Drain to Source On-state Resistance Note VGS(off) VDS = 10 V, ID = 1 mA 1.5 | yfs | VDS = 10 V, ID = 5.5 A 4.5 RDS(on)1 VGS = 10 V, ID = 5.5 A 11 15 mΩ RDS(on)2 VGS = 4.5 V, ID = 5.5 A 16 22.5 mΩ RDS(on)3 VGS = 4.0 V, ID = 5.5 A 19 29 mΩ S Input Capacitance Ciss VDS = 10 V 660 pF Output Capacitance Coss VGS = 0 V 270 pF Reverse Transfer Capacitance Crss f = 1 MHz 83 pF Turn-on Delay Time td(on) VDD = 15 V, ID = 5.5 A 9 ns tr VGS = 10 V 5 ns td(off) RG = 10 Ω 29 ns 6 ns Rise Time Turn-off Delay Time Fall Time tf Total Gate Charge QG VDD = 15 V 7.1 nC Gate to Source Charge QGS VGS = 5 V 2.1 nC QGD ID = 11 A 3.1 nC VF(S-D) IF = 11 A, VGS = 0 V 0.84 V Reverse Recovery Time trr IF = 11 A, VGS = 0 V 25 ns Reverse Recovery Charge Qrr di/dt = 100 A/µs 17 nC Gate to Drain Charge Body Diode Forward Voltage Note Note Pulsed: PW ≤ 350 µs, Duty Cycle ≤ 2% TEST CIRCUIT 1 AVALANCHE CAPABILITY D.U.T. RG = 25 Ω PG. VGS = 20 → 0 V TEST CIRCUIT 2 SWITCHING TIME D.U.T. L 50 Ω VGS RL Wave Form RG PG. VDD VGS 0 VGS 10% 90% VDD VDS 90% BVDSS IAS VDS VDS ID Starting Tch τ τ = 1 µs Duty Cycle ≤ 1% TEST CIRCUIT 3 GATE CHARGE 2 10% 0 10% Wave Form VDD PG. 90% VDS VGS 0 D.U.T. IG = 2 mA RL 50 Ω VDD Data Sheet G16236EJ1V0DS td(on) tr ton td(off) tf toff µPA2706GR TYPICAL CHARACTERISTICS (TA = 25°C) TOTAL POWER DISSIPATION vs. AMBIENT TEMPERATURE 120 2.8 PT - Total Power Dissipation - W dT - Percentage of Rated Power - % DERATING FACTOR OF FORWARD BIAS SAFE OPERATING AREA 100 80 60 40 20 Mounted on ceramic substrate of 2 1200 mm x 2.2 mm 2.4 2 1.6 1.2 0.8 0.4 0 0 0 25 50 75 100 125 150 175 0 TA - Ambient Temperature - °C 25 50 75 100 125 150 175 TA - Ambient Temperature - °C FORWARD BIAS SAFE OPERATING AREA ID(pulse) PW = 100 µs ID(DC) 1 ms 10 DC RDS(on) Limited (at VGS = 10 V) 1 10 ms 100 ms Power Dissipation Limited 0.1 TA = 25°C Single Pulse Mounted on ceramic substrate of 2 1200 mm x 2.2 mm 0.01 0.01 0.1 1 10 100 VDS - Drain to Source Voltage - V TRANSIENT THERMAL RESISTANCE vs. PULSE WIDTH 1000 Rth(t) - Transient Thermal Resistance - °C/W ID - Drain Current - A 100 Rth(ch-A) = 62.5°C/W 100 10 1 Mounted on ceramic substrate of 2 1200 mm × 2.2 mm Single Pulse TA = 25°C 0.1 1m 10 m 100 m 1 10 100 1000 PW - Pulse Width - s Data Sheet G16236EJ1V0DS 3 µPA2706GR DRAIN CURRENT vs. DRAIN TO SOURCE VOLTAGE FORWARD TRANSFER CHARACTERISTICS 50 100 VDS = 10 V Pulsed Pulsed 40 VGS = 10 V ID - Drain Current - A ID - Drain Current - A 45 4.5 V 35 30 4.0 V 25 20 15 10 TA = −55°C 25°C 75°C 150°C 1 0.1 10 5 0.01 0 0 0.5 1 1.5 0 2 2 GATE CUT-OFF VOLTAGE vs. CHANNEL TEMPERATURE 5 2.5 2 1.5 1 0.5 0 - 50 0 50 100 150 | yfs | - Forward Transfer Admittance - S 100 VDS = 10 V ID = 1 mA VDS = 10 V Pulsed 10 TA = −55°C 25°C 75°C 150°C 1 0.1 0.01 0.1 Tch - Channel Temperature - °C DRAIN TO SOURCE ON-STATE RESISTANCE vs. DRAIN CURRENT 30 Pulsed 25 VGS = 4.0 V 20 4.5 V 15 10 V 10 5 0 0.1 1 10 ID - Drain Current - A 1 10 100 ID - Drain Current - A 100 RDS(on) - Drain to Source On-state Resistance - mΩ RDS(on) - Drain to Source On-state Resistance - mΩ 4 FORWARD TRANSFER ADMITTANCE vs. DRAIN CURRENT 3 4 3 VGS - Gate to Source Voltage - V VDS - Drain to Source Voltage - V VGS(off) - Gate Cut-off Voltage - V 1 DRAIN TO SOURCE ON-STATE RESISTANCE vs. GATE TO SOURCE VOLTAGE 30 Pulsed 25 20 15 ID = 5.5 A 10 Data Sheet G16236EJ1V0DS 5 0 0 5 10 15 VGS - Gate to Source Voltage - V 20 DRAIN TO SOURCE ON-STATE RESISTANCE vs. CHANNEL TEMPERATURE CAPACITANCE vs. DRAIN TO SOURCE VOLTAGE 1000 40 Pulsed Ciss, Coss, Crss - Capacitance - pF 35 30 VGS = 4.0 V 25 4.5 V 20 15 10 V 10 Ciss Coss 100 Crss 5 VGS = 0 V f = 1 MHz 0 - 50 0 50 100 10 0.01 150 Tch - Channel Temperature - °C SWITCHING CHARACTERISTICS 10 100 6 30 VDS - Drain to Source Voltage - V td(on), tr, td(off), tf - Switching Time - ns 1 DYNAMIC INPUT/OUTPUT CHARACTERISTICS 1000 VDD = 15 V VGS = 10 V RG = 10 Ω 100 td(off) 10 td(on) tf tr ID = 11 A 25 5 VDD = 24 V 15 V 6V 4 20 VGS 15 3 2 10 VDS 1 5 0 0 1 0.1 1 10 0 100 2 4 6 8 QG - Gate Charge - nC ID - Drain Current - A SOURCE TO DRAIN DIODE FORWARD VOLTAGE REVERSE RECOVERY TIME vs. DIODE FORWARD CURRENT 1000 100 VGS = 10 V trr - Reverse Recovery Time - ns Pulsed IF - Diode Forward Current - A 0.1 VDS - Drain to Source Voltage - V VGS - Gate to Source Voltage - V RDS(on) - Drain to Source On-state Resistance - mΩ µPA2706GR 0V 10 1 0.1 0.01 VGS = 0 V di/dt = 100 A/µs 100 10 1 0 0.2 0.4 0.6 0.8 1 1.2 1 10 100 IF - Diode Forward Current - A VF(S-D) - Source to Drain Voltage - V Data Sheet G16236EJ1V0DS 5 µPA2706GR SINGLE AVALANCHE CURRENT vs. INDUCTIVE LOAD SINGLE AVALANCHE ENERGY DERATING FACTOR 120 VDD = 15 V VGS = 20 → 0 V RG = 25 Ω Starting T ch = 25°C 10 EAS = 12.1 mJ 1 0.00001 80 60 40 20 0 0.0001 0.001 0.01 L - Inductive Load - H 6 VDD = 15 V VGS = 20 → 0 V RG = 25 Ω IAS ≤ 11 A 100 Energy Derating Factor - % IAS - Single Avalanche Current - A 100 25 50 75 100 125 150 Starting Tch - Starting Channel Temperature - °C Data Sheet G16236EJ1V0DS µPA2706GR • The information in this document is current as of April, 2003. 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