AK8180C 2.5V, 3.3V LVCMOS 1:12 Clock Fanout Buffer AK8180C Features Description The AK8180C is a member of AKM’ｓ LVCMOS clock fanout buffer family designed for telecom, networking and computer applications, requiring a range of clocks with high performance and low skew. The AK8180C distributes 12 buffered clocks up to 350MHz. The 12 outputs can drive terminated 50 clock lines. The CLK_STOP control allows the output signal to start and stop only in a logic low state. The OE control sets the outputs to high-impedance mode. 12 LVCMOS outputs Selectable LVCMOS and LVPECL inputs 2.5V or 3.3V power supply Clock frequency up to 350MHz Output-to-output skew : 150ps max Synchronous output stop in logic state High-impedance output control Drive up to 24 series terminated clock lines Operating Temperature Range: -40 to +85℃ Package: 32-pin LQFP (Pb free) Pin compatible with MPC9448 AK8180C are derived from AKM’ｓ long-termexperienced clock device technology, and enable clock output to perform low skew. The AK8180C is available in a 7mm x 7mm 32-pin LQFP package. Block Diagram MS1305-E-00 May-2011 -1- AK8180C Q6 VDD Q7 OE VDD GND Q5 PCLKn GND VDD PCLKp CLK_STOP Q4 CCLK CLK_SEL GND Pin Descriptions Package: 32-Pin LQFP(Top View) Pin Name Pin Type CLK_SEL IN -- 2 CCLK IN PU Clock Input (LVCMOS) 3 PCLKp IN PU Clock Input (LVPECL) 4 PCLKn IN PU/PD Clock Input (LVPECL) 5 CLK_STOP IN PU Clock Output Disable (Active low) 6 OE IN PU Clock Output Enable (Disable=High impedance) Pin No. 1 Pullup /down Description Clock Input Select 7 VDD -- -- Power supply 8, GND -- -- Ground 9 Q11 OUT -- Clock output 10 VDD -- -- Power supply 11 Q10 OUT -- Clock output 12 GND -- -- Ground PU: Pull up PD: Pull down (continued on next page) May-2011 MS1305-E-00 -2- AK8180C Pin No. Pin Name Pin Type Pullup /down Description 13 Q9 OUT -- Clock output 14 VDD -- -- Power supply 15 Q8 OUT -- Clock output 16 GND -- -- Ground 17 Q7 OUT -- Clock output 18 VDD -- -- Power supply 19 Q6 OUT -- Clock output 20 GND -- -- Ground 21 Q5 OUT -- Clock output 22 VDD -- -- Power supply 23 Q4 OUT -- Clock output 24 GND -- -- Ground 25 Q3 OUT -- Clock output 26 VDD -- -- Power supply 27 Q2 OUT -- Clock output 28 GND -- -- Ground 29 Q1 OUT -- Clock output 30 VDD -- -- Power supply 31 Q0 OUT -- Clock output 32 GND -- -- Ground Ordering Information Part Number Marking Shipping Packaging Package Temperature Range AK8180C AK8180C Tape and Reel 32-pin LQFP -40 to 85 ℃ MS1305-E-00 May-2011 -3- AK8180C Absolute Maximum Rating Over operating free-air temperature range unless otherwise noted Items Supply voltage Input voltage Symbol Ratings Unit VDD -0.3 to 4.6 V Vin GND-0.3 to VDD+0.3 V IIN ±10 mA Tstg -55 to 130 C Input current (any pins except supplies) Storage temperature (1) Note (1) Stress beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only. Functional operation of the device at these or any other conditions beyond those indicated under “Recommended Operating Conditions” is not implied. Exposure to absolute-maximum-rating conditions for extended periods may affect device reliability. Electrical parameters are guaranteed only over the recommended operating temperature range. ESD Sensitive Device This device is manufactured on a CMOS process, therefore, generically susceptible to damage by excessive static voltage. Failure to observe proper handling and installation procedures can cause damage. AKM recommends that this device is handled with appropriate precautions. Recommended Operation Conditions Parameter Operating temperature Supply voltage (1) Symbol Conditions Min Ta Typ -40 VDD VDD5% (1) Power of 2.5V or 3.3V requires to be supplied from a single source. should be located close to each VDD pin. Max Unit 85 C 2.375 2.5 2.625 3.135 3.3 3.465 V A decoupling capacitor of 0.01F for power supply line General Specification Parameter Symbol Conditions Min Typ Unit Output Termination Voltage VTT ESD Protection 1 MM Machine model 200 V ESD Protection 2 HBM Human Body Model 2000 V 200 mA Latch-Up Immunity Power Dissipation Capacitance VDD/2 Max LU Per output Input Capacitance May-2011 V 10 pF 4.0 pF MS1305-E-00 -4- AK8180C Power Supply Current <3.3V> Parameter Full operation Symbol (1) Quiescent state VDD= 3.3V5%, Ta: -40 to +85℃ Min CCLK0=350MHz CLK_SEL=L IDD1 (1)(2) Conditions IDD2 (1) The outputs have no loads. Typ Max Unit 155 175 mA 1.0 2.0 mA MAX Unit (2) All inputs are in default state by the internal pull up/down resisters. DC Characteristics <3.3V> All specifications at VDD= 3.3V5%, Ta: -40 to +85℃, unless otherwise noted Parameter Symbol Conditions MIN TYP High Level Input Voltage VIH LVCMOS 2.0 VDD+0.3 V Low Level Input Voltage VIL LVCMOS -0.3 0.8 V Vpp LVPECL 250 Vcmr LCPECL 1.1 VDD-0.6 V -300 +300 μA Peak-to-Peak Input Voltage Common Mode Range Input Current (1) (2) I L1 High Level Output Voltage VOH Low Level Output Voltage VOL Vin=GND or VDD IOH= -24mA (3) IOL= +24mA IOL= +12mA (3) mV 2.4 V 0.55 0.30 Output Impedance V 17 (1) Vcmr(DC) is the crosspoint of the differential input signal. Functional operation is obtained when the crosspoint is within the Vcmr range and the input swing lies within the Vpp(DC) specification. (2) Input pull-up / pull down resistors influence input current. (3) The AK8180C is capable of driving 50 transmission lines of the incident edge. Each output drives one 50 parallel terminated transmission line to a termination voltage of VTT. Alternatively, the device drives up to two 50 series terminated transmission lines(for VDD=3.3V) or one 50 series terminated transmission line(for VDD=2.5V). AC Characteristics <3.3V> (1) All specifications at VDD= 3.3V5%, Parameter Ta: -40 to +85℃, unless otherwise noted Symbol Conditions MIN TYP MAX Unit 350 MHz Input Frequency fIN Pin: CCLK, PCLKp/n 0 Input Pulse Width tpwIN Pin: CCLK, PCLKp/n 1.4 Pin: PCLKp/n 400 1000 Vcmr Pin: PCLKp/n 1.3 VDD-0.8 trIN,tfOUT Pin: CCLK fOUT Pin: Q0-11 tPLH PCLK to any Q CCLK to any Q Peak-to-Peak Input Voltage Vpp Common Mode Range Input Rise/Fall time (2) (3) Output Frequency Propagation Delay tPHL ns 0.8 to 2.0V 0 1.0 0.8 1.8 1.6 mV 1.0 ns 350 MHz 3.0 2.8 ns Output Disable Time tPLZ,tPHZ 11 ns Output Enable Time tPZL,tPZH 11 ns Setup Time tS Hold Time tH Output-to-Output Skew tsk(O) 150 ps Device-to-Device Skew tskPP 2.0 ns Output Pulse Skew (4) tsk(P) CCLK PCLK 300 400 ps Output Duty Cycle DCOUT fOUT < 170MHz Output Rise/Fall Time t r, t f 0.55 to 2.4V CCLK to CLK_STOP 0.0 PCLK to CLK_STOP 0.0 CCLK to CLK_STOP 1.0 PCLK to CLK_STOP 1.5 DCREF =50% 45 0.1 MS1305-E-00 ns ns 50 55 % 1.0 ns May-2011 -5- AK8180C (1) AC characteristics apply for parallel output termination of 50 to VTT. (2) Vcmr(AC) is the crosspoint of the differential input signal. Normal AC operation is obtained when the crosspoint is within the Vcmr range and the input swing lies within the Vpp(AC) specification. Violation of Vcmr or Vpp impacts tPLH/PHL and tskD. (3) Violation of the 1.0 ns maximum input rise and fall time limit will affect the device propagation delay, devi ce-to-device skew, input pulse width, output duty cycle and maximum frequency specifications . (4) Output pulse skew tskO is the absolute difference of the propagation delay times:| tPLH - tPHL |. Power Supply Current <2.5V> Parameter Full operation Symbol (1) Quiescent state VDD= 2.5V5%, Ta: -40 to +85℃ IDD2.5-1 (1)(2) Conditions Min 2.5V5%, CCLK0=350MHz CLK_SEL=L IDD2.5-2 (1) The outputs have no loads. Typ Max Unit 115 134 mA 0.7 1.3 mA MAX Unit (2) All inputs are in default state by the internal pull up/down resisters. DC Characteristics <2.5V> All specifications at VDD= 2.5V5%, Ta: -40 to +85℃, unless otherwise noted Parameter Symbol Conditions MIN TYP High Level Input Voltage VIH LVCMOS 1.7 VDD+0.3 V Low Level Input Voltage VIL LVCMOS -0.3 0.7 V Peak-to-Peak Input Voltage Vpp LVPECL 250 Vcmr LVPECL Common Mode Range Input Current (1) (2) High Level Output Voltage Low Level Output Voltage IL1 Vin=GND or VDD VOH IOH= -15mA (3) IOL= +15mA (3) VOL mV 1.0 VDD-0.7 V -300 +300 μA 1.8 V 0.6 Output Impedance V 19 (1) Vcmr(DC) is the crosspoint of the differential input signal. Functional operation is obtained when the crosspoint is w ithin the Vcmr range and the input swing lies within the Vpp(DC) specification. (2) Input pull-up / pull down resistors influence input current. (3) The AK8180C is capable of driving 50 transmission lines of the incident edge. Each output drives one 50 parallel terminated transmission line to a termination voltage of VTT. Alternatively, the device drives up to two 50 series terminated transmission lines(for VDD=3.3V) or one 50 series terminated transmission lines(for VDD=2.5V). AC Characteristics <2.5V> (1) All specifications at VDD= 2.5V5%, Ta: -40 to +85℃, unless otherwise noted Parameter Symbol Conditions MIN TYP MAX Unit 350 MHz Input Frequency fIN Pin: CCLK, PCLKp/n 0 Input Pulse Width tpwIN Pin: CCLK, PCLKp/n 1.4 Pin: PCLKp/n 400 1000 Vcmr Pin: PCLKp/n 1.2 VDD-0.8 trIN,tfOUT Pin: CCLK fOUT Pin: Q0-11 tPLH PCLK to any Q CCLK to any Q Peak-to-Peak Input Voltage Vpp Common Mode Range Input Rise/Fall time (2) (3) Output Frequency Propagation Delay tPHL ns 0.8 to 2.0V 0 1.0 0.9 1.9 1.8 mV 1.0 ns 350 MHz 3.7 3.6 ns Output Disable Time tPLZ,tPHZ 11 ns Output Enable Time tPZL,tPZH 11 ns (continued on next page) May-2011 MS1305-E-00 -6- AK8180C Parameter Symbol Conditions MIN CCLK to CLK_STOP 0.0 PCLK to CLK_STOP 0.0 CCLK to CLK_STOP 1.0 PCLK to CLK_STOP 1.5 TYP MAX Unit Setup Time tS Hold Time tH Output-to-Output Skew tsk(O) 150 ps Device-to-Device Skew tskPP 2.7 ns Output Pulse Skew (4) tsk(P) ns ns CCLK 200 PCLK 300 Output Duty Cycle DCOUT DCREF =50% 45 Output Rise/Fall Time t r, t f 0.6 to 1.8V 0.1 50 ps 55 % 1.0 ns (1) AC characteristics apply for parallel output termination of 50 to VTT. (2) Vcmr(AC) is the crosspoint of the differential input signal. Normal AC operation is obtained wh en the crosspoint is within the Vcmr range and the input swing lies within the Vpp(AC) specification. Violation of Vcmr or Vpp impacts tPLH/PHL and tskD. Violation of the 1.0 ns maximum input rise and fall time limit will affect the device propagation dela y, device-to-device skew, input pulse width, output duty cycle and maximum frequency specifications. (3) (4) Output pulse skew tskO is the absolute difference of the propagation delay times:| tPLH - tPHL |. Figure 1 CCLK AC Test Reference Figure 2 PCLK AC Test Reference MS1305-E-00 May-2011 -7- AK8180C Figure 3 Propagation Delay Test Reference Figure 5 Output-to-Output Skew Figure 4 Propagation Delay Test Reference Figure 6 Output Pulse Skew Test Reference Figure 7 Output Duty Cycle Figure 8 Output Translation Test Reference Figure 9 Setup and Hold Time Test Reference May-2011 MS1305-E-00 -8- AK8180C Function Table The following table shows the inputs/outputs clock state configured through the control pins. Table 1: Control-Pin-Setting Function Table Control Pin Default 0 1 CLK_SEL 1 PCLK differential input selected CCLK input selected OE 1 Outputs disabled.(High impedance) Outputs enabled CLK_STOP 1 Outputs synchronously stopped in Outputs active logic low state. Application example of CLK_STOP MS1305-E-00 May-2011 -9- AK8180C Package Information Mechanical data 9.00±0.20 7.00 17 25 16 32 9 7.00 9.00±0.20 24 0.37±0.05 0.20 M 0゜～7゜ 1.60MAX 0.80 8 1.35～1.45 1 0.60±0.10 0.10 May-2011 S 0.05～0.15 0.09～0.20 S MS1305-E-00 - 10 - AK8180C Marking a: b: c: #1 Pin Index Part number Date code (7 digits) b c a (1) AKM is the brand name of AKM’ｓ IC’s. AKM and the logo - - are the brand of AKM’ｓ IC’s and identify that AKM continues to offer the best choice for high performance mixed-signal solution under this brand. RoHS Compliance All integrated circuits form Asahi Kasei Microdevices Corporation (AKM) assembled in “lead-free” packages* are fully compliant with RoHS. (*) RoHS compliant products from AKM are identified with “Pb free” letter indication on product label posted on the anti-shield bag and boxes. MS1305-E-00 May-2011 - 11 - AK8180C IMPORTANT NOTICE These products and their specifications are subject to change without notice. When you consider any use or application of these products, please make inquiries the sales office of Asahi Kasei Microdevices Corporation (AKM) or authorized distributors as to current status of the products. Descriptions of external circuits, application circuits, software and other related information contained in this document are provided only to illustrate the operation and application examples of the semiconductor products. You are fully responsible for the incorporation of these external circuits, application circuits, software and other related information in the design of your equipments. AKM assumes no responsibility for any losses incurred by you or third parties arising from the use of these information herein. AKM assumes no liability for infringement of any patent, intellectual property, or other rights in the application or use of such information contained herein. Any export of these products, or devices or systems containing them, may require an export license or other official approval under the law and regulations of the country of export pertaining to customs and tariffs, currency exchange, or strategic materials. AKM products are neither intended nor authorized for use as critical componentsNote1) in any safety, life support, or other hazard related device or systemNote2), and AKM assumes no responsibility for such use, except for the use approved with the express written consent by Representative Director of AKM. As used here: Note1) A critical component is one whose failure to function or perform may reasonably be expected to result, whether directly or indirectly, in the loss of the safety or effectiveness of the device or system containing it, and which must therefore meet very high standards of performance and reliability. Note2) A hazard related device or system is one designed or intended for life support or maintenance of safety or for applications in medicine, aerospace, nuclear energy, or other fields, in which its failure to function or perform may reasonably be expected to result in loss of life or in significant injury or damage to person or property. It is the responsibility of the buyer or distributor of AKM products, who distributes, disposes of, or otherwise places the product with a third party, to notify such third party in advance of the above content and conditions, and the buyer or distributor agrees to assume any and all responsibility and liability for and hold AKM harmless from any and all claims arising from the use of said product in the absence of such notification. May-2011 MS1305-E-00 - 12 -