BCR1AM-12A Triac Low Power Use REJ03G1248-0200 Rev.2.00 Nov 30, 2007 Features • IT (RMS) : 1 A • VDRM : 600 V • IFGTI , IRGTI, IRGT III : 7 mA • Non-Insulated Type • Planar Passivation Type Outline RENESAS Package code: PRSS0003EA-A (Package name: TO-92) 2 1. T1 Terminal 2. T2 Terminal 3. Gate Terminal 3 1 1 3 2 Applications Contactless AC switch, fan motor, rice-cooker, electric pot, air cleaner, heater, refrigerator, washing machine, electric fan, vending machine, trigger circuit for low and medium triac, and other general purpose control applications Maximum Ratings Parameter Symbol Repetitive peak off-state voltageNote1 Non-repetitive peak off-state voltageNote1 REJ03G1248-0200 Page 1 of 4 Rev.2.00 Nov 30, 2007 VDRM VDSM Voltage class 12 600 720 Unit V V BCR1AM-12A Parameter RMS on-state current Symbol IT (RMS) Ratings 1.0 Unit A Surge on-state current ITSM 10 A I2 t 0.41 A2s PGM PG (AV) VGM IGM Tj Tstg — 1 0.1 6 0.5 – 40 to +125 – 40 to +125 0.23 W W V A °C °C g I2t for fusing Peak gate power dissipation Average gate power dissipation Peak gate voltage Peak gate current Junction temperature Storage temperature Mass Conditions Commercial frequency, sine full wave Note3 360° conduction, Tc = 56°C 60Hz sinewave 1 full cycle, peak value, non-repetitive Value corresponding to 1 cycle of half wave 60Hz, surge on-state current Typical value Notes: 1. Gate open. Electrical Characteristics Parameter Symbol Repetitive peak off-state current On-state voltage IDRM VTM Rated value Min. Typ. Max. — — 0.5 — — 1.6 Unit mA V Test conditions Tj = 125°C, VDRM applied Tc = 25°C, ITM = 1.5 A, Instantaneous measurement Gate trigger voltageNote2 Ι ΙΙ ΙΙΙ VFGTΙ VRGTΙ VRGTΙΙΙ — — — — — — 2.0 2.0 2.0 V V V Tj = 25°C, VD = 6 V, RL = 6 Ω, RG = 330 Ω Gate trigger currentNote2 Ι ΙΙ ΙΙΙ IFGTΙ IRGTΙ IRGTΙΙΙ VGD Rth (j-c) — — — 0.1 — — — — — — 7 7 7 — 50 mA mA mA V °C/W Tj = 25°C, VD = 6 V, RL = 6 Ω, RG = 330 Ω Tj = 125°C, VD = 1/2 VDRM Junction to caseNote3 (dv/dt)c 2 — — V/µs Tj = 125°C Gate non-trigger voltage Thermal resistance Critical-rate of rise of off-state Note4 commutating voltage Notes: 2. Measurement using the gate trigger characteristics measurement circuit. 3. Case temperature is measured at the T2 terminal 1.5 mm away from the molded case. 4. Test conditions of the critical-rate of rise of off-state commutating voltage is shown in the table below. Test conditions 1. Junction temperature Tj = 125°C 2. Rate of decay of on-state commutating current (di/dt)c = – 0.5 A/ms 3. Peak off-state voltage VD = 400 V REJ03G1248-0200 Page 2 of 4 Rev.2.00 Nov 30, 2007 Commutating voltage and current waveforms (inductive load) Supply Voltage Time Main Current (di/dt)c Time Main Voltage (dv/dt)c Time VD BCR1AM-12A Gate Trigger Characteristics Test Circuits 6Ω 6Ω A 6V 330 Ω V Test Procedure I A V 330 Ω Test Procedure III REJ03G1248-0200 Page 3 of 4 Rev.2.00 Nov 30, 2007 V 330 Ω Test Procedure II 6Ω 6V A 6V BCR1AM-12A Package Dimensions Package Name TO-92* JEITA Package Code SC-43A RENESAS Code PRSS0003EA-A Previous Code MASS[Typ.] 0.23g Unit: mm φ5.0Max 11.5Min 5.0Max 4.4 1.25 1.25 3.6 1.1 Circumscribed circle φ0.7 Order Code Lead form Straight type Lead form Form A8 Standard packing Vinyl sack Vinyl sack Taping Quantity 500 500 2000 Standard order code Type name Type name – Lead forming code Type name – TB Note : Please confirm the specification about the shipping in detail. REJ03G1248-0200 Page 4 of 4 Rev.2.00 Nov 30, 2007 Standard order code example BCR1AM-12A BCR1AM-12A-A6 BCR1AM-12A-TB Sales Strategic Planning Div. Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan Notes: 1. This document is provided for reference purposes only so that Renesas customers may select the appropriate Renesas products for their use. Renesas neither makes warranties or representations with respect to the accuracy or completeness of the information contained in this document nor grants any license to any intellectual property rights or any other rights of Renesas or any third party with respect to the information in this document. 2. Renesas shall have no liability for damages or infringement of any intellectual property or other rights arising out of the use of any information in this document, including, but not limited to, product data, diagrams, charts, programs, algorithms, and application circuit examples. 3. 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