INTEGRATED CIRCUITS DATA SHEET TDA1575T FM front end circuit for CENELEC EN 55020 applications Preliminary specification Supersedes data of October 1990 File under Integrated Circuits, IC01 April 1993 Philips Semiconductors Preliminary specification FM front end circuit for CENELEC EN 55020 applications TDA1575T FEATURES • Bipolar integrated FM front end circuit, designed for use in car radios and home receivers • Fulfils CENELEC EN 55020 requirements • Radio frequency range of 76 to 90 MHz (Japan) or 87.5 to 108 MHz (Europe, USA) • Low noise oscillator, buffered oscillator output • Double balanced mixer • Internal buffered mixer driving • Linear IF amplifier, suitable for ceramic IF filters • Regulated reference voltage. QUICK REFERENCE DATA SYMBOL PARAMETER MIN. TYP. MAX. UNIT VP supply voltage 7 8.5 10 V IP supply current, without mixer − 23 − mA VREF reference voltage output − 4.2 − V ZI mixer input impedance − 14 − Ω NF noise figure of mixer − 9 − dB EMF1 3rd order intermodulation − 115 − dBµV VOSC oscillator buffer output signal (RMS value) 75 − − mV THD total harmonic distortion − −15 − dBC Gv IF gain − 30 − dB NF IF noise figure − 6.5 − dB ZI IF input impedance − 300 − Ω ZO IF output impedance − 300 − Ω EMF2 AGC wideband threshold (RMS value) − 17 − mV ORDERING INFORMATION PACKAGE EXTENDED TYPE NUMBER PINS PIN POSITION MATERIAL CODE TDA1575T 16 mini-pack plastic SOT109A(1) Note 1. SOT109-1; 1996 August 29. April 1993 2 Philips Semiconductors Preliminary specification FM front end circuit for CENELEC EN 55020 applications TDA1575T Coils TOKO L1: MC-108 514 HNE-150023S14; L = 78 nH, N = 4 turns L2: MC-111 E516 HNS-200057; L = 80 nH L3: A119 ACS-17114 FTT Fig.1 Block diagram and test circuit. April 1993 3 Philips Semiconductors Preliminary specification FM front end circuit for CENELEC EN 55020 applications TDA1575T PINNING SYMBOL PIN DESCRIPTION MIXI1 1 RF input 1 to mixer MIXI2 2 RF input 2 to mixer AGCI 3 HF input to automatic gain control GND 4 ground (0 V) VREF 5 reference voltage output OSCO 6 oscillator output OSCI1 7 oscillator input 1 OSCI2 8 oscillator input 2 LO 9 buffered oscillator output IFO 10 linear FM IF output IFI1 11 FM IF input 1 IFI2 12 FM IF input 2 VP 13 supply voltage (+8.5 V) MIXO1 14 mixer output 1 MIXO2 15 mixer output 2 AGCO 16 automatic gain control output Fig.2 Pin configuration. LIMITING VALUES Limiting values in accordance with the Absolute Maximum System (IEC 134). SYMBOL PARAMETER MIN. MAX. UNIT VP supply voltage (pin 13) 0 12 V V14, 15 voltage at mixer output 0 VP V Ptot total power dissipation 0 380 mW Tstg storage temperature range −55 +150 °C Tamb operating ambient temperature range −40 +85 °C VESD electrostatic handling (see note 1) all pins except 3 and 10 − ±2000 V pin 3 − +2000 V − −1000 V pin 10 − +1500 V − −2000 V Note to the limiting values 1. Equivalent to discharging a 100 pF capacitor through a 1.5 kΩ series resistor. April 1993 4 Philips Semiconductors Preliminary specification FM front end circuit for CENELEC EN 55020 applications TDA1575T CHARACTERISTICS VP = 8.5 V and Tamb = +25°C, measurements taken in Fig.1 with f0 = 98 MHz (EMF1) unless otherwise specified. SYMBOL PARAMETER CONDITIONS MIN. 7 TYP. 8.5 MAX. 10 UNIT VP supply voltage (pin 13) V IP supply current without mixer 16 23 30 mA VREF reference voltage (pin 5) I5 ≤ 3 mA 3.9 4.2 4.4 V Mixer I14+15 mixer supply current (pins 14 and 15) − 4 − mA V1,2 DC voltage input (pins 1 and 2) − 1 − V Z1,2 input impedance − 14 − Ω V14,15 DC output voltage (pins 14 and 15) 4 − 10 V C14,15 output capacitance − 13 − pF GP conversion power gain − 14 − dB note 1 EMF1IP3 3rd order intercept point − 115 − dBµV NF noise figure − 9 − dB − 11 − dB total noise figure including transforming network Oscillator V7,8 DC input voltage (pins 7 and 8) − 1.3 − V V6 DC output voltage (pin 6) − 2.0 − V ∆f residual FM at pin 6 f = 300 to 15000 Hz; de-emphasis 50 µs − 2.2 − Hz RL= 500 Ω; CL= 2 pF 75 − − mV Oscillator buffered output (pin 9) VO output signal (RMS value) V9 DC output voltage − 6 − V R9 DC output resistor − 950 − Ω THD total harmonic distortion − −15 − dBC fS spurious frequencies − −37 − dBC − 4 − kΩ pF EMF1 = 2 V; RS = 50 Ω; fOSC = 108.7 MHz Automatic gain control (AGC) R3 input resistance (pin 3) C3 input capacitance − 3 − V16 AGC output swing (DC) Figs 3 and 4 0.5 − VP − 0.3 V I16 output current at I3 = 0 V16 = 1⁄2VP −25 −50 −150 output current at U3 = 2 V V16 = 7 to 10 V 2 − 5 mA EMF2 threshold (RMS value) I16 = 0; V16 = 1⁄2VP; Figs 4 and 5 − 17 − mV April 1993 5 µA Philips Semiconductors Preliminary specification FM front end circuit for CENELEC EN 55020 applications SYMBOL TDA1575T PARAMETER Linear IF amplifier CONDITIONS MIN. TYP. MAX. UNIT IF = 10.7 MHz V11,12 DC input voltage (pins 11 and 12) − 1.25 − V Z12-11 input impedance 240 300 360 Ω C12-11 input capacitance − 13 − pF V10 DC output voltage (pin 10) − 4.4 − V Z10 output impedance 240 300 360 Ω C10 output capacitance − 3 − pF VO output signal (RMS value) Gv IF voltage gain (20 log (V10−4 / V12−11)) ∆Gv IF voltage gain deviation NF noise figure −1 dB compression − − 650 mV 27 30 − dB Tamb= −40 to +85 °C − 0 − dB RS = 300 Ω − 6.5 − dB Note 1. GP = 10 log (4Vo mix ×10.7 MHz) / (EMF2 × 98 MHz)2 × (RS1 / RML). Fig.3 April 1993 AGC output voltage V16 as a function of Vi3 RMS at I16 = 0, measured in test circuit Fig.1. Fig.4 6 AGC output current I16 as a function of Vi3 RMS at V16 = 8.5 V, measured in test circuit Fig.1. Philips Semiconductors Preliminary specification FM front end circuit for CENELEC EN 55020 applications TDA1575T APPLICATION INFORMATION Operating characteristics Measured in application circuit Fig.7, according to “CENELEC EN 55020, Chapter 4.1 (passive interference suppression)”. Measurements are shown in Figs. 8 and 9. SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT VS supply voltage 7 8.5 10 V IS total supply current − 37 − mA fRF tuning range of RF input 87.5 − 108 MHz Vtune tuning voltage of RF input 1 − 7 V G gain (20 log VO IF / Vant) − 43 − dB Vi ant input sensitivity S/N = 26 dB; Rant = 150 Ω − 2 − µV IR image rejection f = 98 MHz − 64 − dB RSS repeat spot suppression f = 98 MHz; Vi ant = 10 µV − 89 − dB DBS double beat suppression f1 = 93 MHz; f2 = 98 MHz CBS DBS1 ftune = 88 MHz − 81 − dB DBS2 ftune = 103 MHz − 80 − dB DBS3 ftune = 90.15 MHz − 85 − dB f1 = 90 MHz; f2 = 100.7 MHz ftune = 95 MHz − 90 − dB continuous beat suppression SG1: Wanted carrier; modulated with f = 1 kHz, ∆f = ±40 kHz (for audio reference) SG2: Unwanted carrier; modulated with f = 1 kHz, FM: ∆f = ±40 kHz (in band) or AM: m = 80% (out of band) increase level of SG2 until S/N = 26 dB w.r.t. wanted modulation (for car radio, home radio S/N = 40 dB) Fig.5 Set-up for CENELEC EN 55020 passive interference measurements. April 1993 7 Philips Semiconductors Preliminary specification FM front end circuit for CENELEC EN 55020 applications TDA1575T Fig.6 PCB layout of FM front end unit. April 1993 8 Philips Semiconductors Preliminary specification FM front end circuit for CENELEC EN 55020 applications Fig.7 Application circuit of FM front end with TDA1575T and FET-preamplifier. TDA1575T April 1993 9 Philips Semiconductors Preliminary specification FM front end circuit for CENELEC EN 55020 applications April 1993 TDA1575T Fig.8 Interference level as a function of detuning for S/N = 26 dB; IN-BAND passive interference (CENELEC EN 55020). Fig.9 Interference level as a function of detuning for S/N = 26 dB; OUT-OF-BAND passive interference (CENELEC EN 55020). 10 Philips Semiconductors Preliminary specification FM front end circuit for CENELEC EN 55020 applications TDA1575T Fig.10 Internal circuits. April 1993 11 Philips Semiconductors Preliminary specification FM front end circuit for CENELEC EN 55020 applications TDA1575T PACKAGE OUTLINE SO16: plastic small outline package; 16 leads; body width 3.9 mm SOT109-1 D E A X c y HE v M A Z 16 9 Q A2 A (A 3) A1 pin 1 index θ Lp 1 L 8 e 0 detail X w M bp 2.5 5 mm scale DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (1) e HE L Lp Q v w y Z (1) mm 1.75 0.25 0.10 1.45 1.25 0.25 0.49 0.36 0.25 0.19 10.0 9.8 4.0 3.8 1.27 6.2 5.8 1.05 1.0 0.4 0.7 0.6 0.25 0.25 0.1 0.7 0.3 0.069 0.010 0.057 0.004 0.049 0.01 0.019 0.0100 0.39 0.014 0.0075 0.38 0.16 0.15 0.050 0.039 0.016 0.028 0.020 0.01 0.01 0.004 0.028 0.012 inches 0.244 0.041 0.228 θ Note 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. REFERENCES OUTLINE VERSION IEC JEDEC SOT109-1 076E07S MS-012AC April 1993 EIAJ EUROPEAN PROJECTION ISSUE DATE 95-01-23 97-05-22 12 o 8 0o Philips Semiconductors Preliminary specification FM front end circuit for CENELEC EN 55020 applications TDA1575T SOLDERING Wave soldering Introduction Wave soldering techniques can be used for all SO packages if the following conditions are observed: There is no soldering method that is ideal for all IC packages. Wave soldering is often preferred when through-hole and surface mounted components are mixed on one printed-circuit board. However, wave soldering is not always suitable for surface mounted ICs, or for printed-circuits with high population densities. In these situations reflow soldering is often used. • A double-wave (a turbulent wave with high upward pressure followed by a smooth laminar wave) soldering technique should be used. • The longitudinal axis of the package footprint must be parallel to the solder flow. • The package footprint must incorporate solder thieves at the downstream end. This text gives a very brief insight to a complex technology. A more in-depth account of soldering ICs can be found in our “IC Package Databook” (order code 9398 652 90011). During placement and before soldering, the package must be fixed with a droplet of adhesive. The adhesive can be applied by screen printing, pin transfer or syringe dispensing. The package can be soldered after the adhesive is cured. Reflow soldering Reflow soldering techniques are suitable for all SO packages. Maximum permissible solder temperature is 260 °C, and maximum duration of package immersion in solder is 10 seconds, if cooled to less than 150 °C within 6 seconds. Typical dwell time is 4 seconds at 250 °C. Reflow soldering requires solder paste (a suspension of fine solder particles, flux and binding agent) to be applied to the printed-circuit board by screen printing, stencilling or pressure-syringe dispensing before package placement. A mildly-activated flux will eliminate the need for removal of corrosive residues in most applications. Several techniques exist for reflowing; for example, thermal conduction by heated belt. Dwell times vary between 50 and 300 seconds depending on heating method. Typical reflow temperatures range from 215 to 250 °C. Repairing soldered joints Fix the component by first soldering two diagonallyopposite end leads. Use only a low voltage soldering iron (less than 24 V) applied to the flat part of the lead. Contact time must be limited to 10 seconds at up to 300 °C. When using a dedicated tool, all other leads can be soldered in one operation within 2 to 5 seconds between 270 and 320 °C. Preheating is necessary to dry the paste and evaporate the binding agent. Preheating duration: 45 minutes at 45 °C. April 1993 13 Philips Semiconductors Preliminary specification FM front end circuit for CENELEC EN 55020 applications TDA1575T DEFINITIONS Data sheet status Objective specification This data sheet contains target or goal specifications for product development. Preliminary specification This data sheet contains preliminary data; supplementary data may be published later. Product specification This data sheet contains final product specifications. Limiting values Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Where application information is given, it is advisory and does not form part of the specification. LIFE SUPPORT APPLICATIONS These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale. April 1993 14 Philips Semiconductors Preliminary specification FM front end circuit for CENELEC EN 55020 applications TDA1575T NOTES April 1993 15 Philips Semiconductors – a worldwide company Argentina: see South America Australia: 34 Waterloo Road, NORTH RYDE, NSW 2113, Tel. +61 2 9805 4455, Fax. +61 2 9805 4466 Austria: Computerstr. 6, A-1101 WIEN, P.O. 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The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights. Printed in The Netherlands 547027/00/03/pp16 Date of release: April 1993 Document order number: 9397 750 02439