DTC144TT1 Preferred Device Bias Resistor Transistor NPN Silicon Surface Mount Transistor with Monolithic Bias Resistor Network This new series of digital transistors is designed to replace a single device and its external resistor bias network. The BRT (Bias Resistor Transistor) contains a single transistor with a monolithic bias network consisting of two resistors; a series base resistor and a base–emitter resistor. The BRT eliminates these individual components by integrating them into a single device. The use of a BRT can reduce both system cost and board space. The device is housed in the SC–59 package which is designed for low power surface mount applications. • • • • • • • Simplifies Circuit Design Reduces Board Space Reduces Component Count Moisture Sensitivity Level: 1 ESD Rating – Human Body Model: Class 1 ESD Rating – Machine Model: Class B The SC–59 package can be soldered using wave or reflow. The modified gull–winged leads absorb thermal stress during soldering eliminating the possibility of damage to the die. Available in 8 mm embossed tape and reel Use the Device Number to order the 7 inch/3000 unit reel. http://onsemi.com NPN SILICON BIAS RESISTOR TRANSISTOR PIN 2 BASE (INPUT) PIN 3 COLLECTOR (OUTPUT) R1 R2 PIN 1 EMITTER (GROUND) 3 1 MAXIMUM RATINGS (TA = 25°C unless otherwise noted) Symbol Value Unit Collector-Base Voltage VCBO 50 Vdc Collector-Emitter Voltage VCEO 50 Vdc IC 100 mAdc Symbol Max Unit PD 230 (Note 1.) 338 (Note 2.) 1.8 (Note 1.) 2.7 (Note 2.) mW Rating Collector Current SC–59 CASE 318D STYLE 1 MARKING DIAGRAM THERMAL CHARACTERISTICS Characteristic Total Device Dissipation TA = 25°C Derate above 25°C RθJA 540 (Note 1.) 370 (Note 2.) °C/W Thermal Resistance – Junction-to-Lead RθJL 264 (Note 1.) 287 (Note 2.) °C/W Junction and Storage Temperature Range TJ, Tstg –55 to +150 °C 8T = Specific Device Code M = Date Code ORDERING INFORMATION Device DTC144TT1 DEVICE MARKING AND RESISTOR VALUES Device Marking R1 (K) R2 (K) Shipping DTC144TT1 8T 47 ∞ 3000/Tape & Reel 1. FR–4 @ Minimum Pad 2. FR–4 @ 1.0 x 1.0 inch Pad May, 2002 – Rev. 1 8T M °C/W Thermal Resistance – Junction-to-Ambient Semiconductor Components Industries, LLC, 2002 2 1 Package Shipping SC–59 3000/Tape & Reel Preferred devices are recommended choices for future use and best overall value. Publication Order Number: DTC144TT1/D DTC144TT1 ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted) Characteristic Symbol Min Typ Max Unit Collector-Base Cutoff Current (VCB = 50 V, IE = 0) ICBO – – 100 nAdc Collector-Emitter Cutoff Current (VCE = 50 V, IB = 0) ICEO – – 500 nAdc Emitter-Base Cutoff Current (VEB = 6.0 V, IC = 0) IEBO – – 0.2 mAdc Collector-Base Breakdown Voltage (IC = 10 µA, IE = 0) V(BR)CBO 50 – – Vdc Collector-Emitter Breakdown Voltage (Note 1) (IC = 2.0 mA, IB = 0) V(BR)CEO 50 – – Vdc hFE 160 350 – VCE(sat) – – 0.25 Vdc Output Voltage (on) (VCC = 5.0 V, VB = 3.5 V, RL = 1.0 kΩ) VOL – – 0.2 Vdc Output Voltage (off) (VCC = 5.0 V, VB = 0.25 V, RL = 1.0 kΩ) VOH 4.9 – – Vdc R1 32.9 47 61.1 kΩ OFF CHARACTERISTICS ON CHARACTERISTICS (Note 1) DC Current Gain (VCE = 10 V, IC = 5.0 mA) Collector-Emitter Saturation Voltage (IC = 10 mA, IB = 1 mA) Input Resistor 1. Pulse Test: Pulse Width < 300 µs, Duty Cycle < 2.0% PD, POWER DISSIPATION (mW) 350 300 250 200 150 100 50 0 –50 RθJA = 370°C/W 0 50 100 TA, AMBIENT TEMPERATURE (°C) Figure 1. Derating Curve http://onsemi.com 2 150 DTC144TT1 TYPICAL APPLICATIONS FOR NPN BRTs +12 V ISOLATED LOAD FROM µP OR OTHER LOGIC Figure 2. Level Shifter: Connects 12 or 24 Volt Circuits to Logic +12 V VCC OUT IN LOAD Figure 3. Open Collector Inverter: Inverts the Input Signal Figure 4. Inexpensive, Unregulated Current Source http://onsemi.com 3 DTC144TT1 INFORMATION FOR USING THE SC–59 SURFACE MOUNT PACKAGE MINIMUM RECOMMENDED FOOTPRINT FOR SURFACE MOUNTED APPLICATIONS interface between the board and the package. With the correct pad geometry, the packages will self align when subjected to a solder reflow process. Surface mount board layout is a critical portion of the total design. The footprint for the semiconductor packages must be the correct size to insure proper solder connection 0.037 0.95 0.037 0.95 0.094 2.4 0.039 1.0 0.031 0.8 inches mm SC–59 POWER DISSIPATION The power dissipation of the SC–59 is a function of the pad size. This can vary from the minimum pad size for soldering to the pad size given for maximum power dissipation. Power dissipation for a surface mount device is determined by TJ(max), the maximum rated junction temperature of the die, RθJA, the thermal resistance from the device junction to ambient; and the operating temperature, TA. Using the values provided on the data sheet, PD can be calculated as follows. PD = the equation for an ambient temperature TA of 25°C, one can calculate the power dissipation of the device which in this case is 338 milliwatts. PD = 150°C – 25°C 370°C/W = 338 milliwatts The 370°C/W assumes the use of the recommended footprint on a glass epoxy printed circuit board to achieve a power dissipation of 338 milliwatts. Another alternative would be to use a ceramic substrate or an aluminum core board such as Thermal Clad. Using a board material such as Thermal Clad, the power dissipation can be doubled using the same footprint. TJ(max) – TA RθJA The values for the equation are found in the maximum ratings table on the data sheet. Substituting these values into SOLDERING PRECAUTIONS • The soldering temperature and time should not exceed The melting temperature of solder is higher than the rated temperature of the device. When the entire device is heated to a high temperature, failure to complete soldering within a short time could result in device failure. Therefore, the following items should always be observed in order to minimize the thermal stress to which the devices are subjected. • Always preheat the device. • The delta temperature between the preheat and soldering should be 100°C or less.* • When preheating and soldering, the temperature of the leads and the case must not exceed the maximum temperature ratings as shown on the data sheet. When using infrared heating with the reflow soldering method, the difference should be a maximum of 10°C. • • • 260°C for more than 10 seconds. When shifting from preheating to soldering, the maximum temperature gradient should be 5°C or less. After soldering has been completed, the device should be allowed to cool naturally for at least three minutes. Gradual cooling should be used as the use of forced cooling will increase the temperature gradient and result in latent failure due to mechanical stress. Mechanical stress or shock should not be applied during cooling * Soldering a device without preheating can cause excessive thermal shock and stress which can result in damage to the device. http://onsemi.com 4 DTC144TT1 SOLDER STENCIL GUIDELINES The stencil opening size for the surface mounted package should be the same as the pad size on the printed circuit board, i.e., a 1:1 registration. Prior to placing surface mount components onto a printed circuit board, solder paste must be applied to the pads. A solder stencil is required to screen the optimum amount of solder paste onto the footprint. The stencil is made of brass or stainless steel with a typical thickness of 0.008 inches. TYPICAL SOLDER HEATING PROFILE The line on the graph shows the actual temperature that might be experienced on the surface of a test board at or near a central solder joint. The two profiles are based on a high density and a low density board. The Vitronics SMD310 convection/infrared reflow soldering system was used to generate this profile. The type of solder used was 62/36/2 Tin Lead Silver with a melting point between 177–189°C. When this type of furnace is used for solder reflow work, the circuit boards and solder joints tend to heat first. The components on the board are then heated by conduction. The circuit board, because it has a large surface area, absorbs the thermal energy more efficiently, then distributes this energy to the components. Because of this effect, the main body of a component may be up to 30 degrees cooler than the adjacent solder joints. For any given circuit board, there will be a group of control settings that will give the desired heat pattern. The operator must set temperatures for several heating zones, and a figure for belt speed. Taken together, these control settings make up a heating “profile” for that particular circuit board. On machines controlled by a computer, the computer remembers these profiles from one operating session to the next. Figure 7 shows a typical heating profile for use when soldering a surface mount device to a printed circuit board. This profile will vary among soldering systems but it is a good starting point. Factors that can affect the profile include the type of soldering system in use, density and types of components on the board, type of solder used, and the type of board or substrate material being used. This profile shows temperature versus time. STEP 1 PREHEAT ZONE 1 RAMP" 200°C 150°C STEP 5 STEP 4 HEATING HEATING ZONES 3 & 6 ZONES 4 & 7 SPIKE" SOAK" STEP 2 STEP 3 VENT HEATING SOAK" ZONES 2 & 5 RAMP" DESIRED CURVE FOR HIGH MASS ASSEMBLIES 205° TO 219°C PEAK AT SOLDER JOINT 170°C 160°C 150°C 140°C 100°C 100°C 50°C STEP 6 STEP 7 VENT COOLING SOLDER IS LIQUID FOR 40 TO 80 SECONDS (DEPENDING ON MASS OF ASSEMBLY) DESIRED CURVE FOR LOW MASS ASSEMBLIES TIME (3 TO 7 MINUTES TOTAL) TMAX Figure 5. Typical Solder Heating Profile http://onsemi.com 5 DTC144TT1 PACKAGE DIMENSIONS SC–59 CASE 318D–04 ISSUE F A NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. L 3 S 2 DIM A B C D G H J K L S B 1 D G J C H MILLIMETERS MIN MAX 2.70 3.10 1.30 1.70 1.00 1.30 0.35 0.50 1.70 2.10 0.013 0.100 0.09 0.18 0.20 0.60 1.25 1.65 2.50 3.00 STYLE 1: PIN 1. EMITTER 2. BASE 3. COLLECTOR K http://onsemi.com 6 INCHES MIN MAX 0.1063 0.1220 0.0512 0.0669 0.0394 0.0511 0.0138 0.0196 0.0670 0.0826 0.0005 0.0040 0.0034 0.0070 0.0079 0.0236 0.0493 0.0649 0.0985 0.1181 DTC144TT1 Notes http://onsemi.com 7 DTC144TT1 Thermal Clad is a trademark of the Bergquist Company. ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. PUBLICATION ORDERING INFORMATION Literature Fulfillment: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303–675–2175 or 800–344–3860 Toll Free USA/Canada Fax: 303–675–2176 or 800–344–3867 Toll Free USA/Canada Email: [email protected] JAPAN: ON Semiconductor, Japan Customer Focus Center 4–32–1 Nishi–Gotanda, Shinagawa–ku, Tokyo, Japan 141–0031 Phone: 81–3–5740–2700 Email: [email protected] ON Semiconductor Website: http://onsemi.com For additional information, please contact your local Sales Representative. N. American Technical Support: 800–282–9855 Toll Free USA/Canada http://onsemi.com 8 DTC144TT1/D