STD2NC40-1 N-CHANNEL 400V - 4.7Ω - 1.5A IPAK PowerMesh II MOSFET TYPE STD2NC40-1 ■ ■ ■ ■ ■ VDSS RDS(on) ID 400V <5.5Ω 1.5A TYPICAL RDS(on) = 4.7Ω EXTREMELY HIGH dv/dt CAPABILITY 100% AVALANCHE TESTED NEW HIGH VOLTAGE BENCHMARK GATE CHARGE MINIMIZED DESCRIPTION The PowerMESH II is the evolution of the first generation of MESH OVERLAY. The layout refinements introduced greatly improve the Ron*area figure of merit while keeping the device at the leading edge for what concerns swithing speed, gate charge and ruggedness. 3 2 1 IPAK (SUFFIX“-1”) INTERNAL SCHEMATIC DIAGRAM APPLICATIONS ■ SWITH MODE LOW POWER SUPPLIES (SMPS) ■ CFL ABSOLUTE MAXIMUM RATINGS Symbol VDS VDGR VGS Parameter Value Unit Drain-source Voltage (VGS = 0) 400 V Drain-gate Voltage (RGS = 20 kΩ) 400 V Gate- source Voltage ±30 V ID Drain Current (continuos) at TC = 25°C 1.5 A ID Drain Current (continuos) at TC = 100°C 0.95 A 6 A IDM (■) PTOT Drain Current (pulsed) Total Dissipation at TC = 25°C 30 W Derating Factor 0.24 W/°C dv/dt Peak Diode Recovery voltage slope 3.5 V/ns Tstg Storage Temperature –60 to 150 °C 150 °C Tj Max. Operating Junction Temperature (•)Pulse width limited by safe operating area (1)ISD ≤1.5A, di/dt ≤100A/µs, VDD ≤ V (BR)DSS, Tj ≤ TJMAX. May 2000 This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to change without notice. 1/8 STD2NC40-1 THERMAL DATA Rthj-case Thermal Resistance Junction-case Max 4.16 °C/W Rthj-amb Thermal Resistance Junction-ambient Max 100 °C/W Thermal Resistance Case-sink Typ 1.5 °C/W Maximum Lead Temperature For Soldering Purpose 275 °C Rthc-sink Tl AVALANCHE CHARACTERISTICS Symbol Parameter Max Value Unit IAR Avalanche Current, Repetitive or Not-Repetitive (pulse width limited by Tj max) 1.5 A EAS Single Pulse Avalanche Energy (starting Tj = 25 °C, ID = IAR, VDD = 50 V) 125 mJ ELECTRICAL CHARACTERISTICS (TCASE = 25 °C UNLESS OTHERWISE SPECIFIED) OFF Symbol Parameter Test Conditions Min. Typ. Max. Unit Drain-source Breakdown Voltage ID = 250 µA, VGS = 0 IDSS Zero Gate Voltage Drain Current (V GS = 0) VDS = Max Rating 1 µA VDS = Max Rating, TC = 125 °C 50 µA IGSS Gate-body Leakage Current (VDS = 0) VGS = ±30V ±100 nA V(BR)DSS 400 V ON (1) Symbol Parameter Test Conditions VGS(th) Gate Threshold Voltage VDS = VGS, ID = 250µA R DS(on) Static Drain-source On Resistance VGS = 10V, ID = 0.7 A ID(on) On State Drain Current VDS > ID(on) x RDS(on)max, VGS = 10V Min. Typ. Max. Unit 2 3 4 V 4.7 5.5 Ω 1.5 A DYNAMIC Symbol gfs (1) 2/8 Parameter Forward Transconductance C iss Input Capacitance Coss Output Capacitance Crss Reverse Transfer Capacitance Test Conditions VDS > ID(on) x RDS(on)max, ID =0.7A VDS = 25V, f = 1 MHz, VGS = 0 Min. Typ. Max. Unit 1.1 S 108 pF 22.5 pF 0.4 pF STD2NC40-1 ELECTRICAL CHARACTERISTICS (CONTINUED) SWITCHING ON Symbol td(on) tr Parameter Turn-on Delay Time Rise Time Test Conditions Min. VDD = 200V, I D = 0.7A RG = 4.7Ω VGS = 10V (see test circuit, Figure 3) VDD = 320V, ID = 1.5A, VGS = 10V Typ. Max. Unit 7.5 ns 12 ns Qg Total Gate Charge Qgs Gate-Source Charge 2.1 nC Q gd Gate-Drain Charge 2.4 nC 6.1 8.2 nC SWITCHING OFF Symbol tr(Voff) Parameter Off-voltage Rise Time Test Condit ions Min. VDD = 320V, ID = 1.5A, R G = 4.7Ω, VGS = 10V (see test circuit, Figure 5) Typ. Max. Unit 20 ns tf Fall Time 27 ns tc Cross-over Time 29 ns SOURCE DRAIN DIODE Symbol ISD Parameter Test Conditions Min. Typ. Source-drain Current ISDM (1) Source-drain Current (pulsed) VSD (2) Forward On Voltage ISD = 1.5A, VGS = 0 trr Reverse Recovery Time ISD = 1.5A, di/dt = 100A/µs, VDD = 100V, T j = 150°C (see test circuit, Figure 5) Qrr IRRM Max. Unit 1.5 A 6 A 1.5 V 180 ns Reverse Recovery Charge 625 nC Reverse Recovery Current 5 A Note: 1. Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %. 2. Pulse width limited by safe operating area. Safe Operating Area Thermal Impedence 3/8 STD2NC40-1 Output Characteristics Transfer Characteristics Transconductance Static Drain-source On Resistance Gate Charge vs Gate-source Voltage Capacitance Variations 4/8 STD2NC40-1 Normalized Gate Threshold Voltage vs Temperature Normalized On Resistance vs Temperature Source-drain Diode Forward Characteristics 5/8 STD2NC40-1 Fig. 1: Unclamped Inductive Load Test Circuit Fig. 2: Unclamped Inductive Waveform Fig. 3: Switching Times Test Circuit For Resistive Load Fig. 4: Gate Charge test Circuit Fig. 5: Test Circuit For Inductive Load Switching And Diode Recovery Times 6/8 STD2NC40-1 TO-251 (IPAK) MECHANICAL DATA mm DIM. MIN. inch TYP. MAX. MIN. TYP. MAX. A 2.2 2.4 0.086 A1 0.9 1.1 0.035 0.043 A3 0.7 1.3 0.027 0.051 B 0.64 0.9 0.025 0.031 B2 5.2 5.4 0.204 B3 0.094 0.212 0.85 B5 0.033 0.3 0.012 B6 0.95 0.037 C 0.45 0.6 0.017 0.023 C2 0.48 0.6 0.019 0.023 D 6 6.2 0.236 0.244 E 6.4 6.6 0.252 0.260 G 4.4 4.6 0.173 0.181 H 15.9 16.3 0.626 0.641 L 9 9.4 0.354 0.370 L1 0.8 1.2 0.031 L2 0.8 0.047 1 0.031 0.039 A1 C2 A3 A C H B B3 = 1 = 2 G = = = E B2 = 3 B5 L D B6 L2 L1 0068771-E 7/8 STD2NC40-1 Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specification mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. 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