STL35NF10 N-CHANNEL 100V - 0.025Ω - 35A PowerFLAT™ LOW GATE CHARGE STripFET™ MOSFET PRELIMINARY DATA TYPE STL35NF10 ■ ■ ■ VDSS RDS(on) ID 100 V < 0.030 Ω 35 A TYPICAL RDS(on) = 0.025Ω IMPROVED DIE-TO-FOOTPRINT RATIO VERY LOW PROFILE PACKAGE DESCRIPTION This Power MOSFET is the second generation of STMicroelectronics unique “STripFET™” technology. The resulting transistor shows extremely low onresistance and minimal gate charge. The new PowerFLAT™ package allows a significant reduction in board space without compromising performance. PowerFLAT™(6x5) (Chip Scale Package) INTERNAL SCHEMATIC DIAGRAM APPLICATIONS ■ HIGH EFFICIENCY ISOLATED DC/DC CONVETERS ABSOLUTE MAXIMUM RATINGS Symbol Value Unit Drain-source Voltage (VGS = 0) 100 V Drain-gate Voltage (RGS = 20 kΩ) 100 V Gate- source Voltage ± 20 V Drain Current (continuos) at TC = 25°C Drain Current (continuos) at TC = 100°C 35 22 A A IDM (●) Drain Current (pulsed) 140 A PTOT Total Dissipation at TC = 25°C 80 W Derating Factor 0.64 W/°C Single Pulse Avalanche Energy 135 mJ Storage Temperature –65 to 150 °C Max. Operating Junction Temperature –55 to 150 °C VDS VDGR VGS ID EAS (1) Tstg Tj Parameter (●) Pulse width limited by safe operating area August 2001 (1) Starting Tj = 25°C, ID = 35A, VDD = 50V 1/6 STL35NF10 THERMAL DATA Rthj-case Thermal Resistance Junction-case Max Rthj-amb Thermal Resistance Junction-ambient Max 1.56 °C/W 50 °C/W ELECTRICAL CHARACTERISTICS (TCASE = 25 °C UNLESS OTHERWISE SPECIFIED) OFF Symbol V(BR)DSS IDSS IGSS Parameter Test Conditions Min. Typ. Max. 100 Unit Drain-source Breakdown Voltage ID = 250 µA, VGS = 0 V Zero Gate Voltage Drain Current (VGS = 0) VDS = Max Rating 1 µA VDS = Max Rating, TC = 125 °C 10 µA Gate-body Leakage Current (VDS = 0) VGS = ± 20V ±100 nA ON (1) Symbol Parameter Test Conditions VGS(th) Gate Threshold Voltage VDS = VGS, ID = 250µA RDS(on) Static Drain-source On Resistance VGS = 10 V, ID = 17.5 A Min. Typ. Max. Unit 2 2.8 4 V 0.025 0.030 Ω Typ. Max. Unit DYNAMIC Symbol gfs (1) 2/6 Parameter Test Conditions Forward Transconductance VDS =20 V, ID = 15 A Ciss Input Capacitance VDS = 25 V, f = 1 MHz, VGS = 0 Coss Output Capacitance Crss Reverse Transfer Capacitance Min. 18 S 1780 pF 265 pF 162 pF STL35NF10 ELECTRICAL CHARACTERISTICS (CONTINUED) SWITCHING ON Symbol td(on) tr Qg Qgs Qgd Parameter Test Conditions Min. Typ. Max. Unit 28 ns Rise Time VDD = 50 V, ID = 17.5 A RG = 4.7Ω VGS = 10V (see test circuit, Figure 1) 63 ns Total Gate Charge Gate-Source Charge Gate-Drain Charge VDD = 80 V, ID = 35 A, VGS = 10 V (see test circuit, Figure 2) 60 10 23 80 nC nC nC Typ. Max. Unit Turn-on Delay Time SWITCHING OFF Symbol td(off) tf Parameter Turn-off-Delay Time Fall Time Test Conditions Min. VDD = 50 V, ID = 17.5 A, RG = 4.7Ω, VGS = 10 V (see test circuit, Figure 1) 84 28 ns ns SOURCE DRAIN DIODE Symbol ISD Parameter Test Conditions Source-drain Current (pulsed) VSD (2) Forward On Voltage ISD = 18 A, VGS = 0 Reverse Recovery Time Reverse Recovery Charge Reverse Recovery Current ISD = 35 A, di/dt = 100A/µs, VDD = 25 V, Tj = 150°C (see test circuit, Figure 3) IRRM Typ. Source-drain Current ISDM (1) trr Qrr Min. 114 456 8 Max. Unit 35 A 140 A 1.2 V ns nC A Note: 1. Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %. 2. Pulse width limited by safe operating area. 3/6 STL35NF10 Fig. 1: Switching Times Test Circuit For Resistive Load Fig. 3: Test Circuit For Diode Recovery Behaviour 4/6 Fig. 2: Gate Charge test Circuit STL35NF10 PowerFLAT™(6x5) MECHANICAL DATA mm. DIM. MIN. A 0.80 A1 b 0.36 1.00 0.031 0.039 0.014 0.018 0.154 6.00 0.158 0.235 3.05 0.115 1.27 0.65 MAX. 0.191 4.05 2.95 TYP. 0.003 0.48 3.95 e L MIN. 4.89 E E2 MAX. 0.08 D D2 TYP inch 0.119 0.049 0.85 0.025 0.033 5/6 STL35NF10 Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specification mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a trademark of STMicroelectronics © 2001 STMicroelectronics – Printed in Italy – All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Brazil - China - Finland - France - Germany - Hong Kong - India - Italy - Japan - Malaysia - Malta - Morocco Singapore - Spain - Sweden - Switzerland - United Kingdom - U.S.A. http://www.st.com 6/6