STMICROELECTRONICS STL140N4LLF5

STL140N4LLF5
N-channel 40 V, 0.00275 Ω, 32 A, PowerFLAT™ (5x6)
STripFET™ V Power MOSFET
Preliminary data
Features
Type
VDSS
RDS(on)
max
ID
STL140N4LLF5
40 V
0.00275 Ω
32 A (1)
1. The value is rated according Rthj-pcb.
■
RDS(on) * Qg industry benchmark
■
Extremely low on-resistance RDS(on)
■
High avalanche ruggedness
■
Low gate drive power losses
PowerFLAT™ ( 5x6 )
Application
■
Switching applications
Figure 1.
Internal schematic diagram
Description
The STL140N4LLF5 is an N-channel
STripFET™V Power MOSFET which has been
designed to achieve very low on-state resistance
providing also one of the best-in-class figure of
merit (FOM).
Table 1.
Device summary
Order code
Marking
Package
Packaging
STL140N4LLF5
140N4LLF5
PowerFLAT™ (5x6)
Tape and reel
June 2010
Doc ID 17586 Rev 1
This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to
change without notice.
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www.st.com
10
Contents
STL140N4LLF5
Contents
1
Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
3
Test circuits
4
Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
5
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
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Doc ID 17586 Rev 1
STL140N4LLF5
1
Electrical ratings
Electrical ratings
Table 2.
Absolute maximum ratings
Symbol
Parameter
Value
Unit
40
V
VDS
Drain-source voltage (VGS = 0)
VGS
Gate-source voltage
± 22
V
ID(1)
Drain current (continuous) at TC = 25 °C
140
A
ID (1)
Drain current (continuous) at TC = 100 °C
88
A
ID(2)
Drain current (continuous) at TC = 25 °C
32
A
(3)
Drain current (continuous) at TC=100 °C
20
A
(3)
Drain current (pulsed)
128
A
PTOT (1)
Total dissipation at TC = 25 °C
80
W
(2)
Total dissipation at TC = 25 °C
4
W
0.03
W/°C
-55 to 150
°C
ID
IDM
PTOT
Derating factor
TJ
Operating junction temperature
Storage temperature
Tstg
1. The value is rated according Rthj-c
2. The value is rated according Rthj-pcb
3. Pulse width limited by safe operating area
Table 3.
Thermal resistance
Symbol
Parameter
Value
Unit
Rthj-case
Thermal resistance junction-case (drain) (steady state)
1.56
°C/W
Thermal resistance junction-ambient
31.3
°C/W
Value
Unit
Rthj-pcb
(1)
1. When mounted on FR-4 board of 1inch², 2oz Cu, t < 10 sec
Table 4.
Symbol
Avalanche data
Parameter
IAV
Not-repetitive avalanche current,
(pulse width limited by Tj Max)
TBD
A
EAS
Single pulse avalanche energy
(starting TJ = 25 °C, ID = IAV , VDD = 24 V)
TBD
mJ
Doc ID 17586 Rev 1
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Electrical characteristics
2
STL140N4LLF5
Electrical characteristics
(TCASE = 25 °C unless otherwise specified)
Table 5.
Symbol
V(BR)DSS
Parameter
Test conditions
Drain-source breakdown
voltage
ID = 250 µA, VGS= 0
Zero gate voltage drain
current (VGS = 0)
IGSS
Gate body leakage current
(VDS = 0)
VGS = ±22 V
VGS(th)
Gate threshold voltage
VDS= VGS, ID = 250 µA
RDS(on)
Static drain-source on
resistance
VGS= 10 V, ID= 16 A
Symbol
Ciss
Coss
Crss
Qg
Parameter
RG
Gate input resistance
Symbol
td(on)
tr
td(off)
tf
Max.
40
Unit
V
VDS = Max rating @125 °C
1
10
µA
µA
±100
nA
1
V
0.0021 0.00275
0.0024 0.0031
VGS= 4.5 V, ID= 16 A
Test conditions
Input capacitance
Output capacitance
Reverse transfer
capacitance
Qgd
Table 7.
Typ.
Ω
Ω
Dynamic
Total gate charge
Gate-source charge
Gate-drain charge
Qgs
Min.
VDS = Max rating,
IDSS
Table 6.
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On/off states
VDS = 25 V, f=1 MHz,
VGS=0
Min.
Typ.
Max.
Unit
-
5900
870
130
-
pF
pF
pF
-
45
TBD
TBD
-
nC
nC
nC
-
TBD
-
Ω
VDD=15 V, ID = 32 A
VGS = 4.5 V
(see Figure 3)
f=1 MHz Gate DC Bias = 0
Test signal level = 20 mV
open drain
Switching times
Parameter
Turn-on delay time
Rise time
Turn-off delay time
Fall time
Test conditions
Min.
Typ.
-
TBD
TBD
TBD
TBD
VDD=15 V, ID= 16 A,
RG=4.7 Ω, VGS=10 V
(see Figure 2)
Doc ID 17586 Rev 1
Max.
Unit
-
ns
ns
ns
ns
STL140N4LLF5
Electrical characteristics
Table 8.
Symbol
ISD
Source drain diode
Parameter
Test conditions
Min
Typ.
Max
Unit
Source-drain current
-
18
A
ISDM(1)
Source-drain current (pulsed)
-
72
A
VSD(2)
Forward on voltage
ISD = 32 A, VGS=0
-
1.1
V
Reverse recovery time
Reverse recovery charge
Reverse recovery current
ISD = 32 A,
trr
Qrr
IRRM
di/dt = 100 A/µs,
VDD= 25 V
-
TBD
TBD
TBD
ns
nC
A
1. Pulse width limited by safe operating area
2. Pulsed: pulse duration=300µs, duty cycle 1.5%
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Test circuits
STL140N4LLF5
3
Test circuits
Figure 2.
Switching times test circuit for
resistive load
Figure 4.
Test circuit for inductive load
Figure 5.
switching and diode recovery times
Unclamped inductive load test
circuit
Figure 6.
Unclamped inductive waveform
Switching time waveform
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Figure 3.
Figure 7.
Doc ID 17586 Rev 1
Gate charge test circuit
STL140N4LLF5
4
Package mechanical data
Package mechanical data
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK® packages, depending on their level of environmental compliance. ECOPACK®
specifications, grade definitions and product status are available at: www.st.com.
ECOPACK® is an ST trademark.
Doc ID 17586 Rev 1
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Package mechanical data
Table 9.
STL140N4LLF5
Power FLAT™ (5x6) mechanical data
mm.
inch.
Dim.
Min.
Typ.
Max.
Min.
Typ.
Max.
0.80
0.83
0.93
0.031
0.32
0.036
A1
0.02
0.05
0.0007
0.0019
A3
0.20
A
b
0.35
0.47
0.013
0.015
D
5.00
0.196
D1
4.75
0.187
D2
4.15
4.20
4.25
0.163
0.165
E
6.00
0.236
E1
5.75
0.226
E2
3.43
3.48
3.53
E4
2.58
2.63
2.68
e
L
Figure 8.
8/10
0.40
0.007
0.135
1.27
0.70
0.80
0.018
0.167
0.137
0.139
0.103
0.105
0.050
0.90
Power FLAT™ (5x6) drawing
Doc ID 17586 Rev 1
0.027
0.031
0.035
STL140N4LLF5
5
Revision history
Revision history
Table 10.
Document revision history
Date
Revision
03-Jun-2010
1
Changes
First release.
Doc ID 17586 Rev 1
9/10
STL140N4LLF5
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