STL120NH02V N-channel 20V - 0.0025Ω - 120A - PowerFLAT™ (6x5) STripFET™ III Power MOSFET Target Specification General features Type VDSS RDS(on) ID STL120NH02V 20V <0.003Ω 28A(1) 1. Value limited by wire bonding ■ Improved die-to-footprint ratio ■ Very low profile package (1mm max) ■ Very low thermal resistance ■ Conduction losses reduced ■ 2.5V gate drive ■ Switching losses reduced ■ Very low threshold device (Chip scale package) Internal schematic diagram Description The STL120NH02V utilizes the latest advanced design rules of ST’s proprietary STripFET™ Technology. Thanks to a very low threshold, it is ideal for Synchronous Buck Converter in point of load brick module. The Chip-scaled PowerFLAT™ package allows a significant board space saving, still boosting the performance. Applications ■ Switching application Order codes Part number Marking Package Packaging STL120NH02V L120NH02V PowerFLATTM (6x5) Tape & reel September 2006 Rev 2 This is preliminary information on a new product foreseen to be developed. Details are subject to change without notice. 1/10 www.st.com 10 Contents STL120NH02V Contents 1 Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 3 Test circuit 4 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 5 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 2/10 ................................................ 6 STL120NH02V 1 Electrical ratings Electrical ratings Table 1. Symbol Absolute maximum ratings Parameter Value Unit VDS Drain-source voltage (VGS = 0) 20 V VGS Gate-source voltage ±8 V ID Drain current (continuous) at TC = 25°C 120 A ID Drain current (continuous) at TC = 100°C 75 A Drain current (pulsed) 480 A Drain current (continuous) at TC = 25°C 28 A PTOT(2) Total dissipation at TC = 25°C 100 W PTOT(3) Total dissipation at TC = 25°C 4 W 0.03 W/°C -55 to 175 °C IDM (1) ID(2) Derating factor Tj Tstg Operating junction temperature storage temperature 1. Pulse width limited by safe operating area 2. When mounted on FR-4 board of 1in², 2oz Cu. t<10sec 3. The value is rated according Rthj-C. Table 2. Rthj-case Thermal data Thermal resistance junction-case (drain) (Steady state) Rthj-pcb(1) Thermal resistance junction-pcb max 1.56 °C/W 31.2 °C/W 1. When mounted on FR-4 board of 1in², 2oz Cu. t<10sec Table 3. Symbol Avalanche characteristics Parameter IAR Avalanche current, repetitive or not-repetitive (pulse width limited by Tj max) EAS Single pulse avalanche energy (starting Tj = 25 °C, ID = IAR, VDD = 50 V) Max value Unit 10 A TBD mJ 3/10 Electrical characteristics 2 STL120NH02V Electrical characteristics (TCASE=25°C unless otherwise specified) Table 4. On/off states Symbol Parameter V(BR)DSS Drain-source breakdown voltage ID = 250µA, VGS =0 IDSS Zero gate voltage drain current (VGS = 0) VDS = max rating VDS =max rating, TC = 125°C IGSS Gate-body leakage current (VDS = 0) VGS = ± 8V VGS(th) Gate threshold voltage VDS = VGS, ID = 250µA RDS(on) Static drain-source on resistance VGS = 4.5V, ID = 14A VGS = 2.5V, ID = 14A Table 5. Symbol Test conditions Typ. Max. 20 Unit V 1 10 µA µA ±100 nA 0.60 V 0.0025 0.003 0.003 0.004 Ω Ω Typ. Max. Unit Dynamic Parameter Test conditions Min. gfs (1) Forward transconductance VDS = 16V, ID = 14A TBD S Ciss Coss Crss Input capacitance Output capacitance Reverse transfer capacitance VDS = 25V, f = 1MHz, VGS = 0 TBD TBD TBD pF pF pF td(on) tr td(off) tf Turn-on delay time Rise time Turn-off delay time Fall time VDD = 10V, ID = 14A RG = 4.7Ω VGS = 4.5V (see Figure 1) TBD TBD TBD TBD ns ns ns ns Qg Qgs Qgd Total gate charge Gate-source charge Gate-drain charge VDD = 10V, ID = 28A, VGS = 2.5V, RG = 4.7Ω (see Figure 2) 33 TBD TBD Gate Input Resistance f=1MHz Gate DC Bias =0 Test Signal Level =20mV Open Drain RG 1. Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %. 4/10 Min. 1.8 44 nC nC nC Ω STL120NH02V Electrical characteristics Table 6. Symbol Source drain diode Parameter ISDM (1) Source-drain current Source-drain current (pulsed) VSD (2) Forward on voltage ISD trr Qrr IRRM trr Qrr IRRM Test conditions Min. Typ. ISD = 28A, VGS = 0 Max. Unit 28 112 A A TBD V Reverse recovery time ISD = 28A, di/dt = 100A/µs, Reverse recovery charge VDD = 16V Reverse recovery current (see Figure 3) TBD TBD TBD ns nC A Reverse recovery time ISD = 28A, di/dt = 100A/µs, Reverse recovery charge VDD = 16V, Tj = 150°C Reverse recovery current (see Figure 3) TBD TBD TBD ns nC A 1. Pulse width limited by safe operating area. 2. Pulsed: Pulse duration = 300 µs, duty cycle 1.5 % 5/10 Test circuit STL120NH02V 3 Test circuit Figure 1. Switching times test circuit for resistive load Figure 3. Test circuit for inductive load Figure 4. switching and diode recovery times Unclamped Inductive load test circuit Figure 5. Unclamped inductive waveform Switching time waveform 6/10 Figure 2. Figure 6. Gate charge test circuit STL120NH02V 4 Package mechanical data Package mechanical data In order to meet environmental requirements, ST offers these devices in ECOPACK® packages. These packages have a Lead-free second level interconnect . The category of second level interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com 7/10 Package mechanical data STL120NH02V PowerFLAT™ (6x5) MECHANICAL DATA mm. inch DIM. MIN. TYP MAX. MIN. TYP. MAX. 0.80 0.83 0.93 0.031 0.032 0.036 A1 0.02 0.05 0.0007 0.0019 A3 0.20 A b 0.35 D 4.20 3.43 E4 2.58 e 0.163 0.167 0.226 3.48 3.53 2.63 2.68 0.80 0.165 0.236 0.135 1.27 0.70 0.018 0.187 4.25 5.75 E2 0.015 0.196 6.00 E1 8/10 0.013 4.75 4.15 E L 0.47 5.00 D1 D2 0.40 0.007 0.137 0.139 0.103 0.105 0.050 0.90 0.027 0.031 0.035 STL120NH02V 5 Revision history Revision history Table 7. Revision history Date Revision Changes 24-Jun-2005 1 New document 04-Sep-2006 2 New template, no content change 9/10 STL120NH02V Please Read Carefully: Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST’s terms and conditions of sale. Purchasers are solely responsible for the choice, selection and use of the ST products and services described herein, and ST assumes no liability whatsoever relating to the choice, selection or use of the ST products and services described herein. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. 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