STP7NB60 STP7NB60FP N-CHANNEL 600V - 1.0 Ω - 7.2A TO-220/TO-220FP PowerMESH™ MOSFET Figure 1. Package Table 1. General Features Type VDSS RDS(on) ID STP7NB60 600 V < 1.2 Ω 7.2 A STP7NB60FP 600 V < 1.2 Ω 4.1 A FEATURES SUMMARY ■ TYPICAL RDS(on) = 1.0 Ω ■ EXTREMELY HIGH dv/dt CAPABILITY ■ 100% AVALANCHE TESTED ■ VERY LOW INTRINSIC CAPACITANCES ■ GATE CHARGE MINIMIZED 1 TO-220 DESCRIPTION Using the latest high voltage MESH OVERLAY™ process, STMicroelectronics has designed an advanced family of power MOSFETs with outstanding performances. The new patent pending strip layout coupled with the Company’s proprietary edge termination structure, gives the lowest RDS(on) per area, exceptional avalanche and dv/ dt capabilities and unrivalled gate charge and switching characteristics. 3 3 2 1 2 TO-220FP Figure 2. Internal Schematic Diagram APPLICATIONS ■ HIGH CURRENT, HIGH SPEED SWITCHING ■ SWITCH MODE POWER SUPPLIES (SMPS) ■ DC-AC CONVERTERS FOR WELDING EQUIPMENT AND UNINTERRUPTIBLE POWER SUPPLIES AND MOTOR DRIVE Table 2. Order Codes Part Number Marking Package Packaging STP7NB60 P7NB60 TO-220 TUBE STP7NB60FP P7NB60FP TO-220FP TUBE REV. 2 April 2004 1/11 STP7NB60/FP Table 3. Absolute Maximum Ratings Value Symbol Parameter Unit STP7NB60 VDS VDGR VGS STP7NB60FP Drain-source Voltage (VGS = 0) 600 V Drain- gate Voltage (RGS = 20 kΩ) 600 V Gate-source Voltage ± 30 V ID Drain Current (cont.) at TC = 25 °C 7.2 4.1 A ID Drain Current (cont.) at TC = 100 °C 4.5 2.6 A Drain Current (pulsed) 28.8 28.8 A Total Dissipation at TC = 25 °C 125 40 W Derating Factor 1.0 0.32 W°/C Peak Diode Recovery voltage slope 4.5 4.5 V/ns – 2000 V IDM (1) Ptot dv/dt (2) VISO Insulation Withstand Voltage (DC) Tstg Storage Temperature Tj Max. Operating Junction Temperature -65 to 150 °C 150 °C Note: 1. Pulse width limited by safe operating area 2. ISD ≤ 7A, di/dt ≤ 200 A/µs, VDD ≤ V(BR)DSS, Tj ≤ TJMAX Table 4. Thermal Data Value Symbol Parameter Unit Rthj-case Thermal Resistance Junction-case Max Rthj-amb Thermal Resistance Junction-ambient Max Tl Maximum Lead Temperature For Soldering Purpose TO-220 TO220-FP 1.0 3.13 °C/W 62.5 °C/W 300 °C Max Value Unit Table 5. Avalanche Characteristics Symbol 2/11 Parameter IAR Avalanche Current, Repetitive or Not-Repetitive (pulse width limited by Tj max, δ < 1%) 7.2 A EAS Single Pulse Avalanche Energy (starting Tj = 25 °C; ID = IAR; VDD = 50 V) 580 mJ STP7NB60/FP ELECTRICAL CHARACTERISTICS (Tcase = 25°C unless otherwise specified) Table 6. Off Symbol Parameter V(BR)DSS Drain-source Breakdown Voltage ID = 250 mA; VGS = 0 IDSS Zero Gate Voltage VDS = Max Rating 1 µA Drain Current (VGS = 0) VDS = Max Rating; Tc = 125 °C 50 µA Gate-body Leakage Current (VDS = 0) VGS = ± 30 V ± 100 nA IGSS Test Conditions Min. Typ. Max. 600 Unit V Table 7. On (1) Symbol Parameter Test Conditions VGS(th) Gate Threshold Voltage VDS = VGS; ID = 250 µA RDS(on) Static Drain-source On Resistance VGS = 10V; ID = 3.6 A Min. Typ. Max. Unit 3 4 5 V 1.0 1.2 Ω Min. Typ. Max. Unit 4 5.3 Note: 1. Pulsed: Pulse duration = 300 µs, duty cycle 1.5 % Table 8. Dynamic Symbol Parameter Test Conditions Forward Transconductance VDS > ID(on) x RDS(on)max; ID = 3.6 A Ciss Input Capacitance VDS = 25 V; f = 1 MHz; VGS = 0 Coss Crss gfs (1) S 1250 1625 pF Output Capacitance 165 223 pF Reverse Transfer Capacitance 16 22 pF Note: 1. Pulsed: Pulse duration = 300 µs, duty cycle 1.5 % Table 9. Switching On Symbol Typ. Max. Unit Turn-on Time VDD = 300 V; ID = 3.6 A RG = 4.7 Ω 18 27 ns Rise Time VGS = 10 V (see test circuit, Figure 18) 8 12 ns Qg Total Gate Charge VDD = 480 V ID = 7.2 A VGS = 10 V 30 45 nC Qgs Gate-Source Charge 9.9 nC Qgd Gate-Drain Charge 13.3 nC td(on) tr Parameter Test Conditions Min. Table 10. Switching Off Symbol Parameter Test Conditions Min. Typ. Max. Unit Off-voltage Rise Time VDD = 480 V; ID = 7.2 A; RG = 4.7 Ω 8 12 ns tf Fall Time VGS = 10 V (see test circuit, Figure 20) 5 8 ns tc Cross-over Time 15 23 ns tr(Voff) 3/11 STP7NB60/FP Table 11. Source Drain Diode Symbol Parameter Test Conditions Min. Typ. Max. Unit ISD Source-drain Current 7.2 A ISDM (1) Source-drain Current (pulsed) 28.8 A VSD (2) Forward On Voltage ISD = 7.2 A VGS = 0 trr Reverse Recovery Time ISD = 7.2; A di/dt = 100 A/µs 530 ns Qrr Reverse RecoveryCharge VDD = 100 V Tj = 150 °C (see test circuit, Figure 20) 4.5 µC IRRAM Reverse RecoveryCharge 17 A V Note: 1. Pulse width limited by safe operating area 2. Pulsed: Pulse duration = 300 µs, duty cycle 1.5 % Figure 3. Safe Operating Area for TO-220 Figure 4. Safe Operating Area for TO-220FP Figure 5. Thermal Impedance for TO-220 Figure 6. Thermal Impedance for TO-220FP 4/11 STP7NB60/FP Figure 7. Output Characteristics Figure 8. Transfer Characteristics Figure 9. Transconductance Figure 10. Static Drain-source On Resistance Figure 11. Gate Charge vs Gate-source Voltage Figure 12. Capacitance Variations 5/11 STP7NB60/FP Figure 13. Normalized Gate Thresold Voltage vs Temperature Figure 15. Source-drain Diode Forward Characteristics 6/11 Figure 14. Normalized On Resistance vs Temperature STP7NB60/FP Figure 16. Unclamped Inductive Load Test Circuit Figure 17. Unclamped Inductive Waveforms Figure 18. Switching Times Test Circuits For Resistive Load Figure 19. Gate Charge Test Circuit Figure 20. Test Circuit For Inductive Load Switching And Diode Recovery Times 7/11 STP7NB60/FP PACKAGE MECHANICAL Table 12. TO-220 Mechanical Data Symbol millimeters Min Typ Max Min A 4.40 4.60 0.173 0.181 b 0.61 0.88 0.024 0.034 b1 1.15 1.70 0.045 0.066 Typ Max c 0.49 0.70 0.019 0.027 D 15.25 15.75 0.60 0.620 E 10 10.40 0.393 0.409 e 2.40 2.70 0.094 0.106 e1 4.95 5.15 0.194 0.202 F 1.23 1.32 0.048 0.052 H1 6.20 6.60 0.244 0.256 J1 2.40 2.72 0.094 0.107 L 13 14 0.511 0.551 L1 3.50 3.93 0.137 0.154 L20 16.40 0.645 L30 28.90 1.137 ØP 3.75 3.85 0.147 0.151 Q 2.65 2.95 0.104 0.116 Figure 21. TO-220 Package Dimensions Note: Drawing is not to scale. 8/11 inches STP7NB60/FP Table 13. TO-220FP Mechanical Data Symbol A B C D E F F1 F2 G G1 H L2 L3 L4 L5 L6 L7 P V V1 V2 Ø millimeters Typ Min 4.40 2.50 1.00 2.50 0.40 0.75 1.15 1.15 4.95 2.40 10.00 Max 4.60 2.70 1.30 2.75 0.70 1.00 1.70 1.70 5.20 2.70 10.40 Min 0.173 0.098 0.039 0.098 0.016 0.030 0.045 0.045 0.195 0.094 0.393 30.60 10.60 3.50 16.40 9.30 1.60 1.126 0.385 0.129 0.626 0.354 100° 46° 3.20 50° 44° 0.118 inches Typ 16.00 Max 0.181 0.106 0.051 0.108 0.027 0.039 0.066 0.066 0.204 0.106 0.409 0.630 28.60 9.80 3.30 15.90 9.00 1.204 0.417 0.137 0.645 0.366 0.063 5° 5° 50° 44° 3.00 100° 46° 0.126 Figure 22. TO-220FP Package Dimensions H A B C V V L5 Ø V L6 V2 L7 L2 P L3 V V F2 F1 F L4 V1 F D E G1 G Note: Drawing is not to scale. 9/11 STP7NB60/FP REVISION HISTORY Table 14. Revision History 10/11 Date Revision Description of Changes July-1993 1 First Issue 14-Apr-2004 2 Stylesheet update. No content change. STP7NB60/FP Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a registered trademark of STMicroelectronics. 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