DATA SHEET MOS FIELD EFFECT TRANSISTOR µ PA1858 P-CHANNEL MOS FIELD EFFECT TRANSISTOR FOR SWITCHING PACKAGE DRAWING (Unit: mm) DESCRIPTION The µPA1858 is a switching device, which can be driven directly by a 2.5 V power source. This device features a low on-state resistance and excellent switching characteristics, and is suitable for applications such as power management of portable machine and so on. 8 5 1 2, 3 4 5 6, 7 8 : Drain1 : Source1 : Gate1 : Gate2 : Source2 : Drain2 1.2 MAX. 1.0±0.05 0.25 FEATURES 3° +5° –3° • 2.5 V drive available • Low on-state resistance RDS(on)1 = 24.5 mΩ MAX. (VGS = −4.5 V, ID = −2.5 A) RDS(on)2 = 25.5 mΩ MAX. (VGS = −4.0 V, ID = −2.5 A) RDS(on)3 = 38 mΩ MAX. (VGS = −2.5 V, ID = −2.5 A) • Built-in G-S protection diode against ESD 0.1±0.05 1 4 6.4 ±0.2 PACKAGE µPA1858GR-9JG Power TSSOP8 0.65 0.27 +0.03 –0.08 4.4 ±0.1 0.145 ±0.055 3.15 ±0.15 3.0 ±0.1 ORDERING INFORMATION PART NUMBER 0.5 0.6 +0.15 –0.1 1.0 ±0.2 0.1 0.8 MAX. 0.10 M ABSOLUTE MAXIMUM RATINGS (TA = 25°C) Drain to Source Voltage (VGS = 0 V) VDSS −20 V Gate to Source Voltage (VDS = 0 V) VGSS m12 V Drain Current (DC) ID(DC) m5.0 A ID(pulse) m20 A PT 2.0 W Channel Temperature Tch 150 °C Storage Temperature Tstg −55 to +150 °C Drain Current (pulse) Note1 Total Power Dissipation (2 units) Note2 EQUIVALENT CIRCUITS Drain 1 Gate 1 Drain 2 Body Diode Body Diode Gate 2 Gate Protection Diode Source 1 Gate Protection Diode Source 2 Notes 1. PW ≤ 10 µs, Duty Cycle ≤ 1% 2 2. Mounted on ceramic substrate of 5000 mm x 1.1 mm Remark The diode connected between the gate and source of the transistor serves as a protector against ESD. When this device actually used, an additional protection circuit is externally required if a voltage exceeding the rated voltage may be applied to this device. The information in this document is subject to change without notice. Before using this document, please confirm that this is the latest version. Not all devices/types available in every country. Please check with local NEC representative for availability and additional information. Document No.G16276EJ1V0DS00 (1st edition) Date Published October 2002 NS CP(K) Printed in Japan © 2002 µ PA1858 ELECTRICAL CHARACTERISTICS (TA = 25°C) CHARACTERISTICS SYMBOL TEST CONDITIONS MIN. TYP. MAX. UNIT Zero Gate Voltage Drain Current IDSS VDS = −20 V, VGS = 0 V −1.0 µA Gate Leakage Current IGSS VGS = m12 V, VDS = 0 V m10 µA −1.5 V Gate Cut-off Voltage VDS = −10 V, ID = −1.0 mA −0.5 −1.0 | yfs | VDS = −10 V, ID = −2.5 A 5.0 14.2 RDS(on)1 VGS = −4.5 V, ID = −2.5 A 20.3 24.5 mΩ RDS(on)2 VGS = −4.0 V, ID = −2.5 A 21.1 25.5 mΩ RDS(on)3 VGS = −2.5 V, ID = −2.5 A 28.5 38 mΩ VGS(off) Forward Transfer Admittance Drain to Source On-state Resistance S Input Capacitance Ciss VDS = −10 V 1300 pF Output Capacitance Coss VGS = 0 V 300 pF Reverse Transfer Capacitance Crss f = 1.0 MHz 180 pF Turn-on Delay Time td(on) VDD = −10 V, ID = −2.5 A 16 ns VGS = −4.0 V 65 ns RG = 10 Ω 115 ns 125 ns Rise Time tr Turn-off Delay Time td(off) Fall Time tf Total Gate Charge QG VDD = −16 V 12 nC Gate to Source Charge QGS VGS = −4.0 V 1.5 nC Gate to Drain Charge QGD ID = −5.0 A 5.0 nC VF(S-D) IF = 5.0 A, VGS = 0 V 0.81 V Reverse Recovery Time trr IF = 5.0 A, VGS = 0 V 90 ns Reverse Recovery Charge Qrr di/dt = 50 A /µs 62 nC Body Diode Forward Voltage TEST CIRCUIT 1 SWITCHING TIME TEST CIRCUIT 2 GATE CHARGE D.U.T. D.U.T. VGS(−) RL VGS RG PG. Wave Form VDD 0 VGS 10% PG. 90% τ τ = 1 µs Duty Cycle ≤ 1% 2 90% VDS VDS 10% 0 10% Wave Form td(on) tr ton RL 50 Ω VDD 90% VDS(−) VGS(−) 0 IG = −2 mA td(off) tf toff Data Sheet G16276EJ1V0DS µ PA1858 TYPICAL CHARACTERISTICS (TA = 25°C) DERATING FACTOR OF FORWARD BIAS SAFE OPERATING AREA TOTAL POWER DISSIPATION vs. AMBIENT TEMPERATURE 120 2.5 100 PT - Total Power Dissipation - W dT - Percentage of Rated Power - % P D (FET1):P D (FET2)=1:1 80 60 40 20 2 Mounted on ceramic substrate 2 of 5000 mm x 1.1 mm 1.5 Mounted on FR-4 board 2 of 2500 mm x 1.6 mm 1 0.5 0 0 0 25 50 75 100 125 150 175 0 TA - Ambient Temperature - °C 25 50 75 100 125 150 175 TA - Ambient Temperature - °C FORWARD BIAS SAFE OPERATING AREA - 100 R DS(on ) lim ited (V G S = −4.5 V) I D (pulse) PW = 1 m s I D (D C) 10 m s -1 DC 100 m s - 0.1 S ingle pulse Mounted on ceram ic substrate 2 of 5000 m m x 1.1 m m P D (FE T1):P D (FE T2) = 1:1 - 0.01 - 0.1 -1 - 10 - 100 VDS - Drain to Source Voltage - V TRANSIENT THERMAL RESISTANCE vs. PULSE WIDTH rth(ch-A) - Transient Thermal Resistance - °C/W ID - Drain Current - A - 10 1000 Single pulse P D (FET1):P D (FET2) = 1:1 Mounted on FR-4 board of 2 2500 mm x 1.6 mm 125°C/W 100 Mounted on ceramic substrate of 2 5000 mm x 1.1 mm 62.5°C/W 10 1 0.1 1m 10 m 100 m 1 10 100 1000 PW - Pulse Width - s Data Sheet G16276EJ1V0DS 3 µ PA1858 DRAIN CURRENT vs. DRAIN TO SOURCE VOLTAGE FORWARD TRANSFER CHARACTERISTICS - 20 - 100 V GS = −4.5 V −2.5 V - 10 - 15 ID - Drain Current - A ID - Drain Current - A VDS = −10 V P u ls ed −4.0 V - 10 -5 -1 T A = 1 2 5 °C 7 5 °C 2 5 °C − 2 5 °C - 0 .1 - 0 .0 1 - 0 .0 0 1 Pulsed 0 - 0 .0 0 0 1 0 - 0.2 - 0.4 - 0.6 - 0.8 -1 0 VDS - Drain to Source Voltage - V | yfs | - Forward Transfer Admittance - S VGS(off) - Gate Cut-off Voltage - V 100 V DS = −10 V ID = −1.0 m A - 1.2 -1 - 0.8 - 0.6 50 100 150 10 T A = 125°C 75°C 25°C −25°C 1 0.1 - 0.01 - 0.1 V GS = −2.5 V −4.0 V 30 20 −4.5 V 10 0 -50 0 50 100 150 Tch - Channel Temperature - °C 4 -1 - 10 - 100 DRAIN TO SOURCE ON-STATE RESISTANCE vs. GATE TO SOURCE VOLTAGE RDS(on) - Drain to Source On-state Resistance - mΩ RDS(on) - Drain to Source On-state Resistance - mΩ ID = −2.5 A Pulsed 40 - 2 .5 ID - Drain Current - A DRAIN TO SOURCE ON-STATE RESISTANCE vs. CHANNEL TEMPERATURE 50 -2 V DS = −10 V Pulsed Tch - Channel Temperature - °C 60 - 1 .5 FORWARD TRANSFER ADMITTANCE vs. DRAIN CURRENT - 1.4 0 -1 VGS - Gate to Source Voltage - V GATE CUT-OFF VOLTAGE vs. CHANNEL TEMPERATURE -50 - 0 .5 60 ID = −2.5 A Pulsed 50 40 30 20 10 0 0 -2 -4 -6 -8 - 10 VGS - Gate to Source Voltage - V Data Sheet G16276EJ1V0DS - 12 µ PA1858 60 DRAIN TO SOURCE ON-STATE RESISTANCE vs. DRAIN CURRENT V GS = −4.5 V Pulsed 50 T A = 125°C 75°C 25°C −25°C 40 30 20 10 0 - 0.01 - 0.1 -1 - 10 - 100 RDS(on) - Drain to Source On-state Resistance - mΩ RDS(on) - Drain to Source On-state Resistance - mΩ DRAIN TO SOURCE ON-STATE RESISTANCE vs. DRAIN CURRENT 60 V GS = −4.0 V Pulsed 50 T A = 125°C 75°C 25°C −25°C 40 30 20 10 0 - 0.01 - 0.1 ID - Drain Current - A 10000 V GS = −2.5 V Pulsed Ciss, Coss, Crss - Capacitance - pF RDS(on) - Drain to Source On-state Resistance - mΩ - 100 CAPACITANCE vs. DRAIN TO SOURCE VOLTAGE 60 T A = 125°C 75°C 40 30 20 25°C −25°C 10 VGS = 0 V f = 1.0 M H z C iss 1000 C oss C rss 0 - 0.01 - 0.1 -1 - 10 100 - 0.1 - 100 SWITCHING CHARACTERISTICS - 10 - 100 SOURCE TO DRAIN DIODE FORWARD VOLTAGE 1000 100 IF - Diode Forward Current - A V DD = −10 V V GS = −4.0 V R G = 10 Ω t d(off) 100 -1 VDS - Drain to Source Voltage - V ID - Drain Current - A td(on), tr, td(off), tf - Switching Time - ns - 10 ID - Drain Current - A DRAIN TO SOURCE ON-STATE RESISTANCE vs. DRAIN CURRENT 50 -1 tf tr V GS = 0 V Pulsed 10 1 0.1 t d(on) 10 - 0.1 0.01 -1 - 10 ID - Drain Current - A 0.4 0.6 0.8 1 1.2 VF(S-D) - Source to Drain Voltage - V Data Sheet G16276EJ1V0DS 5 µ PA1858 DYNAMIC INPUT/OUTPUT CHARACTERISTICS VGS - Gate to Source Voltage - V -5 ID = −5.0 A -4 V DD = −4.0 V −10 V −16 V -3 -2 -1 0 0 4 8 12 16 QG - Gate Charge - nC 6 Data Sheet G16276EJ1V0DS µ PA1858 [MEMO] Data Sheet G16276EJ1V0DS 7 µ PA1858 • The information in this document is current as of October, 2002. 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