AOSMD AOT412

AOT412
N-Channel SDMOSTM Power Transistor
General Description
Features
The AOT412 and AOT412L is fabricated with SDMOSTM
trench technology that combines excellent RDS(ON) with
low gate charge.The result is outstanding efficiency with
controlled switching behavior. This universal technology
is well suited for PWM, load switching and general
purpose applications.
ID = 60A
(VGS = 10V)
RDS(ON) < 15.8mΩ
(VGS = 10V)
RDS(ON) < 19.4mΩ
(VGS = 7V)
VDS (V) =100V
- RoHS Compliant
- AOT412L is Halogen Free
100% UIS Tested!
100% R g Tested!
TO-220
D
G
G
D
S
S
Absolute Maximum Ratings TA=25°C unless otherwise noted
Parameter
Symbol
VDS
Drain-Source Voltage
VGS
Gate-Source Voltage
Continuous Drain
Current
TC=25°C
Pulsed Drain Current C
Continuous Drain
Current
A
140
8.2
IDSM
TA=70°C
V
44
IDM
TA=25°C
Units
V
60
ID
TC=100°C
Maximum
100
±25
A
6.6
Avalanche Current C
IAR
47
A
Repetitive avalanche energy L=0.1mH C
EAR
110
mJ
TC=25°C
Power Dissipation B
TA=25°C
Power Dissipation A
Junction and Storage Temperature Range
Alpha & Omega Semiconductor, Ltd.
2.6
W
1.7
TJ, TSTG
-55 to 175
Symbol
t ≤ 10s
Steady-State
Steady-State
W
75
PDSM
TA=70°C
Thermal Characteristics
Parameter
Maximum Junction-to-Ambient A
Maximum Junction-to-Ambient A D
Maximum Junction-to-Case
150
PD
TC=100°C
RθJA
RθJC
Typ
15
40
0.7
°C
Max
18
48
1
Units
°C/W
°C/W
°C/W
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AOT412
Electrical Characteristics (T J=25°C unless otherwise noted)
Parameter
Symbol
STATIC PARAMETERS
BVDSS
Drain-Source Breakdown Voltage
Conditions
Min
ID=250µA, VGS=0V
VDS=100V, VGS=0V
100
Zero Gate Voltage Drain Current
IGSS
Gate-Body leakage current
VDS=0V, VGS= ±25V
VGS(th)
VDS=VGS ID=250µA
2.6
ID(ON)
Gate Threshold Voltage
On state drain current
VGS=10V, VDS=5V
140
RDS(ON)
Static Drain-Source On-Resistance
50
100
VGS=10V, ID=20A
TJ=125°C
VGS=7V, ID=20A
Forward Transconductance
VSD
IS=1A,VGS=0V
Diode Forward Voltage
Maximum Body-Diode Continuous Current
VDS=5V, ID=20A
DYNAMIC PARAMETERS
Ciss
Input Capacitance
Coss
Output Capacitance
Crss
Reverse Transfer Capacitance
Rg
Gate resistance
SWITCHING PARAMETERS
Qg(10V) Total Gate Charge
Qg(4.5V) Total Gate Charge
Qgs
Gate Source Charge
Qgd
Gate Drain Charge
tD(on)
Turn-On DelayTime
tr
Turn-On Rise Time
tD(off)
Turn-Off DelayTime
tf
Turn-Off Fall Time
VGS=0V, VDS=50V, f=1MHz
VGS=0V, VDS=0V, f=1MHz
VGS=10V, VDS=50V, ID=20A
Units
V
TJ=55°C
gFS
Max
10
IDSS
IS
Typ
3.2
µA
nA
3.8
V
A
13.2
15.8
25
30
15.5
19.4
mΩ
1
V
60
A
mΩ
30
0.65
S
2150
2680
3220
pF
180
260
340
pF
60
100
140
pF
0.5
1
1.5
Ω
36
45
54
nC
10
12
14
nC
14
17
20
nC
9
15
21
nC
VGS=10V, VDS=50V, RL=5Ω,
RGEN=3Ω
19
ns
16
ns
27
ns
10
ns
trr
Body Diode Reverse Recovery Time
IF=20A, dI/dt=500A/µs
15
22
29
Qrr
Body Diode Reverse Recovery Charge IF=20A, dI/dt=500A/µs
67
96
125
ns
nC
A. The value of RθJA is measured with the device mounted on 1in2 FR-4 board with 2oz. Copper, in a still air environment with TA =25°C. The Power
dissipation PDSM is based on R θJA and the maximum allowed junction temperature of 150°C. The value in any given application depends on the
user's specific board design, and the maximum temperature of 175°C may be used if the PCB allows it.
B. The power dissipation PD is based on TJ(MAX)=175°C, using junction-to-case thermal resistance, and is more useful in setting the upper dissipation
limit for cases where additional heatsinking is used.
C. Repetitive rating, pulse width limited by junction temperature TJ(MAX)=175°C. Ratings are based on low frequency and duty cycles to keep initial TJ
=25°C.
D. The RθJA is the sum of the thermal impedence from junction to case RθJC and case to ambient.
E. The static characteristics in Figures 1 to 6 are obtained using <300µs pulses, duty cycle 0.5% max.
F. These curves are based on the junction-to-case thermal impedence which is measured with the device mounted to a large heatsink, assuming a
maximum junction temperature of TJ(MAX)=175°C. The SOA curve provides a single pulse rating.
G. The maximum current rating is limited by bond-wires.
2
H. These tests are performed with the device mounted on 1 in FR-4 board with 2oz. Copper, in a still air environment with TA=25°C.
Rev 0: Nov-08
COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS ARE NOT AUTHORIZED. AOS DOES NOT ASSUME ANY LIABILITY ARISING
OUT OF SUCH APPLICATIONS OR USES OF ITS PRODUCTS. AOS RESERVES THE RIGHT TO IMPROVE PRODUCT DESIGN,
FUNCTIONS AND RELIABILITY WITHOUT NOTICE.
Alpha & Omega Semiconductor, Ltd.
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AOT412
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS
140
100
10V
VDS=5V
7.5V
120
80
7V
80
60
6.5V
ID(A)
ID (A)
100
60
40
6V
40
125°C
20
20
25°C
VGS=5.5V
0
0
0
1
2
3
4
0
5
17
4
6
8
10
Normalized On-Resistance
2.6
16
RDS(ON) (mΩ)
2
VGS(Volts)
Figure 2: Transfer Characteristics (Note E)
VDS (Volts)
Fig 1: On-Region Characteristics (Note E)
VGS=7V
15
14
VGS=10V
13
12
2.4
VGS=10V
ID=20A
2.2
2
17
5
2
10
1.8
1.6
1.4
VGS=7V
ID=20A
1.2
1
0.8
11
0
5
0
10
15
20
25
30
ID (A)
Figure 3: On-Resistance vs. Drain Current and
Gate Voltage (Note E)
25
50
75
100
125
150
175
200
Temperature (°C)
0
Figure 4: On-Resistance vs. Junction Temperature
18
(Note E)
33
1.0E+02
ID=20A
1.0E+01
40
125°C
23
IS (A)
RDS(ON) (mΩ)
28
1.0E+00
125°C
25°C
1.0E-01
18
1.0E-02
13
25°C
1.0E-03
0.0
8
5
6
7
8
9
10
VGS (Volts)
Figure 5: On-Resistance vs. Gate-Source Voltage
(Note E)
Alpha & Omega Semiconductor, Ltd.
0.2
0.4
0.6
0.8
1.0
1.2
VSD (Volts)
Figure 6: Body-Diode Characteristics (Note E)
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AOT412
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS
10
3600
VDS=50V
ID=20A
3200
Ciss
2800
Capacitance (pF)
VGS (Volts)
8
6
4
2400
2000
1600
1200
800
2
Crss
Coss
400
0
0
0
10
20
30
40
50
0
Qg (nC)
Figure 7: Gate-Charge Characteristics
10µs
RDS(ON)
limited
800
DC
1.0
100µs
1ms
10ms
TJ(Max)=175°C
TC=25°C
0.1
0.1
ZθJC Normalized Transient
Thermal Resistance
17
5
2
10
600
400
200
1
10
VDS (Volts)
100
1000
D=Ton/T
TJ,PK=TC+PDM.ZθJC.RθJC
0
0.0001
0.001
0.01
0.1
1
0
10
Pulse Width (s)
18
Figure 10: Single Pulse Power Rating Junction-toCase (Note F)
Figure 9: Maximum Forward Biased
Safe Operating Area (Note F)
10
100
TJ(Max)=175°C
TC=25°C
10µs
Power (W)
ID (Amps)
100.0
0.0
0.01
40
60
80
VDS (Volts)
Figure 8: Capacitance Characteristics
1000
1000.0
10.0
20
In descending order
D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse
40
RθJC=1°C/W
1
PD
0.1
Ton
0.01
0.00001
Single Pulse
0.0001
0.001
0.01
0.1
T
1
10
100
Pulse Width (s)
Figure 11: Normalized Maximum Transient Thermal Impedance (Note F)
Alpha & Omega Semiconductor, Ltd.
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AOT412
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS
160
140
60
TA=25°C
Power Dissipation (W)
IAR(A) Peak Avalanche Current
70
50
40
TA=100°C
30
20
TA=150°C
10
TA=125°C
120
100
80
60
40
20
0
0
0.000001
0
0.00001
0.0001
0.001
Time in avalanche, tA (s)
Figure 12: Single Pulse Avalanche capability (Note
C)
25
50
75
100
125
175
10000
70
TA=25°C
60
1000
50
Power (W)
Current rating ID(A)
150
TCASE (°C)
Figure 13: Power De-rating (Note F)
40
30
20
17
5
2
10
100
10
10
1
0
0
25
50
75
100
125
150
0
175
ZθJA Normalized Transient
Thermal Resistance
10
1
0
0
0.01
0.1
1
10
100 1000
0
Pulse Width (s)
18
Figure 15: Single Pulse Power Rating Junction-toAmbient (Note H)
TCASE (°C)
Figure 14: Current De-rating (Note F)
In descending order
D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse
D=Ton/T
TJ,PK=TA+PDM.ZθJA.RθJA
40
RθJA=48°C/W
0.1
PD
0.01
Single Pulse
Ton
0.001
0.00001
0.0001
0.001
0.01
0.1
1
T
10
100
1000
Pulse Width (s)
Figure 16: Normalized Maximum Transient Thermal Impedance (Note H)
Alpha & Omega Semiconductor, Ltd.
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AOT412
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS
30
120
Qrr
20
125ºC
80
Irm
60
20
5
10
15
20
25
S
30
25ºC
100
20
80
Qrr
60
125ºC
10
40
Irm
20
0
25ºC
200
400
600
800
0
1000
di/dt (A/µs)
Figure 19: Diode Reverse Recovery Charge and
Peak Current vs. di/dt
Alpha & Omega Semiconductor, Ltd.
0.2
0
0
5
10
15
20
25
30
IS (A)
Figure 18: Diode Reverse Recovery Time and
Softness Factor vs. Conduction Current
35
2
Is=20A
30
125ºC
1.5
25
Irm (A)
Qrr (nC)
120
0.4
0
40
140
0.6
125ºC
20
trr (ns)
125ºC
25ºC
5
50
160
1.2
0.8
IS (A)
Figure 17: Diode Reverse Recovery Charge and
Peak Current vs. Conduction Current
Is=20A
25ºC
1
10
30
180
1.4
trr
15
0
0
1.8
1.6
20
10
25ºC
40
125ºC
trr (ns)
25ºC
140
100
25
40
160
2
di/dt=800A/µs
S
125ºC
Irm (A)
di/dt=800A/µs
180
Qrr (nC)
30
50
200
trr
25ºC
1
15
S
25ºC
10
5
125º
0
0
200
400
600
800
S
220
0.5
0
1000
di/dt (A/µs)
Figure 20: Diode Reverse Recovery Time and
Softness Factor vs. di/dt
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AOT412
Gate Charge Test Circuit & W aveform
Vgs
Qg
10V
+
VDC
+ Vds
-
VDC
DUT
Qgs
Qgd
-
Vgs
Ig
Charge
Resistive Switching Test Circuit & Waveforms
RL
Vds
Vds
Vgs
Rg
90%
+ Vdd
DUT
VDC
-
10%
Vgs
Vgs
t d(on)
tr
t d(off)
t on
tf
t off
Unclamped Inductive Switching (UIS) Test Circuit & Waveforms
L
2
E AR= 1/2 LIAR
Vds
BVDSS
Vds
Id
+ Vdd
Vgs
Vgs
VDC
Rg
-
I AR
Id
DUT
Vgs
Vgs
Diode Recovery Test Circuit & Waveforms
Q rr = - Idt
Vds +
DUT
Vds -
Isd
Vgs
Isd
L
Vgs
Ig
Alpha & Omega Semiconductor, Ltd.
+ Vdd
VDC
-
IF
t rr
dI/dt
I RM
Vds
Vdd
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