KBMFxxSC6 ® A.S.D. EMI FILTER AND LINE TERMINATION FOR PS/2 MOUSE OR KEYBOARD PORTS MAIN APPLICATION EMI Filter and line termination for mouse and keyboard ports on: - Desktop computers - Notebooks - Workstations - Servers DESCRIPTION On the implementation of computer systems, the radiated and conducted EMI should be kept within the required levels as stated by the FCC regulations. In addition to the requirements of EMC compatibility, the computing devices are required to tolerate ESD events and remain operational without user intervention. The KBMF implements a low pass filter to limit EMI levels and provide ESD protection which exceeds IEC 61000-4-2 level 4 standard. The device also implements the pull up resistors needed to bias the data and clock lines. The package is the SOT23-6L which is ideal for situations where board space is at a premium. SOT23-6L FUNCTIONAL DIAGRAM +Vcc Rp Rs Dat Out Dat In C FEATURES Integrated low pass filters for Data and Clock lines Integrated ESD protection Integrated pull-up resistors Small package size Breakdown voltage: VBR = 6V min ■ C +Vcc Gnd +Vcc ■ Rp ■ ■ Rs Clk In Clk Out C ■ C BENEFITS ■ ■ ■ EMI / RFI noise suppression ESD protection exceeding IEC61000-4-2 level 4 High flexibility in the design of high density boards Rs Rp C code 01 39Ω 4.7kΩ 120pF Tolerance ±10% ±10% ±20% TM: ASD and TRANSIL are trademarks of STMicroelectronics. February 2002 - Ed : 1D 1/8 KBMFxxSC6 COMPLIES WITH THE FOLLOWING ESD STANDARDS: IEC 61000-4-2 (R = 330Ω C = 150pF), level 4 ±15 kV (air discharge) ±8 kV (contact discharge) MIL STD 883C, Method 3015-6 Class 3 C = 100 pF R = 1500 Ω 3 positive strikes and 3 negative strikes (F = 1 Hz) ABSOLUTE MAXIMUM RATINGS (Tamb = 25°C) Symbol Parameter Value Unit VPP ESD discharge R = 330Ω C = 150pF contact discharge ESD discharge - MIL STD 883 - Method 3015-6 ±12 ±25 kV kV Junction temperature 150 °C - 55 to +150 °C 260 °C 0 to 70 °C 100 mW Tj Tstg Storage temperature range TL Lead solder temperature (10 second duration) Top Operating temperature Range Pr Power rating per resistor ELECTRICAL CHARACTERISTICS (Tamb = 25°C) Symbol Test conditions Diode leakage current VRM = 5.0V VBR Diode breakdown voltage IR = 1mA VF Diode forward voltage drop IF = 50mA IR 2/8 Parameters Min Typ 6 Max Unit 10 µA V 0.9 V KBMFxxSC6 TECHNICAL INFORMATION EMI FILTERING The KBMFxxSC6 ensure a filtering protection against ElectroMagnetic and RadioFrequency Interferences thanks to its low-pass filter structure. This filter is characterized by the following parameters : - cut-off frequency - Insertion loss - high frequency rejection Fig. A1: Measurements configuration Fig. A2: KBMFxxSC6 attenuation curve Insertion loss (dB) 0 -10 50 Ω TEST BOARD TG OUT RF IN KM1 -20 50 Ω Vg -30 -40 1 10 100 1000 F (MHz) ESD PROTECTION The KBMFxxSC6 is particularly optimized to perform ESD protection. ESD protection is based on the use of device which clamps at : Vouput = VBR + Rd .IPP This protection function is splitted in 2 stages. As shown in figure A3, the ESD strikes are clamped by the first stage S1 and then its remaining overvoltage is applied to the second stage through the resistor R. Such a configuration makes the output voltage very low at the Voutput level. Fig. A3: ESD clamping behavior Rg S1 Rd VPP ESD Surge VBR Rs S2 Rd Vinput Rload Voutput KBMFxxSC6 VBR Device to be protected 3/8 KBMFxxSC6 To have a good approximation of the remaining voltages at both Vinput and Voutput stages, we give the typical dynamical resistance value Rd. By taking into account these following hypothesis : Rt>Rd, Rg>Rd and Rload>Rd, it gives these formulas: Rg .VBR + Rd .Vg Vinput = Rg RS .VBR + Rd .Vinput Voutput = Rt The results of the calculation done for V PP =8kV, Rg=330Ω (IEC 61000-4-2 standard), Vbr=7V (typ.) and Rd = 1ohm (typ.) give: Vinput = 31.2 V Voutput = 7.8 V This confirms the very low remaining voltage across the device to be protected. It is also important to note that in this approximation the parasitic inductance effect was not taken into account. This could be few tenths of volts during few ns at the input side. This parasitic effect is not present at the output side due the low current involved after the resistance RS. The measurements done here after show very clearly (Fig. A5) the high efficiency of the ESD protection : - no influence of the parasitic inductances on output stage - Voutput clamping voltage very close to Vbr (positive strike) and -Vf (negative strike) Fig. A4: Measurement conditions ESD SURGE 4/8 Vin KM1 16kV Air Discharge TEST BOARD Vout KBMFxxSC6 Fig. A5: Remaining voltage at both stages S1 (Vinput) and S2 (Voutput) during ESD surge. b. Negative surge a. Positive surge Please note that the KBMFxxSC6 is not only acting for positive ESD surges but also for negative ones. For these kind of disturbances it clamps close to ground voltage as shown in Fig. A5b. LATCH-UP PHENOMENA The early ageing and destruction of IC’s is often due to latch-up phenomena which is mainly induced by dV/dt. Thanks to its structure, the KBMFxxSC6 provides a high immunity to latch-up phenomena by smoothing very fast edges. CROSSTALK BEHAVIOR Fig. A6: Crosstalk phenomena RG1 Line 1 VG1 RL1 RG2 VG2 RL2 DRIVERS α1VG1 + β12VG2 Line 2 α2VG2 + β21VG1 RECEIVERS The crosstalk phenomena is due to the coupling between 2 lines. The coupling factor ( β12 or β21 ) increases when the gap across lines decreases, this is the reason why we provide crosstalk measurements for monolithic device to guarantee negligeable crosstalk between the lines. In the example above the expected signal on load RL2 is α2VG2, in fact the real voltage at this point has got an extra value β21VG1. This part of the VG1 signal represents the effect of the crosstalk phenomenon of the line 1 on the line 2. This phenomenon has to be taken into account when the drivers impose fast digital data or high frequency analog signals in the disturbing line. The perturbed line will be more affected if it works with low voltage signal or high load impedance (few kΩ). 5/8 KBMFxxSC6 Fig. A7: Analog Crosstalk measurements configuration Fig. A8: Typical Analog Crosstalk measurement crosstalk (dB) 0 -20 TEST BOARD 50 Ω TG OUT -40 RF IN KM1 -60 50 Ω Vg -80 -100 -120 1 10 100 1,000 F (MHz) Figure A7 gives the measurement circuit for the analog crosstalk application. In figure A8, the curve shows the effect of the Data line on the CLK line. In usual frequency range of analog signals (up to 100MHz) the effect on disturbed line is less than -37dB. Fig. A9: Digital crosstalk measurements configuration +5V Fig. A10: Digital crosstalk measurements +5V 74HC04 74HC04 Line 1 Square Pulse Generator 5KHz +5V VG1 KBMF 01SC6 Line 2 b21 VG1 Figure A9 shows the measurement circuit used to quantify the crosstalk effect in a classical digital application. Figure A10 shows that in such a condition signal from 0 to 5V and rise time of few ns, the impact on the other line is less than 50mV peak to peak. (Below the logic high threshold voltage).The measurements performed with falling edges gives the results within the same range. 6/8 KBMFxxSC6 APPLICATION EXAMPLE Fig. A11: Implementation of KBMFxxSC6 in a typical application KDAT KCLK KBMF 01SC6 PS/2 Connector PS/2 Keyboard Vcc MDAT MCLK KBMF 01SC6 PS/2 Mouse Super I/O The KBMFxxSC6 device could be used on PS/2 mouse or keyboard as indicated by figure A11. 7/8 KBMFxxSC6 PACKAGE MECHANICAL DATA. SOT23-6L A E REF. DIMENSIONS Millimeters A2 e D b e Min. Typ. Max. Min. Typ. Max. A 0.90 1.45 0.035 0.057 A1 0 0.10 0.004 A2 0.90 1.30 0.035 0.0512 b 0.35 0.50 0.0137 0.02 c 0.09 0.20 0.004 0.008 D 2.80 3.00 0.11 0.118 E 1.50 1.75 0.059 0.0689 e A1 C θ L H 2.60 3.00 0.102 0.118 L 0.10 0.60 0.004 0.024 10° mm inch 10° Lead plating Tin-lead Lead plating thickness 5µm min 25µm max Lead material Sn / Pb (70% to 90%Sn) Lead coplanarity 10µm max Body material Molded epoxy Flammability UL94V-0 1.10 0.043 1.20 0.047 0.60 0.024 2.30 0.090 0.0374 MECHANICAL SPECIFICATIONS RECOMMENDED FOOTPRINT (mm) 3.50 0.138 0 0.95 θ H Inches 0.95 0.037 MARKING Type Order Code Weight Marking Package Base Qty KBMF01SC6 KBMF01SC6 16.7mg KM1 SOT23-6L 3000 Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a registered trademark of STMicroelectronics © 2002 STMicroelectronics - Printed in Italy - All rights reserved. STMicroelectronics GROUP OF COMPANIES Australia - Brazil - Canada - China - Finland - France - Germany Hong Kong - India - Israel - Italy - Japan - Malaysia - Malta - Morocco - Singapore Spain - Sweden - Switzerland - United Kingdom - United States. 8/8 http://www.st.com