FAIRCHILD 74VHC138

Revised April 1999
74VHC138
3-to-8 Decoder/Demultiplexer
General Description
The VHC138 is an advanced high speed CMOS 3-to-8
decoder/demultiplexer fabricated with silicon gate CMOS
technology. It achieves the high speed operation similar to
equivalent Bipolar Schottky TTL while maintaining the
CMOS low power dissipation.
When the device is enabled, 3 binary select inputs (A0, A1
and A2) determine which one of the outputs (O0–O7) will go
LOW. When enable input E3 is held LOW or either E1 or E2
is held HIGH, decoding function is inhibited and all outputs
go HIGH. E3, E1 and E2 inputs are provided to ease cascade connection and for use as an address decoder for
memory systems. An input protection circuit ensures that
0V to 7V can be applied to the input pins without regard to
the supply voltage. This device can be used to interface 5V
to 3V systems and two supply systems such as battery
back up. This circuit prevents device destruction due to
mismatched supply and input voltages.
Features
■ High Speed: tPD = 5.7ns (typ) at TA = 25°C
■ Low power dissipation: ICC = 4 µA (max.) at TA = 25°C
■ High noise immunity: VNIH = VNIL = 28% VCC (min.)
■ Power down protection provided on all inputs
■ Pin and function compatible with 74HC138
Ordering Code:
Order Number
74VHC138M
74VHC138SJ
74VHC138MTC
Package Number
M16A
M16D
MTC16
74VHC138N
N16E
Package Description
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150” Narrow
16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide
Surface mount packages are also available on Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Symbols
Connection Diagram
IEEE/IEC
Pin Descriptions
Pin Names
© 1999 Fairchild Semiconductor Corporation
DS011537.prf
Description
A0–A2
Address Inputs
E1–E2
Enable Inputs
E3
Enable Input
O0–O7
Outputs
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74VHC138 3-to-8 Decoder/Demultiplexer
November 1992
74VHC138
Truth Table
Inputs
Outputs
E2
E3
A0
A1
A2
O0
O1
O2
O3
O4
O5
O6
O7
H
X
X
X
X
X
H
H
H
H
H
H
H
H
X
H
X
X
X
X
H
H
H
H
H
H
H
H
X
X
L
X
X
X
H
H
H
H
H
H
H
H
L
L
H
L
L
L
L
H
H
H
H
H
H
H
L
L
H
H
L
L
H
L
H
H
H
H
H
H
L
L
H
L
H
L
H
H
L
H
H
H
H
H
L
L
H
H
H
L
H
H
H
L
H
H
H
H
L
L
H
L
L
H
H
H
H
H
L
H
H
H
L
L
H
H
L
H
H
H
H
H
H
L
H
H
L
L
H
L
H
H
H
H
H
H
H
H
L
H
L
L
H
H
H
H
H
H
H
H
H
H
H
L
E1
H = HIGH Voltage Level
L = LOW Voltage Level
X = Immaterial
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2
Supply Voltage (VCC)
−0.5V to +7.0V
DC Input Voltage (VIN)
−0.5V to +7.0V
DC Output Voltage (VOUT)
Recommended Operating
Conditions (Note 2)
2.0V to +5.5V
Supply Voltage (VCC)
−0.5V to VCC + 0.5V
0V to +5.5V
Input Voltage (VIN)
Input Diode Current (IIK)
−20 mA
Output Voltage (VOUT)
Output Diode Current (IOK)
±20 mA
Operating Temperature (TOPR)
DC Output Current (IOUT)
±25 mA
Input Rise and Fall Time (tr, tf)
DC VCC /GND Current (ICC )
±75 mA
VCC = 3.3V ± 0.3V
0 ∼ 100 ns/V
−65°C to +150°C
VCC = 5.0V ± 0.5V
0 ∼ 20 ns/V
Storage Temperature (TSTG)
Lead Temperature (TL)
(Soldering, 10 seconds)
0V to VCC
−40°C to +85°C
Note 1: Absolute Maximum Ratings are values beyond which the device
may be damaged or have its useful life impaired. The databook specifications should be met, without exception, to ensure that the system design is
reliable over its power supply, temperature, and output/input loading variables. Fairchild does not recommend operation outside databook specifications.
260°C
Note 2: Unused inputs must be held HIGH or LOW. They may not float.
DC Electrical Characteristics
Symbol
VIH
VIL
VOH
VOL
Parameter
HIGH Level Input Voltage
LOW Level Input Voltage
HIGH Level Output Voltage
LOW Level Output Voltage
IIN
Input Leakage Current
ICC
Quiescent Supply Current
VCC
(V)
TA = 25°C
Min
Typ
TA = −40°C to +85°C
Max
Min
2.0
1.50
1.50
3.0 − 5.5
0.7 VCC
0.7 VCC
Max
2.0
0.50
0.50
0.3 VCC
0.3 VCC
2.0
1.9
2.0
1.9
2.9
3.0
2.9
4.5
4.4
4.5
4.4
3.0
2.58
2.48
4.5
3.94
3.80
Conditions
V
3.0 − 5.5
3.0
Units
V
VIN = VIH IOH = −50 µA
V
or VIL
IOH = −4 mA
V
2.0
0.0
0.1
0.1
3.0
0.0
0.1
0.1
4.5
0.0
0.1
0.1
IOH = −8 mA
VIN = VIH IOL = 50 µA
V
or VIL
IOL = 4 mA
3.0
0.36
0.44
4.5
0.36
0.44
0 − 5.5
±0.1
±1.0
µA
VIN = 5.5V or GND
5.5
4.0
40.0
µA
VIN = VCC or GND
3
V
IOL = 8 mA
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74VHC138
Absolute Maximum Ratings(Note 1)
74VHC138
AC Electrical Characteristics
Symbol
Parameter
tPLH
Propagation Delay
tPHL
An to On
VCC
(V)
3.3 ± 0.3
5.0 ± 0.5
tPLH
Propagation Delay
tPHL
E3 to On
3.3 ± 0.3
5.0 ± 0.5
tPLH
Propagation Delay
tPHL
E1 or E2 to On
3.3 ± 0.3
5.0 ± 0.5
TA = 25°C
Min
TA = −40°C to +85°C
Typ
Max
Min
Max
8.2
11.4
1.0
13.5
10.0
15.8
1.0
18.0
5.7
8.1
1.0
9.5
7.2
10.1
1.0
11.5
8.1
12.8
1.0
15.0
10.6
16.3
1.0
18.5
5.6
8.1
1.0
9.5
7.1
10.1
1.0
11.5
8.2
11.4
1.0
13.5
10.7
14.9
1.0
17.0
5.8
8.1
1.0
9.5
7.3
10.1
1.0
11.5
10
CIN
Input Capacitance
4
CPD
Power Dissipation
34
10
Units
ns
ns
ns
ns
ns
ns
Conditions
CL = 15 pF
CL = 50 pF
CL = 15 pF
CL = 50 pF
CL = 15 pF
CL = 50 pF
CL = 15 pF
CL = 50 pF
CL = 15 pF
CL = 50 pF
CL = 15 pF
CL = 50 pF
pF
VCC = Open
pF
(Note 3)
Capacitance
Note 3: CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load. Average
operating current can be obtained by the equation: ICC (opr.) = CPD * VCC * fIN + ICC.
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4
74VHC138
Physical Dimensions inches (millimeters) unless otherwise noted
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150” Narrow
Package Number M16A
16-Lead Small Outline Package (SOP) EIAJ TYPE II, 5.3mm Wide
Package Number M16D
5
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74VHC138
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Package Number MTC16
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6
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide
Package Number N16E
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
2. A critical component in any component of a life support
1. Life support devices or systems are devices or systems
device or system whose failure to perform can be reawhich, (a) are intended for surgical implant into the
sonably expected to cause the failure of the life support
body, or (b) support or sustain life, and (c) whose failure
device or system, or to affect its safety or effectiveness.
to perform when properly used in accordance with
instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the
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user.
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications.
74VHC138 3-to-8 Decoder/Demultiplexer
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)