19-2829; Rev 2; 5/07 Anything-to-LVDS Dual 2 x 2 Crosspoint Switches Also refer to the MAX9392/MAX9393 with flow-through pinout. Applications High-Speed Telecom/Datacom Equipment High-Level Input Fail-Safe Detection (MAX9390) Low-Level Input Fail-Safe Detection (MAX9391) 3.0V to 3.6V Supply Voltage Range LVCMOS/LVTTL Logic Inputs Control Signal Routing Ordering Information TEMP RANGE PINPACKAGE PKG CODE MAX9390EHJ -40°C to +85°C 32 TQFP H32-1 MAX9390EHJ+ -40°C to +85°C 32 TQFP H32-1 MAX9391EHJ -40°C to +85°C 32 TQFP H32-1 MAX9391EHJ+ -40°C to +85°C 32 TQFP H32-1 PART +Denotes a lead-free package. Pin Configurations VCC ASEL0 INA0 INA0 GND TOP VIEW INA1 Fail-safe circuitry forces the outputs to a differential low condition for undriven inputs or when the commonmode voltage exceeds the specified range. The MAX9390 provides high-level input fail-safe detection for LVDS, HSTL, and other GND-referenced differential inputs. The MAX9391 provides low-level input fail-safe detection for LVPECL, CML, and other VCC-referenced differential inputs. Ultra-low 82ps(P-P) (max) pseudorandom bit sequence (PRBS) jitter ensures reliable communications in highspeed links that are highly sensitive to timing error, especially those incorporating clock-and-data recovery, or serializers and deserializers. The high-speed switching performance guarantees 1.5GHz operation and less than 65ps (max) skew between channels. LVDS inputs and outputs are compatible with the TIA/EIA-644 LVDS standard. The LVDS outputs drive 100Ω loads. The MAX9390/MAX9391 are offered in a 32-pin TQFP package and operate over the extended temperature range (-40°C to +85°C). ♦ ♦ ♦ ♦ INA1 Four LVCMOS/LVTTL logic inputs (two per channel) control the internal connections between inputs and outputs. This flexibility allows for the following configurations: 2 x 2 crosspoint switch, 2:1 mux, 1:2 splitter, or dual repeater. This makes the MAX9390/MAX9391 ideal for protection switching in fault-tolerant systems, loopback switching for diagnostics, fanout buffering for clock/data distribution, and signal regeneration. ♦ 1.5GHz Operation with 250mV Differential Output Swing ♦ 2ps(RMS) (max) Random Jitter ♦ AC Specifications Guaranteed for 150mV Differential Input ♦ Signal Inputs Accept Any Differential Signaling Standard ♦ LVDS Outputs for Clock or High-Speed Data ASEL1 The MAX9390/MAX9391 dual 2 x 2 crosspoint switches perform high-speed, low-power, and low-noise signal distribution. The MAX9390/MAX9391 multiplex one of two differential input pairs to either or both low-voltage differential signaling (LVDS) outputs for each channel. Independent enable inputs turn on or turn off each differential output pair. Features 32 31 30 29 28 27 26 25 + ENB1 1 24 VCC OUTB1 2 23 OUTA0 OUTB1 3 22 OUTA0 21 ENA0 GND 4 MAX9390 MAX9391 ENB0 5 20 GND Central-Office Backplane Clock Distribution OUTB0 6 19 OUTA1 DSLAM OUTB0 7 18 OUTA1 Protection Switching VCC 8 17 ENA1 14 15 16 BSEL1 INB0 13 INB1 INB0 12 INB1 11 VCC 10 BSEL0 Functional Diagram and Typical Operating Circuit appear at end of data sheet. 9 GND Fault-Tolerant Systems TQFP ________________________________________________________________ Maxim Integrated Products For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at 1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com. 1 MAX9390/MAX9391 General Description MAX9390/MAX9391 Anything-to-LVDS Dual 2 x 2 Crosspoint Switches ABSOLUTE MAXIMUM RATINGS VCC to GND ...........................................................-0.3V to +4.1V IN_ _, IN_ _, OUT_ _, OUT_ _, EN_ _, _SEL_ to GND.........................................-0.3V to (VCC + 0.3V) IN_ _ to IN_ _ ..........................................................................±3V Short-Circuit Duration (OUT_ _, OUT_ _) ...................Continuous Continuous Power Dissipation (TA = +70°C) 32-Pin QFP (derate 13.1mW/°C above +70°C).............................................................1047mW Junction-to-Ambient Thermal Resistance in Still Air 32-Pin TQFP............................................................+76.4°C/W Operating Temperature Range ...........................-40°C to +85°C Junction Temperature ......................................................+150°C Storage Temperature Range .............................-65°C to +150°C ESD Protection (Human Body Model) (IN_ _, IN_ _, OUT_ _, OUT_ _, EN_ _, SEL_ _) ................±2kV Soldering Temperature (10s) ...........................................+300°C Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. DC ELECTRICAL CHARACTERISTICS (VCC = 3.0V to 3.6V, RL = 100Ω ±1%, EN_ _ = VCC, VCM = 0.05V to (VCC - 0.6V) (MAX9390), VCM = 0.6V to (VCC - 0.05V) (MAX9391) TA = -40°C to +85°C, unless otherwise noted. Typical values are at VCC = 3.3V, |VID| = 0.2V, VCM = 1.2V, TA = +25°C.) (Notes 1, 2, and 3) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS V LVCMOS/LVTTL INPUTS (EN_ _, _SEL_) Input High Voltage VIH 2.0 VCC Input Low Voltage VIL 0 0.8 V Input High Current IIH VIN = 2.0V to VCC 0 20 µA Input Low Current IIL VIN = 0 to 0.8V 0 10 µA Differential Input Voltage VID VILD > 0 and VIHD < VCC, Figure 1 0.1 3.0 V Input Common-Mode Range VCM MAX9390 0.05 VCC - 0.6 MAX9391 0.6 VCC - 0.05 Input Current IIN_ _, IIN_ _ MAX9390 |VID| < 3.0V -75 +10 MAX9391 |VID| < 3.0V -10 +100 VOD RL = 100Ω, Figure 2 DIFFERENTIAL INPUTS (IN_ _, IN _ _) V µA LVDS OUTPUTS (OUT_ _, OUT_ _) Differential Output Voltage Change in Magnitude of VOD Between Complementary Output States Offset Common-Mode Voltage Change in Magnitude of VOS Between Complementary Output States 2 ΔVOD Figure 2 VOS Figure 2 ΔVOS Figure 2 250 1.125 350 450 mV 1.0 50 mV 1.25 1.375 V 1.0 50 mV _______________________________________________________________________________________ Anything-to-LVDS Dual 2 x 2 Crosspoint Switches (VCC = 3.0V to 3.6V, RL = 100Ω ±1%, EN_ _ = VCC, VCM = 0.05V to (VCC - 0.6V) (MAX9390), VCM = 0.6V to (VCC - 0.05V) (MAX9391) TA = -40°C to +85°C, unless otherwise noted. Typical values are at VCC = 3.3V, |VID| = 0.2V, VCM = 1.2V, TA = +25°C.) (Notes 1, 2, and 3) PARAMETER SYMBOL CONDITIONS TYP MAX VOUT_ _ or V OUT_ _ = 0 MIN 30 40 VOUT_ _ = V OUT_ _ = 0 18 24 Output Short-Circuit Current (Either Output Shorted to GND) |IOS| VID = ±100mV (Note 4) Output Short-Circuit Current (Outputs Shorted Together) |IOSB| VID = ±100mV, VOUT_ _ = V OUT_ _ (Note 4) 5.0 12 RL = 100Ω, EN_ _ = VCC 68 98 RL = 100Ω, EN_ _ = VCC, switching at 670MHz (1.34Gbps) 68 98 UNITS mA mA SUPPLY CURRENT Supply Current ICC mA AC ELECTRICAL CHARACTERISTICS (VCC = 3.0V to 3.6V, fIN < 1.34GHz, tR_IN = tF_IN = 125ps, RL = 100Ω ±1%, |VID| > 150mV, VCM = 0.075V to (VCC - 0.6V) (MAX9390 only), VCM = 0.6V to (VCC - 0.075V) (MAX9391 only), EN_ _ = VCC, TA = -40°C to +85°C, unless otherwise noted. Typical values are at VCC = 3.3V, |VID| = 0.2V, VCM = 1.2V, fIN = 1.34GHz, TA = +25°C.) (Note 5) PARAMETER MAX UNITS tSWITCH Figure 3 1.1 ns Disable, Time to Differential Output Low tPHD Figure 4 1.7 ns Enable, Time to Differential Output High tPDH Figure 4 1.7 ns Switching Frequency fMAX VOD > 250mV 1.50 2.20 Low-to-High Propagation Delay tPLH Figures 1, 5 294 409 565 ps High-to-Low Propagation Delay tPHL Figures 1, 5 286 402 530 ps _SEL_ to Switched Output SYMBOL CONDITIONS MIN TYP GHz Pulse Skew |tPLH - tPHL| tSKEW Figures 1, 5 (Note 6) 7 97 ps Output-to-Output Skew tCCS Figures 5, 6 (Note 7) 10 65 ps Output Low-to-High Transition Time (20% to 80%) tR Figures 1, 5; fIN = 100MHz 112 153 185 ps Output High-to-Low Transition Time (80% to 20%) tF Figures 1, 5; fIN = 100MHz 112 153 185 ps Added Random Jitter tRJ fIN_ _ = 1.34GHz, clock pattern (Note 8) 2 ps(RMS) Added Deterministic Jitter tDJ 1.34Gbps, 223 - 1 PRBS (Note 8) 55 82 ps(P-P) Measurements obtained with the device in thermal equilibrium. All voltages referenced to GND except VID, VOD, and ΔVOD. Current into the device defined as positive. Current out of the device defined as negative. DC parameters tested at TA = +25°C and guaranteed by design and characterization for TA = -40°C to +85°C. Current through either output. Guaranteed by design and characterization. Limits set at ±6 sigma. tSKEW is the magnitude difference of differential propagation delays for the same output over same conditions. tSKEW = |tPHL - tPLH|. Note 7: Measured between outputs of the same device at the signal crossing points for a same-edge transition, under the same conditions. Note 8: Device jitter added to the differential input signal. Note 1: Note 2: Note 3: Note 4: Note 5: Note 6: _______________________________________________________________________________________ 3 MAX9390/MAX9391 DC ELECTRICAL CHARACTERISTICS (continued) Typical Operating Characteristics (VCC = 3.3V, |VID| = 0.2V, VCM = 1.2V, fIN = 1.34GHz, TA = +25°C.) VCC = 3.6V 66 VCC = 3.3V 250 200 150 10 35 60 140 -40 0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2 2.4 85 -15 10 35 60 FREQUENCY (GHz) TEMPERATURE (°C) PROPAGATION DELAY vs. TEMPERATURE MAX9390 DIFFERENTIAL INPUT CURRENT vs. TEMPERATURE MAX9391 DIFFERENTIAL INPUT CURRENT vs. TEMPERATURE 400 390 380 370 360 -10 -15 -20 -25 -30 -35 -40 VIN = 0.1V 70 60 -15 10 35 60 85 30 20 VIN = 0.3V -10 -40 -15 10 35 85 60 -40 -15 35 MAX9391 DIFFERENTIAL INPUT CURRENT vs. VILD 80 MAX9390 toc07 VCC = 3V VCC = 3.6V 70 IN_ _ OR IN_ _ = VCC VCC = 3.6V 60 INPUT CURRENT (μA) IN_ _ OR IN_ _ = GND 10 TEMPERATURE (°C) TEMPERATURE (°C) MAX9390 INPUT CURRENT vs. VIHD -10 -15 -20 -25 -30 -35 40 0 TEMPERATURE (°C) 10 5 0 -5 VIN = 3.2V 50 10 -45 -50 350 85 MAX9390 toc06 VIN = 3V MAX9390 toc08 410 80 INPUT CURRENT (μA) INPUT CURRENT (μA) 420 10 5 0 -5 MAx9390 toc05 MAX9390 toc04 430 INPUT CURRENT (μA) tR 150 TEMPERATURE (°C) 440 -40 tF 120 0 -15 160 130 50 450 50 40 30 VCC = 3V 20 10 -40 -45 -50 4 fIN = 100MHz 170 100 54 -40 MAX9390 toc03 MAX9390 toc02 300 VCC = 3V 58 180 RISE/FALL TIME (ps) 74 62 350 OUTPUT AMPLITUDE (mV) 78 SUPPLY CURRENT (mA) 400 MAX9390 toc01 82 70 OUTPUT RISE AND FALL TIMES vs. TEMPERATURE OUTPUT AMPLITUDE vs. FREQUENCY SUPPLY CURRENT vs. TEMPERATURE PROPAGATION DELAY (ps) MAX9390/MAX9391 Anything-to-LVDS Dual 2 x 2 Crosspoint Switches 0 -10 0 0.3 0.6 0.9 1.2 1.5 1.8 2.1 2.4 2.7 3.0 3.3 3.6 0 0.3 0.6 0.9 1.2 1.5 1.8 2.1 2.4 2.7 3.0 3.3 3.6 VIHD (V) VILD (V) _______________________________________________________________________________________ 60 85 Anything-to-LVDS Dual 2 x 2 Crosspoint Switches PIN NAME FUNCTION 1 ENB1 2 OUTB1 B1 LVDS Noninverting Output. Connect a 100Ω termination resistor between OUTB1 and OUTB1 at the receiver inputs to ensure proper operation. 3 OUTB1 B1 LVDS Inverting Output. Connect a 100Ω termination resistor between OUTB1 and OUTB1 at the receiver inputs to ensure proper operation. 4, 9, 20, 25 GND Ground 5 ENB0 B0 Output Enable. Drive ENB0 high to enable the B0 LVDS outputs. An internal 435kΩ resistor pulls ENB0 low when unconnected. 6 OUTB0 B0 LVDS Noninverting Output. Connect a 100Ω termination resistor between OUTB0 and OUTB0 at the receiver inputs to ensure proper operation. 7 OUTB0 B0 LVDS Inverting Output. Connect a 100Ω termination resistor between OUTB0 and OUTB0 at the receiver inputs to ensure proper operation. 8, 13, 24, 29 VCC Power-Supply Input. Bypass each VCC to GND with 0. 1µF and 0.01µF ceramic capacitors. Install both bypass capacitors as close to the device as possible, with the 0.01µF capacitor closest to the device. 10 INB0 LVDS/HSTL (MAX9390) or LVPECL/CML (MAX9391) Inverting Input. An internal 128kΩ resistor to VCC pulls the input high when unconnected (MAX9390). An internal 68kΩ resistor to GND pulls the input low when unconnected (MAX9391). 11 INB0 LVDS/HSTL (MAX9390) or LVPECL/CML (MAX9391) Noninverting Input. An internal 128kΩ resistor to VCC pulls the input high when unconnected (MAX9390). An internal 68kΩ resistor to GND pulls the input low when unconnected (MAX9391). 12 BSEL0 Input Select for B0 Output. Selects the differential input to reproduce at the B0 differential outputs. Connect BSEL0 to GND or leave open to select the INB0 (INB0) set of inputs. Connect BSEL0 to VCC to select the INB1 (INB1) set of inputs. An internal 435kΩ resistor pulls BSEL0 low when unconnected. 14 INB1 LVDS/HSTL (MAX9390) or LVPECL/CML (MAX9391) Inverting Input. An internal 128kΩ resistor to VCC pulls the input high when unconnected (MAX9390). An internal 68kΩ resistor to GND pulls the input low when unconnected (MAX9391). 15 INB1 LVDS/HSTL (MAX9390) or LVPECL/CML (MAX9391) Noninverting Input. An internal 128kΩ resistor to VCC pulls the input high when unconnected (MAX9390). An internal 68kΩ resistor to GND pulls the input low when unconnected (MAX9391). 16 BSEL1 B1 Output Enable. Drive ENB1 high to enable the B1 LVDS outputs. An internal 435kΩ resistor pulls ENB1 low when unconnected. Input Select for B1 Output. Selects the differential input to reproduce at the B1 differential outputs. Connect BSEL1 to GND or leave open to select the INB0 (INB0) set of inputs. Connect BSEL1 to VCC to select the INB1 (INB1) set of inputs. An internal 435kΩ resistor pulls BSEL1 low when unconnected. _______________________________________________________________________________________ 5 MAX9390/MAX9391 Pin Description Anything-to-LVDS Dual 2 x 2 Crosspoint Switches MAX9390/MAX9391 Pin Description (continued) 6 PIN NAME FUNCTION 17 ENA1 18 OUTA1 A1 LVDS Inverting Output. Connect a 100Ω termination resistor between OUTA1 and OUTA1 at the receiver inputs to ensure proper operation. 19 OUTA1 A1 LVDS Noninverting Output. Connect a 100Ω termination resistor between OUTA1 and OUTA1 at the receiver inputs to ensure proper operation. 21 ENA0 22 OUTA0 A0 LVDS Inverting Output. Connect a 100Ω termination resistor between OUTA0 and OUTA0 at the receiver inputs to ensure proper operation. 23 OUTA0 A0 LVDS Noninverting Output. Connect a 100Ω termination resistor between OUTA0 and OUTA0 at the receiver inputs to ensure proper operation. 26 INA0 LVDS/HSTL (MAX9390) or LVPECL/CML (MAX9391) Noninverting Input. An internal 128kΩ resistor to VCC pulls the input high when unconnected (MAX9390). An internal 68kΩ resistor to GND pulls the input low when unconnected (MAX9391). 27 INA0 LVDS/HSTL (MAX9390) or LVPECL/CML (MAX9391) Inverting Input. An internal 128kΩ resistor to VCC pulls the input high when unconnected (MAX9390). An internal 68kΩ resistor to GND pulls the input low when unconnected (MAX9391). 28 ASEL0 Input Select for A0 Output. Selects the differential input to reproduce at the A0 differential outputs. Connect ASEL0 to GND or leave open to select the INA0 (INA0) set of inputs. Connect ASEL0 to VCC to select the INA1 (INA1) set of inputs. An internal 435kΩ resistor pulls ASEL0 low when unconnected. 30 INA1 LVDS/HSTL (MAX9390) or LVPECL/CML (MAX9391) Noninverting Input. An internal 128kΩ resistor to VCC pulls the input high when unconnected (MAX9390). An internal 68kΩ resistor to GND pulls the input low when unconnected (MAX9391). 31 INA1 LVDS/HSTL (MAX9390) or LVPECL/CML (MAX9391) Inverting Input. An internal 128kΩ resistor to VCC pulls the input high when unconnected (MAX9390). An internal 68kΩ resistor to GND pulls the input low when unconnected (MAX9391). 32 ASEL1 Input Select for A1 Output. Selects the differential input to reproduce at the A1 differential outputs. Connect ASEL1 to GND or leave open to select the INA0 (INA0) set of inputs. Connect ASEL1 to VCC to select the INA1 (INA1) set of inputs. An internal 435kΩ resistor pulls ASEL1 low when unconnected. A1 Output Enable. Drive ENA1 high to enable the A1 LVDS outputs. An internal 435kΩ resistor pulls ENA1 low when unconnected. A0 Output Enable. Drive ENA0 high to enable the A0 LVDS outputs. An internal 435kΩ resistor pulls ENA0 low when unconnected. _______________________________________________________________________________________ Anything-to-LVDS Dual 2 x 2 Crosspoint Switches MAX9390/MAX9391 VIN_ _ VIHD VID = 0 VID = 0 tPLH tPHL VIN_ _ VILD OUT_ _ 1/4 MAX9390/MAX9391 VOUT_ _ VOD RL/2 VOD = 0 VOD = 0 IN_ _ VOS VOUT_ _ IN_ _ RL/2 80% VOD = 0 50% 80% EN_ _ = HIGH VID = VIN_ _ - VIN_ _ VOD = 0 50% 20% 20% tR OUT_ _ ΔVOD = ⎪VOD - VOD*⎪ ΔVOS = ⎪VOS - VOS*⎪ VOD AND VOS ARE MEASURED WITH VID = +100mV VOD* AND VOS* ARE MEASURED WITH VID = -100mV tF VID = VIN_ _ - VIN_ _ VOD = VOUT_ _ - VOUT_ _ tPLH AND tPHL MEASURED FOR ANY COMBINATION OF _SEL0 AND _SEL1. Figure 1. Output Transition Time and Propagation Delay Timing Diagram Figure 2. Test Circuit for VOD and VOS VIHD IN_0 VID = 0 VILD IN_0 VIHD IN_1 VID = 0 VILD IN_1 VIH 1.5V 1.5V VIL _SEL_ OUT_ _ IN_0 VOD = 0 IN_1 VOD = 0 IN_0 OUT_ _ tSWITCH tSWITCH EN_0 = EN_1 = HIGH VID = VIN_ _ - VIN_ _ Figure 3. Input to Rising/Falling Edge Select and Mux Switch Timing Diagram _______________________________________________________________________________________ 7 MAX9390/MAX9391 Anything-to-LVDS Dual 2 x 2 Crosspoint Switches OUT_ _ 1/4 MAX9390/MAX9391 1.5V VEN_ _ CL 3V 1.5V 0 RL/2 IN_ _ tPHD IN_ _ 1.25V RL/2 PULSE GENERATOR VOUT_ _ WHEN VID = +100mV VOUT_ _ WHEN VID = -100mV tPDH 50% 50% 50% 50% OUT_ _ VOUT_ _ WHEN VID = -100mV VOUT_ _ WHEN VID = +100mV CL 50Ω tPHD RL = 100Ω ±1% CL = 1.0pF tPDH VID = VIN_ _ - VIN_ _ Figure 4. Output Active-to-Disable and Disable-to-Active Test Circuit and Timing Diagram _SEL0 IN_0 CL OUT_0 0 IN_0 RL 1 PULSE GENERATOR 50Ω OUT_0 CL MAX9390 MAX9391 50Ω CL OUT_1 0 RL IN_1 1 IN_1 CL _SEL1 EN_0 = EN_1 = HIGH 1 CHANNEL SHOWN RL = 100Ω ±1% CL = 1.0pF Figure 5. Output Transition Time, Propagation Delay, and Output Channel-to-Channel Skew Test Circuit 8 _______________________________________________________________________________________ OUT_1 Anything-to-LVDS Dual 2 x 2 Crosspoint Switches MAX9390/MAX9391 VOUT_0 VOD = 0 VOD = 0 tCCS tCCS IN_0 OUT_0 IN_1 OUT_1 VOUT_0 VOUT_1 VOD = 0 2 x 2 CROSSPOINT VOD = 0 VOUT_1 VOD = VOUT_ _ - VOUT_ _ IN_0 tCCS MEASURED WITH _SEL0 = _SEL1 = HIGH OR LOW (1:2 SPLITTER CONFIGURATION). OUT_0 OR OUT_1 IN_1 Figure 6. Output Channel-to-Channel Skew 2:1 MUX Detailed Description The LVDS interface standard provides a signaling method for point-to-point communication over a controlled-impedance medium as defined by the ANSI TIA/EIA-644 standard. LVDS utilizes a lower voltage swing than other communication standards, achieving higher data rates with reduced power consumption, while reducing EMI emissions and system susceptibility to noise. The MAX9390/MAX9391 1.5GHz dual 2 x 2 crosspoint switches optimize high-speed, low-power, point-topoint interfaces. The MAX9390 accepts LVDS and HSTL signals, while the MAX9391 accepts LVPECL and CML signals. Both devices route the input signals to either or both LVDS outputs. When configured as a 1:2 splitter, the outputs repeat the selected inputs. This configuration creates copies of signals for protection switching. When configured as a repeater, the device operates as a two-channel buffer. Repeating restores signal amplitude, allowing isolation of media segments or longer media drive. When configured as a 2:1 mux, select primary or backup signals to provide a protection-switched, fault-tolerant application. Input Fail-Safe The differential inputs of the MAX9390/MAX9391 possess internal fail-safe protection. Fail-safe circuitry forces the outputs to a differential low condition for undriven inputs or when the common-mode voltage exceeds the specified range. The MAX9390 provides high-level input fail-safe detection for LVDS, HSTL, and other GND-referenced differential inputs. The MAX9391 provides low-level input fail-safe detection for LVPECL, CML, and other VCC-referenced differential inputs. OUT_0 IN_0 OR IN_1 OUT_1 1:2 SPLITTER IN_0 OUT_0 IN_1 OUT_1 DUAL REPEATER Figure 7. Programmable Configurations Select Function The _SEL_ logic inputs control the input and output signal connections. Two logic inputs control the signal routing for each channel. _SEL0 and _SEL1 allow the devices to be configured as a differential crosspoint switch, 2:1 mux, dual repeater, or 1:2 splitter (Figure 7). See Table 1 for mode-selection settings (insert A or B for the _). Channels A and B possess separate select inputs, allowing different configurations for each channel. Enable Function The EN_ _ logic inputs enable and disable each set of differential outputs. Connect EN_ 0 to VCC to enable the OUT_0/OUT_0 differential output pair. Connect EN_0 to GND to disable the OUT_0/OUT_0 differential output pair. The differential output pairs assert to a differential low condition when disabled. _______________________________________________________________________________________ 9 MAX9390/MAX9391 Anything-to-LVDS Dual 2 x 2 Crosspoint Switches Table 1. Input/Output Function Table _SEL0 _SEL1 OUT_0 / OUT_0 OUT_1 / OUT_1 MODE 0 0 IN_0 / IN_0 IN_0 / IN_0 1:2 splitter 0 1 IN_0 / IN_0 IN_1 / IN_1 Repeater 1 0 IN_1 / IN_1 IN_0 / IN_0 Switch 1 1 IN_1 / IN_1 IN_1 / IN_1 1:2 splitter Applications Information Differential Inputs The MAX9390/MAX9391 inputs accept any differential signaling standard within the specified common-mode voltage range. The fail-safe feature detects commonmode input signal levels and generates a differential output low condition for undriven inputs or when the common-mode voltage exceeds the specified range. Leave unused inputs unconnected or connect to VCC for the MAX9390 or to GND for the MAX9391. Differential Outputs The output common-mode voltage is not properly established if the LVDS output is higher than 0.6V when the supply voltage is ramping up at power-on. This condition can occur when an LVDS output drives an LVDS input on the same chip. To avoid this situation for the MAX9390/MAX9391, connect a 10kΩ resistor from the noninverting output (OUT_) to ground, and connect a 10kΩ resistor from the inverting output (OUT_) to ground. These pulldown resistors keep the output below 0.6V when the supply is ramping up (Figure 8). Expanding the Number of LVDS Output Ports Cascade devices to make larger switches. Consider the total propagation delay and total jitter when determining the maximum allowable switch size. Power-Supply Bypassing Bypass each VCC to GND with high-frequency surfacemount ceramic 0.1µF and 0.01µF capacitors in parallel as close to the device as possible. Install the 0.01µF capacitor closest to the device. Differential Traces Input and output trace characteristics affect the performance of the MAX9390/MAX9391. Connect each input and output to a 50Ω characteristic impedance trace. Maintain the distance between differential traces and eliminate sharp corners to avoid discontinuities in differential impedance and maximize common-mode noise immunity. Minimize the number of vias on the differential input and output traces to prevent impedance 10 discontinuities. Reduce reflections by maintaining the 50Ω characteristic impedance through connectors and across cables. Minimize skew by matching the electrical length of the traces. Output Termination Terminate LVDS outputs with a 100Ω resistor between the differential outputs at the receiver inputs. LVDS outputs require 100Ω termination for proper operation. Ensure that the output currents do not exceed the current limits specified in the Absolute Maximum Ratings. Observe the total thermal limits of the MAX9390/ MAX9391 under all operating conditions. Cables and Connectors Use matched differential impedance for transmission media. Use cables and connectors with matched differential impedance to minimize impedance discontinuities. Avoid the use of unbalanced cables. Balanced cables such as twisted pair offer superior signal quality and tend to generate less EMI due to canceling effects. Board Layout Use a four-layer printed circuit (PC) board providing separate signal, power, and ground planes for highspeed signaling applications. Bypass VCC to GND as close to the device as possible. Install termination resistors as close to receiver inputs as possible. Match the electrical length of the differential traces to minimize signal skew. 100Ω DIFFERENTIAL TRANSMISSION LINE MAX9390 MAX9391 OUT_ 100Ω OUT_ 10kΩ 10kΩ TERMINATION RESISTOR GND Figure 8. Pulldown Resistor Configuration for LVDS Outputs ______________________________________________________________________________________ Anything-to-LVDS Dual 2 x 2 Crosspoint Switches 3.0V TO 3.6V 0.1μF 0.01μF VCC Z0 = 50Ω OUTA0 INA0 Z0 = 50Ω 100Ω 100Ω Z0 = 50Ω MAX9390 MAX9391 INA0 OUTA0 Z0 = 50Ω OUTA1 Z0 = 50Ω INA1 INA1 INB0 LVDS RECEIVER MAX9173 INB0 OUTA1 Z0 = 50Ω OUTB0 Z0 = 50Ω OUTB0 Z0 = 50Ω OUTB1 Z0 = 50Ω OUTB1 Z0 = 50Ω INB1 INB1 ENA0 ENA1 ENB0 ENB1 LVCMOS/LVTTL LOGIC INPUTS ASEL0 ASEL1 BSEL0 BSEL1 GND GND GND GND ______________________________________________________________________________________ 11 MAX9390/MAX9391 Typical Operating Circuit Anything-to-LVDS Dual 2 x 2 Crosspoint Switches MAX9390/MAX9391 Functional Diagram Chip Information TRANSISTOR COUNT: 1565 PROCESS: BIPOLAR INA0 INA0 MAX9390 MAX9391 0 OUTA0 OUTA0 ENA0 1 ASEL0 INA1 INA1 1 OUTA1 OUTA1 ENA1 0 ASEL1 INB0 OUTB0 0 INB0 OUTB0 ENB0 1 BSEL0 INB1 OUTB1 OUTB1 ENB1 1 INB1 0 BSEL1 12 ______________________________________________________________________________________ Anything-to-LVDS Dual 2 x 2 Crosspoint Switches 32L TQFP, 5x5x01.0.EPS PACKAGE OUTLINE, 32L TQFP, 5x5x1.0mm 21-0110 B 1 2 ______________________________________________________________________________________ 13 MAX9390/MAX9391 Package Information (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information go to www.maxim-ic.com/packages.) MAX9390/MAX9391 Anything-to-LVDS Dual 2 x 2 Crosspoint Switches Package Information (continued) (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information go to www.maxim-ic.com/packages.) PACKAGE OUTLINE, 32L TQFP, 5x5x1.0mm 21-0110 B 2 2 Revision History Pages changed at Rev 2: 1–4, 6, 8, 10–14 Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. 14 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 © 2007 Maxim Integrated Products is a registered trademark of Maxim Integrated Products, Inc.