PI74ALVC16835 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 18-Bit Universal Bus Driver with 3-State Outputs Product Features Product Description PI74ALVC16835 is designed for low voltage operation, VCC = 2.3V to 3.6V Supports PC100 Registered DIMM Typical VOLP (Output Ground Bounce) < 0.8V at VCC = 3.3V, TA = 25°C Typical VOHV (Output VOH Undershoot) < 2.0V at VCC = 3.3V, TA = 25°C Industrial operation at 40°C to +85°C Packages available: 56-pin 240 mil wide plastic TSSOP (A) 56-pin 173 mil wide plastic TVSOP (K) 56-pin 300 mil wide plastic SSOP (V) Pericom Semiconductor’s PI74ALVC series of logic circuits are produced in the Company’s advanced 0.5 micron CMOS technology, achieving industry leading speed. The 18-bit PI74ALVC16835 universal bus driver is designed for 2.3V to 3.6V Vcc operation. Data flow from A to Y is controlled by Output Enable (OE). The device operates in the transparent mode when LE is HIGH. The A data is latched if CLK is held at a high or low logic level. If LE is LOW, the A-bus is stored in the latch/flip-flop on the low-to-high transition of CLK. When OE is HIGH, the outputs are in the high-impedance state. To ensure the high-impedance state during power up or power down, OE should be tied to Vcc through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. Logic Block Diagram OE CLK 27 30 28 LE A1 54 1D 3 C1 Y1 CLK TO 17 OTHER CHANNELS 1 PS8172A 07/30/98 PI74ALVC16835 18-BIT UNIVERSAL BUS DRIVER WITH 3-STATE OUTPUTS 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 Truth Table(1)† Product Pin Description Pin Name OE LE CLK A Y GND VCC Inputs Description Output Enable Input (Active LOW) Latch Enable Clock Input Data Input Data Output Ground Power Product Pin Configuration 56 55 3 4 5 54 53 56-PIN 52 A-56 51 K-56 50 V-56 49 A1 9 10 48 47 A5 11 12 13 46 45 44 GND Y11 16 43 42 41 A9 Y10 14 15 Y12 17 18 40 39 A12 19 20 21 38 37 36 A13 22 23 24 35 34 33 VCC 25 26 32 31 GND 27 28 30 29 CLK NC Y1 GND Y2 Y3 VCC Y4 Y5 Y6 GND Y7 Y8 Y9 GND Y13 Y14 Y15 VCC Y16 Y17 GND Y18 OE LE 6 7 8 LE CLK A Outputs Y H X X X Z L H X L L L H X H H L L ↑ L L L L ↑ H H L L H X Yo(2) L L L X Yo(3) Note: 1 H = High Signal Level L = Low Signal Level Z = High Impedance ↑ = Transition LOW-to-HIGH X = Irrelevant 2. Output level before the indicated steady-state input conditions were established, provided that CLK is high before LE goes low. 3. Output level before the indicated steady-state input conditions were established. GND 1 2 NC OE NC GND A2 A3 VCC A4 A6 A7 A8 A10 A11 GND A14 A15 A16 A17 A18 GND 2 PS8172A 07/30/98 PI74ALVC16835 18-BIT UNIVERSAL BUS DRIVER WITH 3-STATE OUTPUTS 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 Maximum Ratings (Above which the useful life may be impaired. For user guidelines, not tested.) Storage Temperature ............................................................ –65°C to +150°C Ambient Temperature with Power Applied ......................... –40°C to +85°C Input Voltage Range, VIN ................................................... –0.5V to VCC+0.5V Output Voltage Range, VOUT ............................................. –0.5V to VCC+0.5V DC Input Voltage ..................................................................... –0.5V to +5.0V DC Output Current ............................................................................. 100 mA Power Dissipation ................................................................................... 1.0W Note: Stresses greater than those listed under MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. Recommended Operating Conditions(1) Parame te rs De s cription VCC Supply Voltage VIH Input HIGH Voltage VIL Input LOW Voltage VIN Input Voltage 0 VCC VOUT Output Voltage 0 VCC IOH IOL TA High- level Output Current Low- level Output Current Te s t Conditions M in. 2.3 VCC = 2.3V to 2.7V 1.7 VCC = 2.7V to 3.6V 2.0 Typ. M ax. 3.6 VCC = 2.3V to 2.7V 0.7 VCC = 2.7V to 3.6V 0.8 VCC = 2.3V - 12 VCC = 2.7V - 12 VCC = 3.0V - 24 VCC = 2.3V 12 VCC = 2.7V 12 VCC = 3.0V 24 Operating Free- Air Temperature - 40 Units 85 V mA °C Note: 1. Unused control inputs must be held HIGH or LOW to prevent them from floating. 3 PS8172A 07/30/98 PI74ALVC16835 18-BIT UNIVERSAL BUS DRIVER WITH 3-STATE OUTPUTS 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 DC Electrical Characteristics (Over the Operating Range, TA = –40°C to +85°C, VCC = 3.3V ± 10%) Parame te rs VCC(1) Te s t Conditions IOH = - 100 mA IOH = - 6 MA VOH IOH = - 12 mA IOH = - 24 MA VOL IOL = 12 MA IOL = 24 mA Typ.(2) M ax. Units Min. to Max. VCC - 0.2 VIH = 1.7V 2.3V 2.0 VIH = 1.7V 2.3V 1.7 VIH = 2.0V 2.7V 2.2 VIH = 2.0V 3.0V 2.4 VIH = 2.0V 3.0V 2.0 IOL = 100 mA IOL = 6 mA M in. V Min. to Max. 0.2 VIL = 0.7V 2.3V 0.4 VIL = 0.7V 2.3V 0.7 VIL = 0.8V 2.7V 0.4 VIL = 0.8V 3.0V 0.55 II VI = VCC or GND 3.6V ±5 IOZ(3) VO = VCC or GND 3.6V ±5 3.6V 40 750 ICC VI = VCC or GND IO = 0 DICC One input at VCC - 0.6V, Other inputs at VCC or GND 3V to 3.6V CI Control Inputs VI = VCC or GND 3.3V 3.5 Data Input VO = VCC or GND 3.3V 6 CO Outputs VO = VCC or GND 3.3V 7 mA pF Notes: 1. For Max. or Min. conditions, use appropriate value specified under Electrical Characteristics for the applicable device type. 2. Typical values are at VCC = 3.3V, +25°C ambient and maximum loading. 3. For I/O ports, the IOZ includes the input leakage current. Timing Requirements over Operating Range Parame te rs De s cription fCLOCK tW Pulse Duration tSU Setup time tH Hold time Dt/Dv(1) VCC = 2.5 V ± 0.2V VCC = 2.7V VCC = 3.3V ± 0.3V M in. M ax. M in. M ax. M in. M ax. Clock frequency 0 150 0 150 0 150 LE high 3.3 3.3 3.3 CLK high or low 3.3 3.3 3.3 Data before CLK 2.2 2.1 1.7 Data before LE¯, CLK High 1.9 1.6 1.5 Data before LE¯, CLK Low 1.3 1.1 1 Data after CLK 0.6 0.6 0.7 Data after LE¯, CLK High or Low 1.4 1.7 1.4 Input Transition Rise or Fall 0 10 0 10 0 Units MHz ns 10 ns/V Note: 1. Unused control inputs must be held HIGH or LOW to prevent them from floating. 4 PS8172A 07/30/98 PI74ALVC16835 18-BIT UNIVERSAL BUS DRIVER WITH 3-STATE OUTPUTS 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 Switching Characteristics Over Operating Range(1) Parame te r From (Input) To (Output) VCC = 2.5V ± 0.2V M in.(2) fMAX M ax. 150 VCC = 2.7V M in.(2) M ax. VCC = 3.3 V ± 0.3V M in.(2) 150 Units M ax. 150 MHz tPD A Y 1 4.2 4.2 1 3.6 tPD LE Y 1.3 5 4.9 1.3 4.2 tPD CLK Y 1.4 5.5 5.2 1.4 4.5 tEN OE Y 1.4 5.5 5.6 1.1 4.6 tDIS OE Y 1 4.5 4.3 1.3 3.9 ns Notes: 1. See test circuit and wave forms. 2. Minimum limits are guaranteed but not tested on Propagation Delays. Switching Characteristics, from 0ºC to 65ºC, CL = 50pF Parame te rs From (Input) To (Output) tPD CLK Y VCC = 3.3V ± 0.15V M in. M ax. 1.7 4.5 Units ns Operating Characteristics, TA = 25°C Parame te rs CPD Power Dissipation Capacitance Outputs Enabled Outputs Disabled Te s t Conditions VCC = 2.5V ± 0.2V VCC = 3.3V ± 0.3V Typical Typical CL = 50pF, F = 10 MHz 26 31 12 14 Units pF Pericom Semiconductor Corporation 2380 Bering Drive • San Jose, CA 95131 • 1-800-435-2336 • Fax (408) 435-1100 • http://www.pericom.com 5 PS8172A 07/30/98