19-2860; Rev 0; 4/03 4. 9m m -QSOP 16 m x 6m High-Speed, Dual-Phase Gate Driver for Multiphase, Step-Down Converters Features ♦ 6A Peak Gate-Drive Current ♦ Up to 1.2MHz Operation ♦ Up to 6.5V Gate-Drive Voltage ♦ 0.5Ω/0.95Ω Low-Side Drivers ♦ Capable of 30A Output per Phase ♦ Adaptive Shoot-Through Protection ♦ User-Programmable Delay Time ♦ TTL and CMOS Input Compatible ♦ UVLO for Proper Sequencing ♦ Flexible 2- to 8-Phase Implementation with MAX8524 and MAX8525 ♦ Space-Saving (4.9mm ✕ 6mm) 16-Pin QSOP Package Applications Ordering Information Core Voltage Supplies for Pentium™ IV Microprocessors PART Servers and Workstations Desktop Computers MAX8523EEE Voltage Regulator Modules (VRMs) DC-to-DC Regulator Modules TEMP RANGE PIN-PACKAGE -40°C to +85°C 16 QSOP *Future product. Contact factory for availability. Switches, Routers, and Storage Typical Operating Circuit 3V TO 13.2V +4.5V TO +6.5V GATE DRIVE SUPPLY 1 2 BST1 VCC DH1 BST2 7 16 PHASE 1 OUTPUT 3 5 6 4 13 8 LX1 DH2 DL1 LX2 PGND1 DL2 PV1 PV2 DLY 15 PHASE 2 OUTPUT MAX8523 PGND2 PWM2 PWM1 14 12 11 10 9 PHASE 2 PWM INPUT PHASE 1 PWM INPUT Pentium is a trademark of Intel Corp. ________________________________________________________________ Maxim Integrated Products For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at 1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com. 1 MAX8523 General Description The MAX8523 dual-phase gate driver, along with the MAX8524*/MAX8525 multiphase controllers, provides flexible 2- to 8-phase CPU core-voltage supplies. The 0.5Ω/0.95Ω driver resistance allows up to 30A output current per phase. Each MOSFET driver in the MAX8523 is capable of driving 3000pF capacitive loads with only 15ns propagation delay and 11ns typical rise and fall times, allowing operations up to 1.2MHz per phase. Adaptive dead time controls low-side MOSFET turn-on, and user-programmable dead time controls high-side MOSFET turnon. This maximizes converter efficiency while allowing operation with a variety of MOSFETs and controller ICs. An undervoltage lockout (UVLO) circuit allows proper power-on sequencing. PWM_ signal inputs are both TTL and CMOS compatible. The MAX8523 is available in a space-saving 16-pin QSOP package, and specified for -40°C to +85°C operation. MAX8523 High-Speed, Dual-Phase Gate Driver for Multiphase, Step-Down Converters ABSOLUTE MAXIMUM RATINGS BST_ to PGND_ ......................................................-0.3V to +26V LX_ to PGND_............................................................-1V to +14V DH_ to PGND_..........................................-0.3V to (BST_ + 0.3V) DH_ to LX_................................................................-0.3V to +7V BST_ to LX_ ..............................................................-0.3V to +7V DL_ to PGND_.............................................-0.3V to (PV_ + 0.3V) PV_ to PGND_ ..........................................................-0.3V to +7V PGND2 to PGND1 .................................................-0.3V to +0.3V VCC to PGND1..........................................................-0.3V to +7V DLY to PGND1............................................-0.3V to (VCC + 0.3V) PWM_ to PGND1 ........................................-0.3V to (PV2 + 0.3V) VCC to PV1_..............................................................-7V to +0.3V DH_, DL_ Continuous Current .......................................±200mA Continuous Power Dissipation (TA = +70°C) 16-Pin QSOP (derate 8.3mW/°C above +70°C).............667mW Operating Temperature Range ...........................-40°C to +85°C Junction Temperature ......................................................+150°C Storage Temperature Range .............................-65°C to +150°C Lead Temperature (soldering, 10s) .................................+300°C Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ELECTRICAL CHARACTERISTICS (VVCC = VPV1 = VPV2 = VBST1 = VBST2 = VDLY = 5V, VPGND1 = VPGND2 = VLX1 = VLX2 = 0V; TA = 0°C to +85°C, unless otherwise noted. Typical values are at TA = +25°C.) PARAMETER CONDITIONS MIN TYP MAX UNITS 6.5 V UNDERVOLTAGE PROTECTION Supply Voltage Range UVLO IVCC IPV_ IBST_ IBST1 + IPV1 + IBST2 + IPV2 4.5 VCC rising 3.25 VCC falling 3.0 3.5 3.8 3.5 V DLY = VCC 50 100 µA Dynamic, RDLY = 50kΩ 0.5 1 mA PWM_ = GND 1 10 µA PWM_ = VCC 1.2 2 mA PWM_ = GND 0.1 10 µA PWM_ = VCC 1.2 2 mA 4 8 mA PWM_ = PGND1, VBST = 4.5V 0.65 1.2 PWM_ = VCC, VBST_ = 4.5V 0.8 1.35 PWM_ = PGND1, VPV_ = 4.5V 0.95 1.6 PWM_ = VCC, VPV = 4.5V 0.5 0.9 250kHz DRIVER SPECIFICATIONS DH_ Driver Resistance DL_ Driver Resistance Ω Ω DH_ Rise Time PWM_ = VCC, VBST = 5V, 3nF load 11 ns DH_ Fall Time PWM_ = PGND1, VBST = 5V, 3nF load 9.5 ns DL_ Rise Time PWM_ = VCC, VPV = 5V, 3nF load 8.5 ns DL_ Fall Time PWM_ = PGND1, VPV = 5V, 3nF load 6.5 ns DH_ Propagation Delay PWM_falling, VBST = 5V 15 ns DL_ Propagation Delay PWM_rising, VBST = 5V 8 ns PWM_ INPUT Input Current Input Voltage High VPWM_ = 0V or 6.5V 0.01 Input Voltage Low 2 1 2.5 _______________________________________________________________________________________ µA V 0.8 V High-Speed, Dual-Phase Gate Driver for Multiphase, Step-Down Converters (VVCC = VPV1 = VPV2 = VBST1 = VBST2 = 5V, VPGND1 = VPGND2 = VLX1 = VLX2 = 0V; TA = -40°C to +85°C, unless otherwise noted.) (Note 1) PARAMETER CONDITIONS MIN TYP MAX UNITS V UNDERVOLTAGE PROTECTION Supply Voltage Range UVLO 4.5 6.5 VCC rising 3.25 3.8 VCC falling 3.0 3.5 DLY = VCC IVCC IPV_ IBST_ IBST1 + IPV1 + IBST2 + IPV2 V 100 µA Dynamic, RDLY = 50kΩ 1 mA PWM_ = GND 10 µA PWM_ = VCC 2 mA PWM_ = GND 10 µA PWM_ = VCC 2 mA 250kHz 8 mA DRIVER SPECIFICATIONS DH_ Driver Resistance DL_ Driver Resistance PWM_ = PGND1, VBST_ = 4.5V 1.2 PWM_ = VCC, VBST_ = 4.5V 1.35 PWM_ = PGND1, VPV_ = 4.5V 1.6 PWM_ = VCC, VPV_ = 4.5V 0.9 Ω Ω PWM_ INPUT Input Current VPWM_ = 0V or 6.5V Input Voltage High 1 µA 0.8 V 2.5 V Input Voltage Low Note 1: Specifications at -40°C guaranteed by design. Typical Operating Characteristics (PV1 = PV2 = VCC = VDLY = 5V, 3nF capacitive load, TA = +25°C, unless otherwise noted.) CLS = 3nF, CHS = 3nF MAX8523toc02 700 800 MAX8523toc01 800 700 FREQ = 1.2MHz 600 POWER (mW) POWER (mW) FREQ = 600kHz CLS = 6nF, CHS = 3nF 400 300 200 500 400 FREQ = 300kHz 300 CLS = 3nF, CHS = 1.5nF VCC = 6.5V 0 0 0.2 0.4 0.6 0.8 FREQUENCY (MHz) 1.0 1.2 10 DL RISE 8 6 DL FALL 2 100 VCC = 6.5V 0 12 4 200 100 14 RISE/FALL TIME (ns) 600 500 DL RISE AND FALL vs. CAPACITIVE LOAD POWER DISSIPATION vs. CAPACITIVE LOAD (BOTH DRIVERS SWITCHING) MAX8523toc03 POWER DISSIPATION vs. SWITCHING FREQUENCY (BOTH DRIVERS SWITCHING) 0 1 CDH = CDL 0 2 3 4 CAPACITANCE (nF) 5 6 0 1 2 3 4 5 6 CAPACITANCE (nF) _______________________________________________________________________________________ 3 MAX8523 ELECTRICAL CHARACTERISTICS Typical Operating Characteristics (continued) (PV1 = PV2 = VCC = VDLY = 5V, 3nF capacitive load, TA = +25°C, unless otherwise noted.) RISE/FALL TIME (ns) 12 10 8 DH FALL 6 DH FALL DH RISE 10 8 VCC = 6.5V 30 VCC = 5V 20 6 DL FALL DL RISE 4 4 40 12 MAX8523toc06 14 DH RISE ICC (µA) 16 50 MAX8523toc05 16 MAX8523toc04 18 14 VCC SUPPLY CURRENT vs. SWITCHING FREQUENCY DH AND DL RISE AND FALL TIMES vs. TEMPERATURE DH RISE AND FALL vs. CAPACITIVE LOAD RISE/FALL TIME (ns) 10 2 2 CDH = CDL 0 0 1 CDL = CDH = 3.0nF 0 2 3 4 5 -40 -20 6 CAPACITANCE (nF) 0 20 40 60 80 0 100 120 PWM_RISE → DL_FALL VDLY = VCC 0 20 40 60 80 100 120 240 220 200 180 160 140 120 100 80 60 40 20 0 0 20 TEMPERATURE (°C) 40 60 80 100 120 RDLY (kΩ) TYPICAL SWITCHING WAVEFORMS MAX8523 toc09 PWM SIGNAL DH_ GATE VOLTAGE 2XIRF7811W HIGH-SIDE MOSFETS LX SWITCHING VOLTAGE 2XIRF7822 LOW-SIDE MOSFETS 5V/div DL_ GATE VOLTAGE 100 ns 4 0.8 MAX8523 toc08 MAX8523toc07 PWM_FALL → DH_FALL -40 -20 0.6 FREQUENCY (MHz) DELAY (ns) 20 0.4 PROGRAMMABLE DELAY vs. RDLY DL_FALL→ DH_RISE 0 0.2 TEMPERATURE (°C) 30 10 VDLY = VCC 0 PROPAGATION DELAY vs. TEMPERATURE RISE (ns) MAX8523 High-Speed, Dual-Phase Gate Driver for Multiphase, Step-Down Converters _______________________________________________________________________________________ 140 1.0 1.2 High-Speed, Dual-Phase Gate Driver for Multiphase, Step-Down Converters PIN NAME FUNCTION Boost Flying Capacitor Connection, Phase 1. Connect a 0.22µF or higher ceramic capacitor between BST1 and LX1. 1 BST1 2 DH1 High-Side Gate-Driver Output, Phase 1 3 LX1 Switching Node (Inductor) Connection, Phase 1 4 PV1 Gate-Drive Supply for DL1. Bypass to PGND1 with a 2.2µF or higher capacitor. Connect PV1 and PV2 together. 5 DL1 Low-Side Gate-Driver Output, Phase 1 6 PGND1 7 VCC Supply Voltage. Bypass VCC to PGND1 with a 0.1µF (min) capacitor. 8 DLY Connect a resistor from DLY to PGND1 to set dead time between DL_ falling and DH_ rising. Connect to VCC for default 20ns delay. Power Ground for DL1. Connect PGND1 and PGND2 together. Internal analog ground is connected to PGND1. 9 PWM1 Phase 1 PWM Logic Input. DH1 is high when PWM1 is high; DL1 is high when PWM1 is low. 10 PWM2 Phase 2 PWM Logic Input. DH2 is high when PWM2 is high; DL2 is high when PWM2 is low. 11 PGND2 Power Ground for DL2 12 DL2 Low-Side Gate-Driver Output, Phase 2 PV2 Gate-Drive Supply for DL2. Bypass to PGND2 with a 2.2µF or higher capacitor. Connect PV1 and PV2 together. 14 LX2 Switching Node (Inductor) Connection, Phase 2 15 DH2 High-Side Gate-Driver Output, Phase 2 16 BST2 Boost Flying Capacitor Connection, Phase 2. Connect a 0.22µF or higher ceramic capacitor between BST2 and LX2. 13 Detailed Description Principle of Operation The MAX8523 dual-phase gate driver, along with the MAX8524/MAX8525 multiphase controllers, provides flexible 2- to 8-phase CPU core-voltage supplies. The 0.5Ω/0.95Ω driver resistance allows up to 30A output current per phase. Each MOSFET driver in the MAX8523 is capable of driving 3000pF capacitive loads with only 15ns propagation delay and 11ns typical rise and fall times, allowing operations up to 1.2MHz per phase. Adaptive dead time controls low-side MOSFET turn-on, and user-programmable dead time controls high-side MOSFET turn-on. This maximizes converter efficiency, while allowing operation with a variety of MOSFETs and PWM controller ICs. A UVLO circuit allows proper power-on sequencing. PWM_ signal inputs are both TTL and CMOS compatible. MOSFET Gate Drivers (DH_, DL_) The high-side drivers (DH_) have typical 0.8Ω sourcing resistance and 0.65Ω sinking resistance, resulting in 6A peak sourcing current and 7A peak sinking current with 5V supply voltage. The low-side drivers (DL_) have typical 0.95Ω sourcing resistance and 0.5Ω sinking resistance, yielding 5A peak sourcing current and 10A peak sinking current. This reduces switching losses, making the MAX8523 ideal for both high-frequency and highoutput-current applications. Shoot-Through Protection Adaptive shoot-through protection is incorporated for the switching transition after the high-side MOSFET is turned off and before the low-side MOSFET is turned on. The low-side driver is turned on only when the LX voltage falls below 1.8V. Furthermore, the delay time between the low-side MOSFET turn-off and high-side MOSFET turn-on can be adjusted by selecting the value of R2 (see the RDLY Selection section). _______________________________________________________________________________________ 5 MAX8523 Pin Description MAX8523 High-Speed, Dual-Phase Gate Driver for Multiphase, Step-Down Converters BST1 MAX8523 PWM1 DELAY LOGIC DHON DH1 DHLO LX1 PV1 VCC DLON DL1 DLLO PGND1 UVLO LX1 LOW DETECT DLY DELAY PROGRAM PHASE1 PHASE2 BST2 PGND1 DHON DH2 DHLO LX2 PV2 DLON DL2 DLLO PGND2 LX2 LOW DETECT PWM2 Figure 1. MAX8523 Functional Diagram Undervoltage Lockout (UVLO) Boost Capacitor Selection When VCC is below the UVLO threshold (3.5V typ), DH_ and DL_ are held low. Once VCC is above the UVLO threshold and PWM_ is low, DL_ is kept high and DH_ is kept low. This prevents output from rising before a valid PWM signal is applied. The MAX8523 uses a bootstrap circuit to generate the floating supply voltages for the high-side drivers (DH_). The selected high-side MOSFET determines appropriate boost capacitance values, according to the following equation: QGATE CBST = ∆VBST VCC Decoupling VCC provides the supply voltage for the internal logical circuit. To avoid malfunctions due to the switching noise on the DH_, DL_, and LX_ pins, RC decoupling is recommended for the VCC pin. Place a 10Ω resistor (R1) from the supply voltage to the VCC pin and a 0.1µF (C7) capacitor from the VCC pin to PGND1. 6 where QGATE is the total gate charge of the high-side MOSFET and ∆VBST is the voltage variation allowed on the high-side MOSFET drive. Choose ∆VBST = 0.1V to 0.2V when determining the CBST. Low-ESR ceramic capacitors should be used for C3 and C4. _______________________________________________________________________________________ High-Speed, Dual-Phase Gate Driver for Multiphase, Step-Down Converters MAX8523 3V TO 13.5V +4.5V - 6.5V D1 C1 R1 1 2 Q1 L1 1.6V/20A VCC DH1 BST2 LX1 DH2 7 C7 16 C3 3 C5 BST1 5 Q2 6 4 C2 13 8 Q3 L2 C4 MAX8523 DL1 LX2 PGND1 DL2 PV1 PGND2 PV2 PWM2 DLY PWM1 R2 15 1.6V/20A 14 12 Q4 C6 11 10 9 PWM2 CONTROL SIGNAL PWM1 CONTROL SIGNAL Figure 2. Typical Application Circuit PV_ Decoupling PV_ provides the supply voltages for the low-side drivers (DL_). The decoupling capacitors at PV_ also charge the BST capacitors during the time period when DL_ is high. Therefore, the decoupling capacitor C2 for PV_ should be large enough to minimize the ripple voltage during switching transitions. C2 should be chosen according to the following equation: C2 = 10 × CBST RDLY Selection Connect DLY to VCC for the default delay time, typically 20ns. Add a delay resistor, RDLY, between DLY and PGND1 to increase the delay between the low-side MOSFET drive turn-off and the high-side MOSFET turnon. See the Typical Operating Characteristics to select RDLY. Avoiding dV/dt-Induced Low-Side MOSFET Turn-On At high input voltages, fast turn-on of the high-side MOSFET could momentarily turn on the low-side MOSFET due to the high dV/dt appearing at the drain of the low-side MOSFET. The high dV/dt causes a current flow through the Miller capacitance (CRSS) and the input capacitance (CISS) of the low-side MOSFET. Improper selection of the low-side MOSFET that has a high ratio of CRSS/CISS makes the problem more severe. To avoid the problem, give special attention to the ratio of C RSS /C ISS when selecting the low-side MOSFET. Adding a resistor between the BST and the CBST can slow the high-side MOSFET turn-on. Similarly, adding a capacitor from the gate to the source of the high-side MOSFET has the same effect. However, both methods are at the expense of increasing the switching losses. _______________________________________________________________________________________ 7 MAX8523 High-Speed, Dual-Phase Gate Driver for Multiphase, Step-Down Converters Table 1. Typical Component Values (250kHz Operation, 20A/Phase Output Current) COMPONENT DESCRIPTION PART NUMBER C1 5 x 330µF/25V, 23mΩ (max) ESR input filtering capacitor Sanyo 25MV330WX C2 2.2µF/10V ceramic capacitor Taiyo Yuden JMK107BJ225MA C3, C4 0.22µF/10V ceramic capacitors Taiyo Yuden GMK212BJ224MG C5, C6 3 x 820µF/4V, 12mΩ (max) ESR electrolytic capacitors Sanyo 4SP820M C7 0.1µF/10V ceramic capacitor Taiyo Yuden UMK212BJ104MG D1 Dual Schottky diode Central Semiconductor CMPSH-3A L1, L2 0.66µH/29A, 2.1mΩ (typ), 2.5mΩ (max) RDC inductors Sumida CDEP134-H Q1, Q2 High-side MOSFETs Siliconix SUB70N03-09BP Q3, Q4 Low-side MOSFETs Fairchild FDB7045L R1 10Ω ±5% resistor (0603) VCC decoupling resistor R2 2kΩ to 125kΩ ±1% dead-time delay programming resistor (0603) — Table 2. Typical Component Values (800kHz Operation, 20A/Phase Output Current) COMPONENT PART NUMBER C1 5 x 10µF/25V, 10mΩ (max) ESR input filtering capacitor (1812) Taiyo Yuden TMK432BJ106MM C2 2.2µF/10V ceramic capacitor Taiyo Yuden JMK107BJ225MA C3, C4 0.22µF/10V ceramic capacitors Taiyo Yuden GMK212BJ224MG C5, C6 3 x 680µF/2V, 5mΩ (max) ESR SP capacitors Sanyo 2RSTPD680M5 C7 0.1µF/10V ceramic capacitor Taiyo Yuden UMK212BJ104MG D1 Dual Schottky diode Central Semiconductor CMPSH-3A L1, L2 0.23µH/30A, 1.1mΩ (max) RDC inductors TDK SPM12535T-R23M300 Q1, Q2 High-side MOSFETs IR IRF7801 Q3, Q4 8 DESCRIPTION Low-side MOSFETs IR 2XIRF7822 R1 10Ω ±5% resistor (0603) VCC decoupling resistor R2 2kΩ to 125kΩ ±1% dead-time delay programming resistor (0603) — _______________________________________________________________________________________ High-Speed, Dual-Phase Gate Driver for Multiphase, Step-Down Converters Power Dissipation Power dissipation in the IC package comes mainly from switching the MOSFETs. Therefore, it is a function of both switching frequency and the total gate charge of the selected MOSFETs. The total power dissipation when both drivers are switching is given by: P IC = 2 × fS × (N × QG _ TOTAL _ HS × RHS + M × QG _ TOTAL _ LS × RHS + (RG _ HS / N) RLS ) × VPV _ + VVCC × IVCC RLS + (RG _ LS / M) where fS is the switching frequency, QG_TOTAL_HS is the total gate charge of the selected high-side MOSFET, QG_TOTAL_LS is the total gate charge of the selected low-side MOSFET, N is the total number of the high-side MOSFETs in parallel, M is the total number of the low-side MOSFETs in parallel, VPV_ is the voltage at the PV_ pin, RHS is the on-resistance of the high-side driver, RLS is the on-resistance of the low-side driver, RG_HS is the gate resistance of the selected high-side MOSFET, RG_LS is the gate resistance of the selected low-side MOSFETs, VVCC is the voltage at the VCC pin, and IVCC is the supply current at the VCC pin. Pin Configuration PC Board Layout Considerations The MAX8523 MOSFET driver sources and sinks large currents to drive MOSFETs at high switching speeds. The high di/dt can cause unacceptable ringing if the trace lengths and impedances are not well controlled. The following PC board layout guidelines are recommended when designing with the MAX8523: 1) Place all decoupling capacitors (C2, C3, C4, C7) as close to their respective pins as possible. 2) Minimize the high-current loops from the input capacitor, upper-switching MOSFET, and low-side MOSFET back to the input capacitor negative terminal. 3) Provide enough copper area at and around the switching MOSFETs and inductors to aid in thermal dissipation. 4) Connect the PGND1 and PGND2 pins of the MAX8523 as close as possible to the source of the low-side MOSFETs. 5) Keep LX1 and LX2 away from sensitive analog components and nodes. Place the IC and analog components on the opposite side of the board from the power-switching node if possible. Chip Information TRANSISTOR COUNT: 1187 PROCESS: BiCMOS TOP VIEW BST1 1 16 BST2 DH1 2 15 DH2 LX1 3 14 LX2 PV1 4 MAX8523 13 PV2 12 DL2 DL1 5 PGND1 6 11 PGND2 VCC 7 10 PWM2 DLY 8 9 PWM1 QSOP _______________________________________________________________________________________ 9 MAX8523 Applications Information Package Information (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information, go to www.maxim-ic.com/packages.) QSOP.EPS MAX8523 High-Speed, Dual-Phase Gate Driver for Multiphase, Step-Down Converters Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. 10 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 © 2003 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products.