MAXIM MAX9480_05

19-2539; Rev 2; 9/05
Low-Power, Low-Distortion, Central-Office
ADSL Drivers and Integrated Drivers/Receivers
Features
The MAX9480/MAX9481/MAX9482 low-power, low-distortion, class-G, high-current asymmetric digital subscriber line (ADSL) drivers offer Rail-to-Rail® output and
are ideal for ADSL in central-office applications.
Operating from ±5V and ±2.5V supplies, the drivers
incorporate two high-speed current-feedback preamplifiers driving two fixed-gain class-G buffers. The buffers
can deliver 20.4dBm average line power with a signal
crest factor of 5.3, and are designed to be directly DC or
AC bridged across a 1:2.5 transformer.
The MAX9480/MAX9481/MAX9482 employ an active line
termination scheme for incoming signals that eliminates
the need for back-match resistors, reducing line-card
power consumption at full rate to less than half of that
required by conventional class-AB line-driver circuits.
♦ Dissipate Only 655mW While Driving 20.4dBm
ADSL Full-Rate DMT-Modulated Signal
♦ Operate with ±5.0V and ±2.5V Power Supplies
♦ Complete ADSL Central-Office Line Interface
(MAX9480/MAX9482)
Two Preamplifiers plus Class-G Rail-to-Rail
Buffers
Active Line Termination plus Integrated Hybrid
(MAX9480)
Low-Noise Uncommitted Receive Amplifiers
(MAX9482)
Fixed-Gain Receive Amplifiers (MAX9480)
Low-Output-Impedance Shutdown Mode
♦ Preamplifiers, Buffers, and Active Line
Termination Functions (MAX9481)
♦ High-Output-Drive Capability
15VP-P Differential Output Voltage Swing at
RL = 16Ω
500mA Output-Drive
♦ Low Distortion: -71dBc Highest Harmonic at 1MHz
and 14VP-P
♦ High Speed: 250V/µs Slew Rate, 80MHz -3dB
Bandwidth (G = -3)
♦ Thermal Shutdown
♦ Exposed Pads Improve Thermal Performance
The MAX9480 includes a hybrid network and two lownoise, fixed-gain-of-4.6V/V receive amplifiers. The part is
designed to recover the receive signal to the same level
as that of a conventional line interface circuit that incorporates a 1:2 transformer and standard back-matched
hybrid, without degrading signal-to-noise ratio (SNR) or
line-impedance sensitivity. The MAX9481 provides only
the preamplifiers and buffers without the hybrid or
receivers. The MAX9482 provides preamplifiers, buffers,
and uncommitted receive amplifiers. All devices have a
low-output-impedance shutdown function for saving
power when not transmitting.
At full-rate 20.4dBm discrete multitone data transmission
(DMT), the total dynamic power dissipation is only
680mW (MAX9480/MAX9482) or 655mW (MAX9481).
The MAX9480/MAX9481 are available in a 20-pin TSSOP
package and the MAX9482 is available in 28-pin TSSOP
and 32-pin QFN packages. All devices operate over the
extended -40°C to +85°C temperature range.
Applications
Ordering Information
PART
TEMP RANGE
PIN-PACKAGE
PKG
CODE
MAX9480EUP
-40°C to +85°C
20 TSSOP-EP**
U20E-4
MAX9481EUP
-40°C to +85°C
20 TSSOP-EP
U20E-4
MAX9482EUI
-40°C to +85°C
28 TSSOP-EP
U28E-4
MAX9482EGJ*
-40°C to +85°C
32 QFN
G3277-2
*Future product—contact factory for availability.
**EP = Exposed pad.
Pin Configurations
Full-Rate ADSL
HDSL
TOP VIEW
Central Office
DSLAM
POUT1 1
20 VLM
IN1- 2
19 VLP
IN1+ 3
18 VCC
17 OUT1
RXP 4
DGND 5
MAX9480
SHDN 6
Typical Operating Circuits appear at end of data sheet.
Rail-to-Rail is a registered trademark of Nippon Motorola, Ltd.
16 VEE
15 VEE
RXM 7
14 OUT2
IN2+ 8
13 VCC
IN2- 9
12 VLP
POUT2 10
11 VLM
TSSOP
Pin Configurations continued at end of data sheet.
________________________________________________________________ Maxim Integrated Products
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
1
MAX9480/MAX9481/MAX9482
General Description
MAX9480/MAX9481/MAX9482
Low-Power, Low-Distortion, Central-Office
ADSL Drivers and Integrated Drivers/Receivers
ABSOLUTE MAXIMUM RATINGS
POUT1/POUT2 Output Current .........................................100mA
RXP/RXM Output Short-Circuit Duration to
VCC/VEE/VLP/VLM ................................................................10s
RXP/RXM Output Current..................................................100mA
Continuous Power Dissipation (TA = +70°C)
20-Pin TSSOP with Pad Connected to VEE
(derate 21.7mW/°C above +70°C) ..............................1739mW
20-Pin TSSOP with Floating Pad
(derate 11.0mW/°C above +70°C) ................................879mW
28-Pin TSSOP with Pad Connected to VEE
(derate 23.8mW/°C above +70°C) ..............................1905mW
28-Pin TSSOP with Floating Pad
(derate 12.8mW/°C above +70°C) ..............................1026mW
32-Pin QFN (derate 23.3mW/°C above +70°C) .........1860mW*
Operating Temperature Range
(TMIN, TMAX) .....................................................-40°C to +85°C
Junction Temperature ......................................................+150°C
Storage Temperature Range .............................-65°C to +150°C
Lead Temperature (soldering, 10s) .................................+300°C
VCC to VEE ...........................................................................+12V
VLP to VLM ............................................................................+12V
VCC or VLP to DGND ................................................-0.3V to +6V
VCC to VLP ................................................................-0.3V to +6V
VEE or VLM to DGND ................................................-6V to +0.3V
VEE to VLM ................................................................-6V to +0.3V
Current into VLP or VLM ..................................................±250mA
IN1+, IN1-, IN2+, IN2-......................(VCC + 0.3V) to (VEE - 0.3V)
SHDN ...............................................(VCC + 0.3V) to (VEE - 0.3V)
BOUT1/BOUT2 Output Short-Circuit Duration to
VCC/VEE/VLP/VLM ....................................................Momentary
BOUT1/BOUT2 Output Current...........................................20mA
OUT1/OUT2 Output Short-Circuit Duration to
VCC/VEE/VLP/VLM ....................................................Momentary
OUT1/OUT2 Output Current ....................................................1A
OUT1 to OUT2 Short-Circuit Duration ........................Continuous
POUT1/POUT2 Output Short-Circuit Duration to
VCC/VEE/VLP/VLM ................................................................10s
*Refer to Application Note HFAN-08-1.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(VCC = +5V, VEE = -5V, VLP = +2.5V, VLM = -2.5V, DGND = 0, RL = 16Ω is connected from OUT1 to OUT2, SHDN = 0, TA = TMIN to
TMAX, unless otherwise noted. Typical values specified at TA = +25°C. Preamp configured for AV = +1 with 1kΩ from POUT_ to IN_-.)
(Note 1)
PARAMETER
Dynamic Power Dissipation
Dynamic Power Consumption
Supply Voltage Range
SYMBOL
PDISS
PCONS
CONDITIONS
VOUT(DIFF) = 1.327VRMS,
crest factor = 5.3
VOUT(DIFF) = 1.327VRMS,
crest factor = 5.3
MAX9480/
MAX9482
680
MAX9481
655
MAX9480/
MAX9482
790
MAX9481
765
MAX
mW
4.75
5.00
5.25
VEE
(Note 2)
-4.75
-5.00
-5.25
VLP
(Note 2)
2.25
2.50
2.75
VLM
(Note 2)
-2.25
-2.50
-2.75
VCC, VEE
21.5
35.0
VLP, VLM
22.0
40.0
VCC, VEE
20.0
34.0
VLP, VLM
21.0
39.0
VCC, VEE
21.5
35.0
VLP, VLM
22.0
40.0
ICC, IEE,
ILP, ILM
MAX9481, RL = ∞
_______________________________________________________________________________________
UNITS
mW
(Note 2)
MAX9482, RL = ∞
2
TYP
VCC
MAX9480, RL = ∞
Quiescent Supply Current
(Including Preamps)
MIN
V
mA
Low-Power, Low-Distortion, Central-Office
ADSL Drivers and Integrated Drivers/Receivers
(VCC = +5V, VEE = -5V, VLP = +2.5V, VLM = -2.5V, DGND = 0, RL = 16Ω is connected from OUT1 to OUT2, SHDN = 0, TA = TMIN to
TMAX, unless otherwise noted. Typical values specified at TA = +25°C. Preamp configured for AV = +1 with 1kΩ from POUT_ to IN_-.)
(Note 1)
PARAMETER
SYMBOL
CONDITIONS
MAX9480, RL = ∞
Shutdown Supply Current
ISD
MAX9481, RL = ∞
MAX9482, RL = ∞
TYP
MAX
VCC, VEE
MIN
2.1
6.0
VLP, VLM
1.5
5.0
VCC, VEE
0.6
1.2
VLP, VLM
0.05
0.1
VCC, VEE
2.1
6.0
VLP, VLM
1.5
5.0
VCC - VEE = ±4.75V to ±5.25V
50
76
VLP - VLM = ±2.25V to ±2.75V
50
81
UNITS
mA
Transmit Path Power-Supply
Rejection Ratio (Single Ended)
PSRR
Common-Mode Rejection
CMR
-200mV ≤ VCM ≤ +200mV
46
dB
Hybrid Rejection Ratio
(MAX9480 Only)
HRR
VOUT(DIFF) = ±1.2V
35
dB
f = 100kHz
-69
dB
Driver-to-Receiver Crosstalk
(MAX9482 Only)
XTALK
SHDN Logic Low
VIL
SHDN Logic High
VIH
dB
0.8
2.0
V
V
±5.0
SHDN Input Current
IIH, IIL
Shutdown Delay Time
tSHDN
4.8
µs
Shutdown Enable Time
tENABLE
4
µs
-66
dB
Intermodulation Distortion
IMD
SHDN = 0 or SHDN = VCC
f1 = 1MHz, f2 = 900kHz, Typical Operating
Circuit, VOUT(DIFF) = 2.0VP-P
µA
DRIVER
Maximum RMS Output Power
(Typical Operating Circuit)
(Note 3)
Closed-Loop Gain
DMT modulation (crest factor, Cr = 5.33)
21.4
CAP modulation (crest factor, Cr = 4.00)
24.3
VOUT(DIFF) = 1.2VP-P
-2.7
POUT
G
dBmW
-3
-3.3
V/V
Second Harmonic Distortion
f = 1MHz, VOUT(DIFF) = 14VP-P,
Typical Operating Circuit (Note 4)
-71
dB
Third Harmonic Distortion
f = 1MHz, VOUT(DIFF) = 14VP-P, Typical
Operating Circuit (Note 4)
-74
dB
15.0
VP-P
Differential Output Voltage Swing
OUT_ Voltage Swing
(per Amplifier) (Note 4)
VOUT(DIFF) Typical Operating Circuit (Note 4)
RL = 100Ω
VOH, VOL
RL = 16Ω
BOUT_ Voltage Swing
(per Amplifier) (Note 4)
Peak Output Current
Differential Output Offset Voltage
VBOH,
VBOL
IOUT
VOS(DIFF)
IN1+ = IN2+ = 0
VCC - VOH
0.5
|VEE - VOL|
0.5
VCC - VOH
1.27
|VEE - VOL|
1.21
VCC - VBOH
0.45
|VEE - VBOL|
0.42
V
V
500
mA
±5
mV
_______________________________________________________________________________________
3
MAX9480/MAX9481/MAX9482
ELECTRICAL CHARACTERISTICS (continued)
MAX9480/MAX9481/MAX9482
Low-Power, Low-Distortion, Central-Office
ADSL Drivers and Integrated Drivers/Receivers
ELECTRICAL CHARACTERISTICS (continued)
(VCC = +5V, VEE = -5V, VLP = +2.5V, VLM = -2.5V, DGND = 0, RL = 16Ω is connected from OUT1 to OUT2, SHDN = 0, TA = TMIN to
TMAX, unless otherwise noted. Typical values specified at TA = +25°C. Preamp configured for AV = +1 with 1kΩ from POUT_ to IN_-.)
(Note 1)
PARAMETER
SYMBOL
Differential Output Offset-Voltage
Drift
VOS(DRIFT)
Output Resistance (per Amplifier)
ROUT
-3dB Bandwidth
BW
Slew Rate
SR
Output Noise PSD
PN
Capacitive Load Stability
CONDITIONS
MIN
TYP
MAX
±12
-200mV ≤ VOUT ≤ +200mV
6
SHDN = VCC
8
UNITS
µV/°C
10
Ω
8
80
MHz
250
V/µs
f = 100kHz to 1.1MHz, referred to 100Ω line
-127
dBm/Hz
No sustained oscillations
1000
pF
300
kΩ
VOUT(DIFF) = 14VP-P step
PREAMPS AND RECEIVERS (Note 5)
Open-Loop Transimpedance
Power-Supply Rejection Ratio
ZOL
PSRR
-2V ≤ POUT ≤ +2V
VCC - VEE = ±4.75V to ±5.25V
50
87
VLP - VLM = ±2.25V to ±2.75V
50
100
dB
Input Offset Voltage
VOS
±2
±10
mV
IN1+, IN2+, RXIN1+, RXIN2+
Bias Current
IB+
±1
±20
µA
IN1+, IN2+, RXIN1+, RXIN2+
Bias Current Matching
IOS+
±0.7
IN1-, IN2-, RXIN1-, RXIN2Bias Current
IB-
±2.6
IN1-, IN2-, RXIN1-, RXIN2Bias Current Matching
IOS-
±1.2
µA
Input Resistance
RIN
IN1+, IN2+, RXIN1+, RXIN2+
1.1
MΩ
IN1-, IN2-, RXIN1-, RXIN2-
200
Ω
Input Capacitance
CIN
2
pF
IN1+, IN2+, IN1-, IN2-, RXIN1+, RXIN2+,
RXIN1-, RXIN2-
µA
±20
µA
Note 1: All devices are 100% production tested at TA = +25°C. Specifications over temperature limits are guaranteed by design.
Note 2: Guaranteed by the PSRR test.
Note 3: Implied by worst-case output voltage swing (VOUT(DIFF)), crest factor (Cr), and load impedance (RL):
 250 × V2 OUT(DIFF) 
PDRIVER = 10 log10 
 dBmW


Cr 2 × RL


Note 4: Device may exceed absolute maximum ratings for power dissipation if unit is subjected to full-scale sinusoids for long
periods. See the Applications Information section.
Note 5: Receiver specifications guaranteed for MAX9482 only.
4
_______________________________________________________________________________________
Low-Power, Low-Distortion, Central-Office
ADSL Drivers and Integrated Drivers/Receivers
SUPPLY CURRENT vs. TEMPERATURE
IAVG
200
fINPUT = 100kHz
MAX9481
2.5V SUPPLY
22
5V SUPPLY
18
14
100
5
6
7
8
-15
10
35
85
60
80
VOUTP-P = 2.0V
-180
20
-200
0
-220
OVERALL GAIN = -3V/V
PREAMP GAIN = +1V/V
-240
-260
-40
HARMONIC DISTORTION (dBc)
-160
40
-20
0.1
1
-300
100
10
-80
2ND
3RD HARMONIC
-100
0.01
0.1
10
1
DRIVER HARMONIC DISTORTION
vs. OUTPUT VOLTAGE
RECEIVER AMPLIFIER
FREQUENCY RESPONSE
0
f = 1MHz
-20
MAX9480 toc07
30
90
B
10
2ND
3RD HARMONIC
2ND HARMONIC
-60
45
C
0
0
-10
B
A
-70
-20
SUPPLY CROSSOVER REGION
-100
2
4
6
8
10
12
VOUT (DIFF) (VP-P)
14
16
18
-45
C
-90
= GAIN
= PHASE
-30
-90
135
A
20
-30
-80
85
2ND HARMONIC
FREQUENCY (MHz)
-50
60
-60
FREQUENCY (MHz)
-40
35
-40
-280
= GAIN
= PHASE
-80
0.01
0
-140
OVERALL GAIN = -9V/V
PREAMP GAIN = +3V/V
-60
10
DRIVER HARMONIC DISTORTION
vs. FREQUENCY
MAX9480 toc04
-10
-15
TEMPERATURE (°C)
TRANSMIT PATH
FREQUENCY RESPONSE
-20
-40
TEMPERATURE (°C)
VOUTP-P (V)
60
5V SUPPLY
0
-40
10
9
1.2
MAX9480 toc05
4
GAIN (dB)
3
PHASE (DEGREES)
2
MAX9480 toc06
1
GAIN (dB)
0
2.5V SUPPLY
1.8
0.6
10
0
2.4
-40
0.01
0.1
PHASE (DEGREES)
IAVG
300
MAX9480 toc02
26
fINPUT = 1MHz
SHUTDOWN CURRENT vs. TEMPERATURE
3.0
SHUTDOWN CURRENT (mA)
400
MAX9481
SUPPLY CURRENT (mA)
IDC
INPUT = DC
HARMONIC DISTORTION (dBc)
SUPPLY CURRENT (mA)
500
MAX9480 toc01
= ±5V SUPPLY
= ±2.5V SUPPLY
30
MAX9480 toc03
SUPPLY CURRENT vs. OUTPUT VOLTAGE
600
1
10
100
-135
1000
FREQUENCY (MHz)
C: GAIN = 1V/V
A: GAIN = 10V/V
B: GAIN = 5V/V
_______________________________________________________________________________________
5
MAX9480/MAX9481/MAX9482
Typical Operating Characteristics
(VCC = +5V, VEE = -5V, VLP = +2.5V, VLM = -2.5V, DGND = 0, RXIN1+ = RXIN2+ = 0, IN1+ = IN2+ = 0, RL = 16Ω is connected from
OUT1 to OUT2, SHDN = 0, TA = +25°C, unless otherwise noted. Preamp configured for AV = +1 with 1kΩ from RXOUT_- to RXIN_-.
Receiver configured for AV = +1 with 1kΩ from POUT_ to IN_-.)
Typical Operating Characteristics (continued)
(VCC = +5V, VEE = -5V, VLP = +2.5V, VLM = -2.5V, DGND = 0, RXIN1+ = RXIN2+ = 0, IN1+ = IN2+ = 0, RL = 16Ω is connected from
OUT1 to OUT2, SHDN = 0, TA = +25°C, unless otherwise noted. Preamp configured for AV = +1 with 1kΩ from RXOUT_- to RXIN_-.
Receiver configured for AV = +1 with 1kΩ from POUT_ to IN_-.)
RECEIVER INPUT NOISE
vs. FREQUENCY
RECEIVER AMPLIFIER HARMONIC
DISTORTION vs. FREQUENCY
100
-40
-50
10
DISTORTION (dBc)
in+
10
VOLTAGE NOISE (nV/√Hz)
CURRENT NOISE (pA/√Hz)
in-
RLOAD = 150Ω
VOUT = 1VP-P
AV = 10V/V
-60
3RD HARMONIC
-70
2ND HARMONIC
-80
-90
en
1
1
0.001
0.01
0.1
-100
0.001
1
0.01
FREQUENCY (MHz)
OUTPUT NOISE vs. FREQUENCY
3RD HARMONIC
-70
2ND HARMONIC
-80
-110
-120
PREAMP GAIN = 3
-130
PREAMP GAIN = 1
-140
-150
-90
-160
0.0001
-100
1
2
4
3
0.1
1
VCC - VOL
1.25
1.20
|VCC - VOL|
1.10
800
750
POWER DISSIPATION (mW)
MAX9480 toc12
1.35
1.15
0.01
POWER DISSIPATION vs. LINE POWER
VOH AND VOL vs. TEMPERATURE
1.40
1.30
0.001
FREQUENCY (MHz)
OUTPUT VOLTAGE (VP-P)
MAX9480 toc13
0
700
650
MAX9480/MAX9482
600
550
MAX9481
500
450
1.05
400
1.00
-40
-15
10
35
TEMPERATURE (°C)
6
MAX9480 toc11
RLOAD = 150Ω
f = 100kHz
AV = 1V/V
OUTPUT NOISE (dBm/Hz)
DISTORTION (dBc)
-100
MAX9480 toc10
-40
-60
1
0.1
FREQUENCY (MHz)
RECEIVER AMPLIFIER HARMONIC
DISTORTION vs. OUTPUT AMPLITUDE
-50
MAX9480 toc09
MAX9480 toc08
100
VOH AND VOL (V)
MAX9480/MAX9481/MAX9482
Low-Power, Low-Distortion, Central-Office
ADSL Drivers and Integrated Drivers/Receivers
60
85
12 13 14 15 16 17 18 19 20 21 22
LINE POWER (dBm)
_______________________________________________________________________________________
Low-Power, Low-Distortion, Central-Office
ADSL Drivers and Integrated Drivers/Receivers
PIN
MAX9480
MAX9481
1
NAME
MAX9482
TSSOP
QFN
2
2
31
2
3
3
3
4
4
4
—
5
6
FUNCTION
POUT1
First Preamp Output
1
IN1-
First Inverting Input
2
IN1+
First Noninverting Input
11
10
RXP
Positive Receiver Output from Internal Hybrid
5
5
3
DGND
6
6
4
SHDN
7
—
16
15
RXM
8
7
7
5
IN2+
9
10
11, 20
8
9
11, 20
8
9
18, 28
6
7
17, 28
IN2POUT2
VLM
Second Preamp Inverting Input
Second Preamp Output
-2.5V Negative Power-Supply Voltage
12, 19
12, 19
19, 27
18, 27
VLP
+2.5V Positive Power-Supply Voltage
13, 18
13, 18
20, 25
19, 24
VCC
14
14
21
20
OUT2
15, 16
15, 16
22, 23
21, 22
VEE
17
17
24
23
OUT1
—
1
1
30
BOUT1
First Driver Output Sense
—
10
10
8
BOUT2
Second Driver Output Sense
—
—
12
11
RXIN1-
First Receiver Inverting Input
—
—
13
12
RXIN1+
First Receiver Noninverting Input
—
—
14
13
RXIN2+
Second Receiver Noninverting Input
—
—
15
14
RXIN2-
Second Receiver Inverting Input
—
—
17, 26
9, 16, 25, 26,
29, 32
N.C.
Not Internally Connected
EP
EP
EP
EP
VEE
Exposed pad internally connected to VEE.
See the Applications Information section.
Ground
Shutdown Control Pin
Negative Receiver Output from Internal Hybrid
Second Preamp Noninverting Input
+5V Positive Power-Supply Voltage
Second Driver Output
-5V First Negative Power-Supply Voltage
First Driver Output
_______________________________________________________________________________________
7
MAX9480/MAX9481/MAX9482
Pin Description
MAX9480/MAX9481/MAX9482
Low-Power, Low-Distortion, Central-Office
ADSL Drivers and Integrated Drivers/Receivers
Detailed Description
The MAX9480/MAX9481/MAX9482 are fully differential
line transceivers for ADSL applications. Each transmit
path has a high-bandwidth, low-distortion, current-feedback operational amplifier followed by a fixed-gain
class-G output buffer.
The MAX9480/MAX9481/MAX9482 are class-G devices
and require two dual power supplies, ±5V and ±2.5V.
All preamplifier inputs and outputs are available to
allow external gain configuration. The MAX9480 contains an internal hybrid echo cancellation circuit with
receiver amplifiers set to a fixed gain of 4.6V/V. The
MAX9482 has no internal hybrid, but contains two
uncommitted low-noise op amps for coupling to an
external hybrid network. The MAX9481 has only the
preamp and line-driver circuits.
The two class-G output buffers are internally configured
for an inverting gain of three, and employ an active termination scheme that presents an 8Ω load to incoming
signals. The buffers are designed for use with a 1:2.5
line transformer and can deliver 20.4dBm average line
power with a signal crest factor of 5.3 into a standard
100Ω line. The outputs are designed to be directly DCor AC-bridged across the transformer.
The MAX9480/MAX9481/MAX9482 have a low-output
impedance, low-power shutdown mode that is activated
by driving SHDN high. Transmit path amplifiers and
buffers are disabled while the part is in shutdown, and
an 8Ω resistor is coupled directly between OUT_ and the
output of a three-state buffer referenced to DGND (0V).
The receive amplifiers remain active in shutdown mode.
Applications Information
Theory of Operation
The preamplifiers and receivers are current-feedback
amplifiers; thus, their open-loop transfer function is
expressed as a transimpedance, ∆VOUT/∆IIN, or ZOL.
The frequency behavior of their open-loop transimpedance is similar to the open-loop gain of a voltage-feedback amplifier; that is, they have a large DC value that
decreases at approximately 6dB per octave. Analyzing
the follower with gain, as shown in Figure 1, yields the
following transfer function:
ZOL(S)
VOUT
= G×
VIN
ZOL(S) + G × (RIN + RF )
[Equation 1]
where G = AVCL = 1 + (RF/RG), and RIN = 1/gM
200Ω.
At low gains, G x RIN << RF. Therefore, the closed-loop
bandwidth is essentially independent of closed-loop
gain. Similarly, ZOL >> RF at low frequencies, so that:
VOUT
R
= G = 1+ F
VIN
RG
[Equation 2]
Shutdown
Forcing SHDN high puts the MAX9480/MAX9481/
MAX9482 into low-power shutdown mode. In shutdown
mode, OUT1 and OUT2 are low impedance, and the
power-supply currents drop to less than 10% of their normal quiescent operating values. When coming out of shutdown, allow about 1.5µs before commencing operation.
PC Board Layout
RF
RG
RIN
+1
+1
VIN
ZOL
MAX9480
MAX9481
MAX9482
Figure 1. Current Feedback Amplifier Block Diagram
8
VOUT
Power-Supply Bypassing
The MAX9480/MAX9481/MAX9482 are wide-bandwidth
devices and require careful board layout, including the
possible use of constant-impedance microstrip or
stripline techniques. To realize the full AC performance
of these high-speed amplifiers, pay careful attention to
power-supply bypassing. The PC board should have at
least two layers: a signal and power layer on one side,
and a large, low-impedance ground plane on the other
side. The ground plane should be as free of voids as
possible. With multilayer boards, locate the ground
plane on a layer that incorporates no signal or power
traces. Observe the following guidelines when designing the board. IC sockets increase parasitic capacitance and inductance, and should not be used. Do not
make 90° turns; round all corners. Observe high-frequency bypassing techniques to maintain the amplifier’s
_______________________________________________________________________________________
Low-Power, Low-Distortion, Central-Office
ADSL Drivers and Integrated Drivers/Receivers
Exposed-Pad Connection
For optimum electrical performance, the EP of the
MAX9480/MAX9481/MAX9482 should be soldered to
the PC board and electrically connected to VEE with as
wide a trace as possible. If using the EP, the 100µF to
220µF low-ESR tantalum capacitor should be used to
decouple the EP to the ground plane of the PC board
as close to the EP region as possible. For optimum
thermal performance, the EP should be additionally
connected to a heat sink, as described in the Thermal
Protection and Power Dissipation section.
Preamp Output Bypassing
In addition to the above layout considerations, and independent of the gain setting, some high-frequency
bypassing of the preamp outputs is necessary to prevent
instability arising from the high-frequency input impedance characteristics of the buffers. A 50Ω resistor in
series with a 2200pF ceramic capacitor should be connected between POUT_ and DGND, with a 47pF capacitor connected directly between POUT_ and DGND.
DC and Noise Errors
There are several error sources to consider when using
any operational amplifier, and this applies to the
MAX9480/MAX9481/MAX9482 as well. Offset-error
terms are given by equations 3 and 4. Voltage and current-noise errors are root-square summed and therefore computed separately. In Figure 3, the total output
offset voltage is determined by:
• The input offset voltage, VOS, times the closed-loop
gain (1 + (RF / RG)).
• The positive input bias current, IB+, times the source
resistor, RS (typically less than 10Ω), plus the negative input bias current, IB-, times the parallel combination of R G and R F . In current-mode feedback
amplifiers, the input bias currents may flow into or
out of the device. For this reason, there is no benefit
to matching the resistance at both inputs, as is common in voltage-feedback amplifiers.
VIN
RG
RF
RT
MAX9480
MAX9481
MAX9482
VOUT
RS
(a)
VOUT = -
( RRGF ) (VIN )
RG
RF
Choosing Feedback and Gain Resistors
The MAX9480/MAX9481/MAX9482 use current-feedback amplifiers. Figure 2 shows the standard inverting
and noninverting configurations. Notice that the gain of
the noninverting circuit, Figure 2(b), is 1 plus the magnitude of the inverting closed-loop gain. Increasing
feedback resistor values decreases peaking. Use the
input resistor, RG, to change the magnitude of the gain.
Do not use feedback capacitance.
MAX9480
MAX9481
MAX9482
VIN
VOUT
RT
(b)
VOUT = 1+ RF
RG
[ ( )] (VIN )
Figure 2. Inverting Gain Configuration and Noninverting Gain
Configuration
_______________________________________________________________________________________
9
MAX9480/MAX9481/MAX9482
accuracy. The bypass capacitors should include a
0.1µF ceramic capacitor between each supply pin and
the ground plane, located as close to the package as
possible. Additionally, place a 1µF to 10µF ceramic or
tantalum capacitor in parallel with each 0.1µF capacitor,
and as close to them as possible. Place a 10µF to 15µF
low-ESR tantalum capacitor at the VCC, VLM, and VLP
power-supply points of entry to the PC board. Place a
100µF to 220µF low-ESR tantalum capacitor at the VEE
power-supply point of entry to the PC board. The powersupply traces should lead directly from the board input
capacitors to VCC and VEE. To minimize parasitic inductance, keep PC traces short and use surface-mount
components. Wire-wrapped boards are much too inductive, and breadboards are much too capacitive; neither
should be used. Power-supply sequencing is required;
apply ±5.0 before applying ±2.5V.
MAX9480/MAX9481/MAX9482
Low-Power, Low-Distortion, Central-Office
ADSL Drivers and Integrated Drivers/Receivers
R7
800Ω
RG
RF
R8
667Ω
IBMAX9480
MAX9481
MAX9482
IB+
ZOUT
VOUT
R1
1.6Ω
RS
Figure 3. Input Offset Voltage and Current
R10
540Ω
R9
945Ω
The equation for total DC error is:
[Equation 3]

R 
VOUT = (IB + )RS + (IB − )(RF || RG ) + VOS 1 + F 
 RG 
[
]
The total output-referred noise voltage is:
[Equation 4]
 R 
en(OUT) = 1+ F 
 RG 
[(in+ )Rs] + [(in− )RF || RG ]
2
2
+ (en )2
The MAX9480/MAX9481/MAX9482 have very low noise
input voltage (en), 3.5nV/√Hz (typ). The current noise at
the noninverting input (in+) is 4.0pA/√Hz (typ), and the
current noise at the inverting input, in-, is 15pA/√Hz (typ).
An example of the DC error calculations, using the
MAX9480 data and the Typical Operating Circuit where
RF = RG = 1kΩ (RF || RG = 500Ω) and RS = 50Ω, gives
the following, using equation 3:
(
) (
)

 1000 × 1000  
−6
50 + 2.6 × 10−6 

 1.0 × 10
 1000 + 1000  
VOUT = 


 1000 
+ 0.002 x 1 +


 1000 


where VOUT = 6.7mV at the preamp outputs.
Calculating total preamp output noise using equation 4
yields 16.6nV/√Hz, which then contributes 50nV/√Hz at
the driver output. The driver noise contributes an additional 35mV/√Hz, to the overall output noise.
10
Figure 4. Active Line Termination Scheme, Single Side
Driving Capacitive Loads
The MAX9480/MAX9481/MAX9482 receive amplifiers
are optimized for AC performance. They are not
designed to drive highly capacitive loads. Reactive
loads decrease phase margin and can produce excessive ringing and oscillation.
Output-Impedance Synthesis
To help meet the contradictory requirements of high
output power and low-power use, the active termination
circuit shown in Figure 5 is used. This circuit is
designed to present a line termination of 8Ω. R1 is a
physical 1.6Ω resistor voltage feedback from the outboard end of R1 to the noninverting input of the amplifier, introduces positive feedback, which increases the
effective output-impedance value from 1.6Ω to 8Ω.
Hence, the impedance looking into the port matches
the line impedance reflected through the transformer.
Assuming an ideal amplifier, the following equation
expresses the output impedance:
ZOUT =
R1
 R  R10
1 − 1 + 7 
 R8  R9 + R10
[Equation 5]
Substituting the values of the resistors shown in Figure
4 into equation 5, we obtain ZOUT = 8Ω.
The output equivalent circuit for the line driver is shown
in Figure 5.
______________________________________________________________________________________
Low-Power, Low-Distortion, Central-Office
ADSL Drivers and Integrated Drivers/Receivers
Tx PORT
1:2.5
LINE PORT
ZIN = 16Ω
LINE +
ZOUT = 100Ω
LINE -
ZOUT = 8Ω
Figure 5. Output Equivalent Circuit
With a 1:2.5 transformer, the two 8Ω impedances realized by the active-feedback network form a perfect line
termination. The MAX9480 family’s active termination
design makes it possible to use a ±5V power supply
instead of ±12V or ±15V, significantly increasing driver
efficiency.
In this pseudo-class-G amplifier, there is no abrupt
supply switchover between the higher voltage and the
lower voltage amplifiers, as in a traditional class G. It is
a seamless transition that depends only on the amplitude of the input signal and the gain. The lower voltage
amplifier has a high conversion conductance, GA, and
the higher voltage amplifier has a low conductance, GB.
With a low input voltage, the lower voltage amplifier provides most of the output current to the load. As the voltage of the input signal increases, the lower voltage
amplifier starts to saturate and the higher voltage amplifier begins to drive the output.
0.8Rx
MAX9480
Hybrid Considerations
The MAX9480 includes an internal hybrid coupling circuit to realize the receive function with no external components. The hybrid couples the transmitted signal
from the line-driver port (Tx port) to the line port and
cancels the echo in the receiving port (Rx port). The
hybrid circuit is detailed in Figure 6. If using the
MAX9481 or the MAX9482, external circuitry must be
added to realize a receive function. The MAX9482
includes two uncommitted op amps for this purpose.
A traditional hybrid network with a 2:1 resistor ratio
must be replaced with a 1.2:1 ratio to achieve nominal
echo cancellation. Additionally, the use of a synthesized output impedance has the side effect of preventing a “virtual-ground” condition at the driver output
(BOUT), as seen by the receive signal. Hence, the
resulting hybrid circuit exhibits an increased attenuation of the receive signal with respect to a traditional
case with no synthesis. For central-office ADSL applications, the noise specifications allow this trade-off to
be made.
Rx
Tx
0.8Tx
R1
1.6Ω
R4
1.2kΩ
RXM
0Tx + 0.18Rx
Rx
PORT
Tx
PORT
0Tx - 0.18Rx
RXP
R6
1.2kΩ
R2
1.6Ω
R5
1kΩ
OUT2
-Rx
-0.8Rx
-Tx
-0.8Tx
(a) HYBRID CIRCUIT IN MAX9480
0Rx
Rx
Tx
0.5Tx
LINE
PORT
OUT1
8Ω
1kΩ
2kΩ
RXM
0Tx + 0.67Rx
Pseudo-Class-G Amplifier
The driver consists of two stages: the current-feedback
preamplifier and the voltage-feedback buffer. To save
power, the preamplifier uses a power supply of only
±2.5V. The output swing of the preamplifier is about
3.0VP-P. The buffer is designed as a pseudo-class-G
amplifier with a fixed gain of -3V/V. This buffer stage
employs two power supplies: a lower voltage supply,
±2.5V, and a higher voltage supply, ±5V. In the differential driver, two parallel amplifiers provide the output
current to the load, as shown in Figure 7.
LINE
PORT
OUT1
R3
1kΩ
Rx
PORT
Tx
PORT
0Tx - 0.67Rx
RXP
1kΩ
2kΩ
8Ω
-0.0Rx
-Tx
OUT2
-Rx
-0.5Tx
(b) TRADITIONAL HYBRID CIRCUIT
Figure 6. Hybrid Circuit in the MAX9480
______________________________________________________________________________________
11
MAX9480/MAX9481/MAX9482
ZOUT = 8Ω
This smooth transition between the lower voltage amplifier and the higher voltage amplifier guarantees no
glitch on the output signal, and ensures high linearity for
high output power, while at the same time consuming
minimum power. The relation between the input voltage
and the output current of this pseudo-class-G buffer is
illustrated in Figure 8.
Typical Operating Circuit, the MAX9480 is coupled to
the phone line through just such a transformer. The
total differential load for the MAX9480 is therefore 16Ω.
Active termination is included on all devices in the
MAX9480 family (as explained above in the OutputImpedance Synthesis section).
Thermal Protection and Power Dissipation
A step-up transformer at the output of the differential
line driver has a step-down effect on signals received
from the line. A voltage attenuation equal to the inverse
of the turns ratio is realized in the receive channel. This
is an addition to the attenuation due to the hybrid circuitry itself (see the Hybrid Considerations section).
The MAX9480/MAX9481/MAX9482 are available in the
EP version of the TSSOP. The EP facilitates heat transfer out of the package if the pad is soldered to a heat
sink made from an area of circuit board copper.
Connect this copper dissipation area to V EE . For a
DMT-modulated signal with a crest factor greater than
or equal to 5.3, the power dissipation of the
MAX9480/MAX9481/MAX9482 should not exceed
700mW; the 20-pin TSSOP-EP package with its EP
floating allows 714mW peak power at +85°C. Hence,
heat sinking is not essential, but is desirable for attaining optimal electrical performance. Note that the part is
capable of 500mA peak output current, which could
cause thermal shutdown in applications with elevated
ambient temperatures and/or signals with low crest factors. The thermal shutdown feature prevents the die
temperature from exceeding +150°C. See Figure 9 for
a guide to power derating for each of the packages.
Receiver Channel Considerations
I
IOUT
IOUTB
Transformer Selection
Full-rate, central-office ADSL requires the transmission
of a +20.4dBm (110mW) DMT signal. The DMT signal
has a typical crest factor of 5.3, requiring the line driver
to provide peak line power of 35.4dBm (3.4W). The
35.4dBm peak line power translates to a 36V peak-topeak differential voltage on a 100Ω line. The output
swing available from the MAX9480 family of line drivers
with a ±5V supply is 15.0VP-P, and hence a step-up
transformer with turns ratio of 1:2.5 is needed. In the
IOUTA
VIN
Figure 8. Amplifier Output Characteristics
5000
28-TSSOP, PAD TO VEE
+2.5V
LOWER
VOLTAGE
AMPLIFIER
IOUTA
IOUT
-2.5V
VIN
+5V
HIGHER
VOLTAGE
AMPLIFIER
LOAD
IOUTB
-5V
MAXIMUM DISSIPATION (mW)
MAX9480/MAX9481/MAX9482
Low-Power, Low-Distortion, Central-Office
ADSL Drivers and Integrated Drivers/Receivers
4000
QFN
20-TSSOP, PAD TO VEE
3000
2000
1000
28-TSSOP, PAD FLOATING
20-TSSOP, PAD FLOATING
0
-40
-15
10
35
60
85
TEMPERATURE (°C)
Figure 7. Output Stage of Pseudo-Class-G Amplifier
12
Figure 9. Maximum Power Dissipation vs. Temperature
______________________________________________________________________________________
Low-Power, Low-Distortion, Central-Office
ADSL Drivers and Integrated Drivers/Receivers
RCVP
1.00kΩ
IN1-
POUT1
5V
2.5V
VCC
VLP
MAX9480
IN1+
OUT1
SHDN
8Ω
RXM
1:2.5
DGND
PHONE LINE 100Ω
INPUT
8Ω
RXP
OUT2
IN2+
IN21.00kΩ
RCVN
POUT2
VEE
VLM
-5V
-2.5V
______________________________________________________________________________________
13
MAX9480/MAX9481/MAX9482
Typical Operating Circuits
Low-Power, Low-Distortion, Central-Office
ADSL Drivers and Integrated Drivers/Receivers
MAX9480/MAX9481/MAX9482
Typical Operating Circuits (continued)
1.0kΩ
250Ω
RCVP
1.00kΩ
IN1-
POUT1
5V
2.5V
VCC
VLP
1.20kΩ
1.00kΩ
BOUT1
IN1+
OUT1
SHDN
8Ω
1:2.5
DGND
PHONE LINE 100Ω
INPUT
MAX9481
8Ω
OUT2
IN2+
BOUT2
IN21.00kΩ
POUT2
VEE
VLM
-5V
-2.5V
1.20kΩ
1.00kΩ
RCVN
250kΩ
1.0kΩ
14
______________________________________________________________________________________
Low-Power, Low-Distortion, Central-Office
ADSL Drivers and Integrated Drivers/Receivers
RCVP
5V
2.5V
VCC
VLP
1.0kΩ
RXP
250Ω
RXIN1-
POUT1
RXIN1+
1.00kΩ
1.20kΩ
IN1-
1.00kΩ
BOUT1
IN1+
OUT1
SHDN
8Ω
1:2.5
PHONE LINE 100Ω
DGND
INPUT
MAX9482
8Ω
OUT2
IN2+
BOUT2
IN21.20kΩ
1.00kΩ
1.00kΩ
RXIN2+
POUT2
250Ω
RXIN2VEE
VLM
-5V
-2.5V
RXM
1.0kΩ
RCVN
______________________________________________________________________________________
15
MAX9480/MAX9481/MAX9482
Typical Operating Circuits (continued)
Low-Power, Low-Distortion, Central-Office
ADSL Drivers and Integrated Drivers/Receivers
N.C.
N.C.
VCC
23
OUT1
25 VCC
DGND
3
22
VEE
24 OUT1
SHDN
4
21
VEE
20
OUT2
16 VEE
DGND 5
15 VEE
SHDN 6
23 VEE
IN2+
5
IN2-
6
19
VCC
POUT2
7
18
VLP
BOUT2
8
17
VLM
11 VLM
BOUT2 10
19 VLP
RXP 11
18 VLM
RXIN1- 12
17 N.C.
RXIN1+ 13
16 RXM
RXIN2+ 14
15 RXIN2-
16
BOUT2 10
N.C.
20 VCC
15
POUT2 9
RXM
12 VLP
14
POUT2 9
RXIN2-
21 OUT2
13
IN2- 8
RXIN2+
13 VCC
12
IN2- 8
9
22 VEE
10
IN2+ 7
RXP
14 OUT2
MAX9482
N.C.
IN2+ 7
TSSOP
25
24
2
11
SHDN 6
MAX9482
1
RXIN1-
MAX9481
IN1IN1+
RXIN1+
DGND 5
VLP
IN1+ 4
26
17 OUT1
VLM
IN1+ 4
27
26 N.C.
N.C.
IN1- 3
28
27 VLP
18 VCC
BOUT1
POUT1 2
IN1- 3
29
28 VLM
30
BOUT1 1
19 VLP
POUT1
20 VLM
POUT1 2
N.C.
BOUT1 1
31
TOP VIEW
32
MAX9480/MAX9481/MAX9482
Pin Configurations (continued)
QFN
TSSOP
Chip Information
MAX9480 TRANSISTOR COUNT: 2557
MAX9481 TRANSISTOR COUNT: 2557
MAX9482 TRANSISTOR COUNT: 2607
PROCESS: Bipolar
16
______________________________________________________________________________________
Low-Power, Low-Distortion, Central-Office
ADSL Drivers and Integrated Drivers/Receivers
TSSOP 4.4mm BODY.EPS
XX XX
PACKAGE OUTLINE, TSSOP, 4.40 MM BODY,
EXPOSED PAD
21-0108
E
1
1
______________________________________________________________________________________
17
MAX9480/MAX9481/MAX9482
Package Information
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information,
go to www.maxim-ic.com/packages.)
Package Information (continued)
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information,
go to www.maxim-ic.com/packages.)
32L QFN.EPS
MAX9480/MAX9481/MAX9482
Low-Power, Low-Distortion, Central-Office
ADSL Drivers and Integrated Drivers/Receivers
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
18 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600
© 2005 Maxim Integrated Products
Printed USA
is a registered trademark of Maxim Integrated Products, Inc.